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tegra_lic.c (296936) tegra_lic.c (297539)
1/*-
2 * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/arm/nvidia/tegra_lic.c 296936 2016-03-16 13:01:48Z mmel $");
28__FBSDID("$FreeBSD: head/sys/arm/nvidia/tegra_lic.c 297539 2016-04-04 09:15:25Z skra $");
29
30/*
31 * Local interrupt controller driver for Tegra SoCs.
32 */
33#include <sys/param.h>
34#include <sys/module.h>
35#include <sys/systm.h>
36#include <sys/bus.h>

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83
84struct tegra_lic_sc {
85 device_t dev;
86 struct resource *mem_res[nitems(lic_spec)];
87 device_t parent;
88};
89
90static int
29
30/*
31 * Local interrupt controller driver for Tegra SoCs.
32 */
33#include <sys/param.h>
34#include <sys/module.h>
35#include <sys/systm.h>
36#include <sys/bus.h>

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83
84struct tegra_lic_sc {
85 device_t dev;
86 struct resource *mem_res[nitems(lic_spec)];
87 device_t parent;
88};
89
90static int
91tegra_lic_register(device_t dev, struct intr_irqsrc *isrc, boolean_t *is_percpu)
91tegra_lic_alloc_intr(device_t dev, struct intr_irqsrc *isrc,
92 struct resource *res, struct intr_map_data *data)
92{
93 struct tegra_lic_sc *sc = device_get_softc(dev);
94
93{
94 struct tegra_lic_sc *sc = device_get_softc(dev);
95
95 return (PIC_REGISTER(sc->parent, isrc, is_percpu));
96 return (PIC_ALLOC_INTR(sc->parent, isrc, res, data));
96}
97
97}
98
98static int
99tegra_lic_unregister(device_t dev, struct intr_irqsrc *isrc)
99static void
100tegra_lic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
100{
101 struct tegra_lic_sc *sc = device_get_softc(dev);
102
101{
102 struct tegra_lic_sc *sc = device_get_softc(dev);
103
103 return (PIC_UNREGISTER(sc->parent, isrc));
104 PIC_DISABLE_INTR(sc->parent, isrc);
104}
105
106static void
105}
106
107static void
107tegra_lic_enable_source(device_t dev, struct intr_irqsrc *isrc)
108tegra_lic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
108{
109 struct tegra_lic_sc *sc = device_get_softc(dev);
110
109{
110 struct tegra_lic_sc *sc = device_get_softc(dev);
111
111 PIC_ENABLE_SOURCE(sc->parent, isrc);
112 PIC_ENABLE_INTR(sc->parent, isrc);
112}
113
113}
114
114static void
115tegra_lic_disable_source(device_t dev, struct intr_irqsrc *isrc)
115static int
116tegra_lic_map_intr(device_t dev, struct intr_map_data *data,
117 struct intr_irqsrc **isrcp)
116{
117 struct tegra_lic_sc *sc = device_get_softc(dev);
118
118{
119 struct tegra_lic_sc *sc = device_get_softc(dev);
120
119 PIC_DISABLE_SOURCE(sc->parent, isrc);
121 return (PIC_MAP_INTR(sc->parent, data, isrcp));
120}
121
122}
123
122static void
123tegra_lic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
124static int
125tegra_lic_release_intr(device_t dev, struct intr_irqsrc *isrc,
126 struct resource *res, struct intr_map_data *data)
124{
125 struct tegra_lic_sc *sc = device_get_softc(dev);
126
127{
128 struct tegra_lic_sc *sc = device_get_softc(dev);
129
127 PIC_ENABLE_INTR(sc->parent, isrc);
130 return (PIC_RELEASE_INTR(sc->parent, isrc, res, data));
128}
129
131}
132
133static int
134tegra_lic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
135 struct resource *res, struct intr_map_data *data)
136{
137 struct tegra_lic_sc *sc = device_get_softc(dev);
138
139 return (PIC_SETUP_INTR(sc->parent, isrc, res, data));
140}
141
142static int
143tegra_lic_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
144 struct resource *res, struct intr_map_data *data)
145{
146 struct tegra_lic_sc *sc = device_get_softc(dev);
147
148 return (PIC_TEARDOWN_INTR(sc->parent, isrc, res, data));
149}
150
130static void
131tegra_lic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
132{
133 struct tegra_lic_sc *sc = device_get_softc(dev);
134
135 PIC_PRE_ITHREAD(sc->parent, isrc);
136}
137

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149{
150 struct tegra_lic_sc *sc = device_get_softc(dev);
151
152 PIC_POST_FILTER(sc->parent, isrc);
153}
154
155#ifdef SMP
156static int
151static void
152tegra_lic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
153{
154 struct tegra_lic_sc *sc = device_get_softc(dev);
155
156 PIC_PRE_ITHREAD(sc->parent, isrc);
157}
158

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170{
171 struct tegra_lic_sc *sc = device_get_softc(dev);
172
173 PIC_POST_FILTER(sc->parent, isrc);
174}
175
176#ifdef SMP
177static int
157tegra_lic_bind(device_t dev, struct intr_irqsrc *isrc)
178tegra_lic_bind_intr(device_t dev, struct intr_irqsrc *isrc)
158{
159 struct tegra_lic_sc *sc = device_get_softc(dev);
160
179{
180 struct tegra_lic_sc *sc = device_get_softc(dev);
181
161 return (PIC_BIND(sc->parent, isrc));
182 return (PIC_BIND_INTR(sc->parent, isrc));
162}
163#endif
164
165static int
166tegra_lic_probe(device_t dev)
167{
168 if (!ofw_bus_status_okay(dev))
169 return (ENXIO);

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240}
241
242static device_method_t tegra_lic_methods[] = {
243 DEVMETHOD(device_probe, tegra_lic_probe),
244 DEVMETHOD(device_attach, tegra_lic_attach),
245 DEVMETHOD(device_detach, tegra_lic_detach),
246
247 /* Interrupt controller interface */
183}
184#endif
185
186static int
187tegra_lic_probe(device_t dev)
188{
189 if (!ofw_bus_status_okay(dev))
190 return (ENXIO);

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261}
262
263static device_method_t tegra_lic_methods[] = {
264 DEVMETHOD(device_probe, tegra_lic_probe),
265 DEVMETHOD(device_attach, tegra_lic_attach),
266 DEVMETHOD(device_detach, tegra_lic_detach),
267
268 /* Interrupt controller interface */
248 DEVMETHOD(pic_register, tegra_lic_register),
249 DEVMETHOD(pic_unregister, tegra_lic_unregister),
250 DEVMETHOD(pic_enable_source, tegra_lic_enable_source),
251 DEVMETHOD(pic_disable_source, tegra_lic_disable_source),
269 DEVMETHOD(pic_alloc_intr, tegra_lic_alloc_intr),
270 DEVMETHOD(pic_disable_intr, tegra_lic_disable_intr),
252 DEVMETHOD(pic_enable_intr, tegra_lic_enable_intr),
271 DEVMETHOD(pic_enable_intr, tegra_lic_enable_intr),
272 DEVMETHOD(pic_map_intr, tegra_lic_map_intr),
273 DEVMETHOD(pic_release_intr, tegra_lic_release_intr),
274 DEVMETHOD(pic_setup_intr, tegra_lic_setup_intr),
275 DEVMETHOD(pic_teardown_intr, tegra_lic_teardown_intr),
253 DEVMETHOD(pic_pre_ithread, tegra_lic_pre_ithread),
254 DEVMETHOD(pic_post_ithread, tegra_lic_post_ithread),
255 DEVMETHOD(pic_post_filter, tegra_lic_post_filter),
256#ifdef SMP
276 DEVMETHOD(pic_pre_ithread, tegra_lic_pre_ithread),
277 DEVMETHOD(pic_post_ithread, tegra_lic_post_ithread),
278 DEVMETHOD(pic_post_filter, tegra_lic_post_filter),
279#ifdef SMP
257 DEVMETHOD(pic_bind, tegra_lic_bind),
280 DEVMETHOD(pic_bind_intr, tegra_lic_bind_intr),
258#endif
259 DEVMETHOD_END
260};
261devclass_t tegra_lic_devclass;
262DEFINE_CLASS_0(tegra_lic, tegra_lic_driver, tegra_lic_methods,
263 sizeof(struct tegra_lic_sc));
264EARLY_DRIVER_MODULE(tegra_lic, simplebus, tegra_lic_driver, tegra_lic_devclass,
265 NULL, NULL, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE + 1);
281#endif
282 DEVMETHOD_END
283};
284devclass_t tegra_lic_devclass;
285DEFINE_CLASS_0(tegra_lic, tegra_lic_driver, tegra_lic_methods,
286 sizeof(struct tegra_lic_sc));
287EARLY_DRIVER_MODULE(tegra_lic, simplebus, tegra_lic_driver, tegra_lic_devclass,
288 NULL, NULL, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE + 1);