| atomic-v6.h (308327) | atomic-v6.h (315371) |
|---|---|
| 1/* $NetBSD: atomic.h,v 1.1 2002/10/19 12:22:34 bsh Exp $ */ 2 3/*- 4 * Copyright (C) 2003-2004 Olivier Houchard 5 * Copyright (C) 1994-1997 Mark Brinicombe 6 * Copyright (C) 1994 Brini 7 * All rights reserved. 8 * --- 19 unchanged lines hidden (view full) --- 28 * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 31 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 33 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 34 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * | 1/* $NetBSD: atomic.h,v 1.1 2002/10/19 12:22:34 bsh Exp $ */ 2 3/*- 4 * Copyright (C) 2003-2004 Olivier Houchard 5 * Copyright (C) 1994-1997 Mark Brinicombe 6 * Copyright (C) 1994 Brini 7 * All rights reserved. 8 * --- 19 unchanged lines hidden (view full) --- 28 * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 31 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 33 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 34 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * |
| 36 * $FreeBSD: stable/11/sys/arm/include/atomic-v6.h 308327 2016-11-05 04:36:12Z mmel $ | 36 * $FreeBSD: stable/11/sys/arm/include/atomic-v6.h 315371 2017-03-16 06:00:27Z mjg $ |
| 37 */ 38 39#ifndef _MACHINE_ATOMIC_V6_H_ 40#define _MACHINE_ATOMIC_V6_H_ 41 42#ifndef _MACHINE_ATOMIC_H_ 43#error Do not include this file directly, use <machine/atomic.h> 44#endif --- 140 unchanged lines hidden (view full) --- 185 186 atomic_clear_32((volatile uint32_t *)address, setmask); 187} 188 189ATOMIC_ACQ_REL(clear, 32) 190ATOMIC_ACQ_REL(clear, 64) 191ATOMIC_ACQ_REL_LONG(clear) 192 | 37 */ 38 39#ifndef _MACHINE_ATOMIC_V6_H_ 40#define _MACHINE_ATOMIC_V6_H_ 41 42#ifndef _MACHINE_ATOMIC_H_ 43#error Do not include this file directly, use <machine/atomic.h> 44#endif --- 140 unchanged lines hidden (view full) --- 185 186 atomic_clear_32((volatile uint32_t *)address, setmask); 187} 188 189ATOMIC_ACQ_REL(clear, 32) 190ATOMIC_ACQ_REL(clear, 64) 191ATOMIC_ACQ_REL_LONG(clear) 192 |
| 193static __inline int 194atomic_fcmpset_32(volatile uint32_t *p, uint32_t *cmpval, uint32_t newval) 195{ 196 uint32_t tmp; 197 uint32_t _cmpval = *cmpval; 198 int ret; 199 200 __asm __volatile( 201 "1: mov %0, #1 \n" 202 " ldrex %1, [%2] \n" 203 " cmp %1, %3 \n" 204 " it ne \n" 205 " bne 2f \n" 206 " strex %0, %4, [%2] \n" 207 "2:" 208 : "=&r" (ret), "=&r" (tmp), "+r" (p), "+r" (_cmpval), "+r" (newval) 209 : : "cc", "memory"); 210 *cmpval = tmp; 211 return (!ret); 212} 213 214static __inline uint64_t 215atomic_fcmpset_64(volatile uint64_t *p, uint64_t *cmpval, uint64_t newval) 216{ 217 uint64_t tmp; 218 uint64_t _cmpval = *cmpval; 219 int ret; 220 221 __asm __volatile( 222 "1: mov %[ret], #1 \n" 223 " ldrexd %Q[tmp], %R[tmp], [%[ptr]] \n" 224 " teq %Q[tmp], %Q[_cmpval] \n" 225 " itee eq \n" 226 " teqeq %R[tmp], %R[_cmpval] \n" 227 " bne 2f \n" 228 " strexd %[ret], %Q[newval], %R[newval], [%[ptr]]\n" 229 "2: \n" 230 : [ret] "=&r" (ret), 231 [tmp] "=&r" (tmp) 232 : [ptr] "r" (p), 233 [_cmpval] "r" (_cmpval), 234 [newval] "r" (newval) 235 : "cc", "memory"); 236 *cmpval = tmp; 237 return (!ret); 238} 239 240static __inline u_long 241atomic_fcmpset_long(volatile u_long *p, u_long *cmpval, u_long newval) 242{ 243 244 return (atomic_fcmpset_32((volatile uint32_t *)p, 245 (uint32_t *)cmpval, newval)); 246} 247 248static __inline uint64_t 249atomic_fcmpset_acq_64(volatile uint64_t *p, uint64_t *cmpval, uint64_t newval) 250{ 251 uint64_t ret; 252 253 ret = atomic_fcmpset_64(p, cmpval, newval); 254 dmb(); 255 return (ret); 256} 257 258static __inline u_long 259atomic_fcmpset_acq_long(volatile u_long *p, u_long *cmpval, u_long newval) 260{ 261 u_long ret; 262 263 ret = atomic_fcmpset_long(p, cmpval, newval); 264 dmb(); 265 return (ret); 266} 267 |
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| 193static __inline uint32_t | 268static __inline uint32_t |
| 269atomic_fcmpset_acq_32(volatile uint32_t *p, uint32_t *cmpval, uint32_t newval) 270{ 271 272 uint32_t ret; 273 274 ret = atomic_fcmpset_32(p, cmpval, newval); 275 dmb(); 276 return (ret); 277} 278 279static __inline uint32_t 280atomic_fcmpset_rel_32(volatile uint32_t *p, uint32_t *cmpval, uint32_t newval) 281{ 282 283 dmb(); 284 return (atomic_fcmpset_32(p, cmpval, newval)); 285} 286 287static __inline uint64_t 288atomic_fcmpset_rel_64(volatile uint64_t *p, uint64_t *cmpval, uint64_t newval) 289{ 290 291 dmb(); 292 return (atomic_fcmpset_64(p, cmpval, newval)); 293} 294 295static __inline u_long 296atomic_fcmpset_rel_long(volatile u_long *p, u_long *cmpval, u_long newval) 297{ 298 299 dmb(); 300 return (atomic_fcmpset_long(p, cmpval, newval)); 301} 302 303static __inline uint32_t |
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| 194atomic_cmpset_32(volatile uint32_t *p, uint32_t cmpval, uint32_t newval) 195{ 196 uint32_t ret; 197 198 __asm __volatile( 199 "1: ldrex %0, [%1] \n" 200 " cmp %0, %2 \n" 201 " itt ne \n" --- 513 unchanged lines hidden --- | 304atomic_cmpset_32(volatile uint32_t *p, uint32_t cmpval, uint32_t newval) 305{ 306 uint32_t ret; 307 308 __asm __volatile( 309 "1: ldrex %0, [%1] \n" 310 " cmp %0, %2 \n" 311 " itt ne \n" --- 513 unchanged lines hidden --- |