| bcm2835_intr.c (276017) | bcm2835_intr.c (280558) |
|---|---|
| 1/*- 2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3 * All rights reserved. 4 * 5 * Based on OMAP3 INTC code by Ben Gray 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 14 unchanged lines hidden (view full) --- 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 30#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3 * All rights reserved. 4 * 5 * Based on OMAP3 INTC code by Ben Gray 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 14 unchanged lines hidden (view full) --- 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 30#include <sys/cdefs.h> |
| 31__FBSDID("$FreeBSD: head/sys/arm/broadcom/bcm2835/bcm2835_intr.c 276017 2014-12-21 16:35:42Z andrew $"); | 31__FBSDID("$FreeBSD: head/sys/arm/broadcom/bcm2835/bcm2835_intr.c 280558 2015-03-25 10:59:42Z andrew $"); |
| 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bus.h> 36#include <sys/kernel.h> 37#include <sys/ktr.h> 38#include <sys/module.h> 39#include <sys/rman.h> 40#include <machine/bus.h> 41#include <machine/intr.h> 42 43#include <dev/fdt/fdt_common.h> 44#include <dev/ofw/openfirm.h> 45#include <dev/ofw/ofw_bus.h> 46#include <dev/ofw/ofw_bus_subr.h> 47 | 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bus.h> 36#include <sys/kernel.h> 37#include <sys/ktr.h> 38#include <sys/module.h> 39#include <sys/rman.h> 40#include <machine/bus.h> 41#include <machine/intr.h> 42 43#include <dev/fdt/fdt_common.h> 44#include <dev/ofw/openfirm.h> 45#include <dev/ofw/ofw_bus.h> 46#include <dev/ofw/ofw_bus_subr.h> 47 |
| 48#ifdef SOC_BCM2836 49#include <arm/broadcom/bcm2835/bcm2836.h> 50#endif 51 |
|
| 48#define INTC_PENDING_BASIC 0x00 49#define INTC_PENDING_BANK1 0x04 50#define INTC_PENDING_BANK2 0x08 51#define INTC_FIQ_CONTROL 0x0C 52#define INTC_ENABLE_BANK1 0x10 53#define INTC_ENABLE_BANK2 0x14 54#define INTC_ENABLE_BASIC 0x18 55#define INTC_DISABLE_BANK1 0x1C 56#define INTC_DISABLE_BANK2 0x20 57#define INTC_DISABLE_BASIC 0x24 58 59#define BANK1_START 8 60#define BANK1_END (BANK1_START + 32 - 1) 61#define BANK2_START (BANK1_START + 32) 62#define BANK2_END (BANK2_START + 32 - 1) 63#define BANK3_START (BANK2_START + 32) | 52#define INTC_PENDING_BASIC 0x00 53#define INTC_PENDING_BANK1 0x04 54#define INTC_PENDING_BANK2 0x08 55#define INTC_FIQ_CONTROL 0x0C 56#define INTC_ENABLE_BANK1 0x10 57#define INTC_ENABLE_BANK2 0x14 58#define INTC_ENABLE_BASIC 0x18 59#define INTC_DISABLE_BANK1 0x1C 60#define INTC_DISABLE_BANK2 0x20 61#define INTC_DISABLE_BASIC 0x24 62 63#define BANK1_START 8 64#define BANK1_END (BANK1_START + 32 - 1) 65#define BANK2_START (BANK1_START + 32) 66#define BANK2_END (BANK2_START + 32 - 1) 67#define BANK3_START (BANK2_START + 32) |
| 68#define BANK3_END (BANK3_START + 32 - 1) |
|
| 64 65#define IS_IRQ_BASIC(n) (((n) >= 0) && ((n) < BANK1_START)) 66#define IS_IRQ_BANK1(n) (((n) >= BANK1_START) && ((n) <= BANK1_END)) 67#define IS_IRQ_BANK2(n) (((n) >= BANK2_START) && ((n) <= BANK2_END)) | 69 70#define IS_IRQ_BASIC(n) (((n) >= 0) && ((n) < BANK1_START)) 71#define IS_IRQ_BANK1(n) (((n) >= BANK1_START) && ((n) <= BANK1_END)) 72#define IS_IRQ_BANK2(n) (((n) >= BANK2_START) && ((n) <= BANK2_END)) |
| 73#define ID_IRQ_BCM2836(n) (((n) >= BANK3_START) && ((n) <= BANK3_END)) |
|
| 68#define IRQ_BANK1(n) ((n) - BANK1_START) 69#define IRQ_BANK2(n) ((n) - BANK2_START) 70 71#ifdef DEBUG 72#define dprintf(fmt, args...) printf(fmt, ##args) 73#else 74#define dprintf(fmt, args...) 75#endif --- 67 unchanged lines hidden (view full) --- 143DRIVER_MODULE(intc, simplebus, bcm_intc_driver, bcm_intc_devclass, 0, 0); 144 145int 146arm_get_next_irq(int last_irq) 147{ 148 struct bcm_intc_softc *sc = bcm_intc_sc; 149 uint32_t pending; 150 int32_t irq = last_irq + 1; | 74#define IRQ_BANK1(n) ((n) - BANK1_START) 75#define IRQ_BANK2(n) ((n) - BANK2_START) 76 77#ifdef DEBUG 78#define dprintf(fmt, args...) printf(fmt, ##args) 79#else 80#define dprintf(fmt, args...) 81#endif --- 67 unchanged lines hidden (view full) --- 149DRIVER_MODULE(intc, simplebus, bcm_intc_driver, bcm_intc_devclass, 0, 0); 150 151int 152arm_get_next_irq(int last_irq) 153{ 154 struct bcm_intc_softc *sc = bcm_intc_sc; 155 uint32_t pending; 156 int32_t irq = last_irq + 1; |
| 157#ifdef SOC_BCM2836 158 int ret; 159#endif |
|
| 151 152 /* Sanity check */ 153 if (irq < 0) 154 irq = 0; 155 | 160 161 /* Sanity check */ 162 if (irq < 0) 163 irq = 0; 164 |
| 165#ifdef SOC_BCM2836 166 if ((ret = bcm2836_get_next_irq(irq)) >= 0) 167 return (ret + BANK3_START); 168#endif 169 |
|
| 156 /* TODO: should we mask last_irq? */ 157 if (irq < BANK1_START) { 158 pending = intc_read_4(sc, INTC_PENDING_BASIC); 159 if ((pending & 0xFF) == 0) { 160 irq = BANK1_START; /* skip to next bank */ 161 } else do { 162 if (pending & (1 << irq)) 163 return irq; --- 28 unchanged lines hidden (view full) --- 192 dprintf("%s: %d\n", __func__, nb); 193 194 if (IS_IRQ_BASIC(nb)) 195 intc_write_4(sc, INTC_DISABLE_BASIC, (1 << nb)); 196 else if (IS_IRQ_BANK1(nb)) 197 intc_write_4(sc, INTC_DISABLE_BANK1, (1 << IRQ_BANK1(nb))); 198 else if (IS_IRQ_BANK2(nb)) 199 intc_write_4(sc, INTC_DISABLE_BANK2, (1 << IRQ_BANK2(nb))); | 170 /* TODO: should we mask last_irq? */ 171 if (irq < BANK1_START) { 172 pending = intc_read_4(sc, INTC_PENDING_BASIC); 173 if ((pending & 0xFF) == 0) { 174 irq = BANK1_START; /* skip to next bank */ 175 } else do { 176 if (pending & (1 << irq)) 177 return irq; --- 28 unchanged lines hidden (view full) --- 206 dprintf("%s: %d\n", __func__, nb); 207 208 if (IS_IRQ_BASIC(nb)) 209 intc_write_4(sc, INTC_DISABLE_BASIC, (1 << nb)); 210 else if (IS_IRQ_BANK1(nb)) 211 intc_write_4(sc, INTC_DISABLE_BANK1, (1 << IRQ_BANK1(nb))); 212 else if (IS_IRQ_BANK2(nb)) 213 intc_write_4(sc, INTC_DISABLE_BANK2, (1 << IRQ_BANK2(nb))); |
| 214#ifdef SOC_BCM2836 215 else if (ID_IRQ_BCM2836(nb)) 216 bcm2836_mask_irq(nb - BANK3_START); 217#endif |
|
| 200 else 201 printf("arm_mask_irq: Invalid IRQ number: %d\n", nb); 202} 203 204void 205arm_unmask_irq(uintptr_t nb) 206{ 207 struct bcm_intc_softc *sc = bcm_intc_sc; 208 dprintf("%s: %d\n", __func__, nb); 209 210 if (IS_IRQ_BASIC(nb)) 211 intc_write_4(sc, INTC_ENABLE_BASIC, (1 << nb)); 212 else if (IS_IRQ_BANK1(nb)) 213 intc_write_4(sc, INTC_ENABLE_BANK1, (1 << IRQ_BANK1(nb))); 214 else if (IS_IRQ_BANK2(nb)) 215 intc_write_4(sc, INTC_ENABLE_BANK2, (1 << IRQ_BANK2(nb))); | 218 else 219 printf("arm_mask_irq: Invalid IRQ number: %d\n", nb); 220} 221 222void 223arm_unmask_irq(uintptr_t nb) 224{ 225 struct bcm_intc_softc *sc = bcm_intc_sc; 226 dprintf("%s: %d\n", __func__, nb); 227 228 if (IS_IRQ_BASIC(nb)) 229 intc_write_4(sc, INTC_ENABLE_BASIC, (1 << nb)); 230 else if (IS_IRQ_BANK1(nb)) 231 intc_write_4(sc, INTC_ENABLE_BANK1, (1 << IRQ_BANK1(nb))); 232 else if (IS_IRQ_BANK2(nb)) 233 intc_write_4(sc, INTC_ENABLE_BANK2, (1 << IRQ_BANK2(nb))); |
| 234#ifdef SOC_BCM2836 235 else if (ID_IRQ_BCM2836(nb)) 236 bcm2836_unmask_irq(nb - BANK3_START); 237#endif |
|
| 216 else 217 printf("arm_mask_irq: Invalid IRQ number: %d\n", nb); 218} | 238 else 239 printf("arm_mask_irq: Invalid IRQ number: %d\n", nb); 240} |