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at91_pmc.c (185492) at91_pmc.c (210040)
1/*-
2 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.

--- 12 unchanged lines hidden (view full) ---

21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26#include "opt_at91.h"
27
28#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.

--- 12 unchanged lines hidden (view full) ---

21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26#include "opt_at91.h"
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/arm/at91/at91_pmc.c 185492 2008-11-30 22:40:11Z stas $");
29__FBSDID("$FreeBSD: head/sys/arm/at91/at91_pmc.c 210040 2010-07-14 00:48:53Z cognet $");
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/module.h>
35#include <sys/time.h>
36#include <sys/bus.h>
37#include <sys/resource.h>
38#include <sys/rman.h>
39#include <sys/timetc.h>
40
41#include <machine/bus.h>
42#include <machine/cpu.h>
43#include <machine/cpufunc.h>
44#include <machine/resource.h>
45#include <machine/frame.h>
46#include <machine/intr.h>
47#include <arm/at91/at91rm92reg.h>
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/kernel.h>
34#include <sys/module.h>
35#include <sys/time.h>
36#include <sys/bus.h>
37#include <sys/resource.h>
38#include <sys/rman.h>
39#include <sys/timetc.h>
40
41#include <machine/bus.h>
42#include <machine/cpu.h>
43#include <machine/cpufunc.h>
44#include <machine/resource.h>
45#include <machine/frame.h>
46#include <machine/intr.h>
47#include <arm/at91/at91rm92reg.h>
48#include <arm/at91/at91sam9g20reg.h>
48
49#include <arm/at91/at91_pmcreg.h>
50#include <arm/at91/at91_pmcvar.h>
51
52static struct at91_pmc_softc {
53 bus_space_tag_t sc_st;
54 bus_space_handle_t sc_sh;
55 struct resource *mem_res; /* Memory resource */

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114};
115
116static struct at91_pmc_clock mck = {
117 .name = "mck",
118 .pmc_mask = PMC_IER_MCKRDY,
119 .refcnt = 0,
120};
121
49
50#include <arm/at91/at91_pmcreg.h>
51#include <arm/at91/at91_pmcvar.h>
52
53static struct at91_pmc_softc {
54 bus_space_tag_t sc_st;
55 bus_space_handle_t sc_sh;
56 struct resource *mem_res; /* Memory resource */

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115};
116
117static struct at91_pmc_clock mck = {
118 .name = "mck",
119 .pmc_mask = PMC_IER_MCKRDY,
120 .refcnt = 0,
121};
122
123#ifdef AT91SAM9G20
124#define IRQ_UDP AT91SAM9G20_IRQ_UDP
125#define IRQ_UHP AT91SAM9G20_IRQ_UHP
126#else
127#define IRQ_UDP AT91RM92_IRQ_UDP
128#define IRQ_UHP AT91RM92_IRQ_UHP
129#endif /* AT91SAM9G20 */
130
122static struct at91_pmc_clock udc_clk = {
123 .name = "udc_clk",
124 .parent = &mck,
131static struct at91_pmc_clock udc_clk = {
132 .name = "udc_clk",
133 .parent = &mck,
125 .pmc_mask = 1 << AT91RM92_IRQ_UDP,
134 .pmc_mask = 1 << IRQ_UDP,
126 .set_mode = &at91_pmc_set_periph_mode
127};
128
129static struct at91_pmc_clock ohci_clk = {
130 .name = "ohci_clk",
131 .parent = &mck,
135 .set_mode = &at91_pmc_set_periph_mode
136};
137
138static struct at91_pmc_clock ohci_clk = {
139 .name = "ohci_clk",
140 .parent = &mck,
132 .pmc_mask = 1 << AT91RM92_IRQ_UHP,
141 .pmc_mask = 1 << IRQ_UHP,
133 .set_mode = &at91_pmc_set_periph_mode
134};
135
142 .set_mode = &at91_pmc_set_periph_mode
143};
144
145#ifdef AT91SAM9G20
146static struct at91_pmc_clock macb_clk = {
147 .name = "macb_clk",
148 .parent = &mck,
149
150 .pmc_mask = 1 << 21,
151 .set_mode = &at91_pmc_set_periph_mode
152};
153
154static struct at91_pmc_clock spi0_clk = {
155 .name = "spi0_clk",
156 .parent = &mck,
157
158 .pmc_mask = 1 << 12,
159 .set_mode = &at91_pmc_set_periph_mode
160};
161
162static struct at91_pmc_clock spi1_clk = {
163 .name = "spi1_clk",
164 .parent = &mck,
165 .pmc_mask = 1 << 13,
166 .set_mode = &at91_pmc_set_periph_mode
167};
168
169#endif /* AT91SAM9G20 */
170
136static struct at91_pmc_clock *const clock_list[] = {
137 &slck,
138 &main_ck,
139 &plla,
140 &pllb,
141 &udpck,
142 &uhpck,
143 &mck,
144 &udc_clk,
171static struct at91_pmc_clock *const clock_list[] = {
172 &slck,
173 &main_ck,
174 &plla,
175 &pllb,
176 &udpck,
177 &uhpck,
178 &mck,
179 &udc_clk,
180#ifdef AT91SAM9G20
181 &macb_clk,
182 &spi0_clk,
183 &spi1_clk,
184#endif /* AT91SAM9G20 */
145 &ohci_clk
146};
147
148#if !defined(AT91C_MAIN_CLOCK)
149static const unsigned int at91_mainf_tbl[] = {
150 3000000, 3276800, 3686400, 3840000, 4000000,
151 4433619, 4915200, 5000000, 5242880, 6000000,
152 6144000, 6400000, 6553600, 7159090, 7372800,

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252}
253
254static int
255at91_pmc_pll_rate(int freq, uint32_t reg, int is_pllb)
256{
257 uint32_t mul, div;
258
259 div = reg & 0xff;
185 &ohci_clk
186};
187
188#if !defined(AT91C_MAIN_CLOCK)
189static const unsigned int at91_mainf_tbl[] = {
190 3000000, 3276800, 3686400, 3840000, 4000000,
191 4433619, 4915200, 5000000, 5242880, 6000000,
192 6144000, 6400000, 6553600, 7159090, 7372800,

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292}
293
294static int
295at91_pmc_pll_rate(int freq, uint32_t reg, int is_pllb)
296{
297 uint32_t mul, div;
298
299 div = reg & 0xff;
300#ifdef AT91SAM9G20
301 if (is_pllb)
302 mul = (reg >> 16) & 0x3f;
303 else
304 mul = (reg >> 16) & 0xff;
305#else
260 mul = (reg >> 16) & 0x7ff;
306 mul = (reg >> 16) & 0x7ff;
307#endif
261 if (div != 0 && mul != 0) {
262 freq /= div;
263 freq *= mul + 1;
264 } else {
265 freq = 0;
266 }
308 if (div != 0 && mul != 0) {
309 freq /= div;
310 freq *= mul + 1;
311 } else {
312 freq = 0;
313 }
314#ifndef AT91SAM9G20
267 if (is_pllb && (reg & (1 << 28)))
268 freq >>= 1;
315 if (is_pllb && (reg & (1 << 28)))
316 freq >>= 1;
317#endif
269 return (freq);
270}
271
272static uint32_t
273at91_pmc_pll_calc(uint32_t main_freq, uint32_t out_freq)
274{
275 uint32_t i, div = 0, mul = 0, diff = 1 << 30;
276 unsigned ret = (out_freq > PMC_PLL_FAST_THRESH) ? 0xbe00 : 0x3e00;

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323 plla.hz = at91_pmc_pll_rate(main_clock, RD4(sc, CKGR_PLLAR), 0);
324
325 /*
326 * Initialize the usb clock. This sets up pllb, but disables the
327 * actual clock.
328 */
329 sc->pllb_init = at91_pmc_pll_calc(main_clock, 48000000 * 2) |0x10000000;
330 pllb.hz = at91_pmc_pll_rate(main_clock, sc->pllb_init, 1);
318 return (freq);
319}
320
321static uint32_t
322at91_pmc_pll_calc(uint32_t main_freq, uint32_t out_freq)
323{
324 uint32_t i, div = 0, mul = 0, diff = 1 << 30;
325 unsigned ret = (out_freq > PMC_PLL_FAST_THRESH) ? 0xbe00 : 0x3e00;

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372 plla.hz = at91_pmc_pll_rate(main_clock, RD4(sc, CKGR_PLLAR), 0);
373
374 /*
375 * Initialize the usb clock. This sets up pllb, but disables the
376 * actual clock.
377 */
378 sc->pllb_init = at91_pmc_pll_calc(main_clock, 48000000 * 2) |0x10000000;
379 pllb.hz = at91_pmc_pll_rate(main_clock, sc->pllb_init, 1);
331 WR4(sc, PMC_PCDR, (1 << AT91RM92_IRQ_UHP) | (1 << AT91RM92_IRQ_UDP));
380 WR4(sc, PMC_PCDR, (1 << IRQ_UHP) | (1 << IRQ_UDP));
332 WR4(sc, PMC_SCDR, PMC_SCER_UHP | PMC_SCER_UDP);
333 WR4(sc, CKGR_PLLBR, 0);
381 WR4(sc, PMC_SCDR, PMC_SCER_UHP | PMC_SCER_UDP);
382 WR4(sc, CKGR_PLLBR, 0);
383#ifndef AT91SAM9G20
334 WR4(sc, PMC_SCER, PMC_SCER_MCKUDP);
384 WR4(sc, PMC_SCER, PMC_SCER_MCKUDP);
385#endif
335
336 /*
337 * MCK and PCU derive from one of the primary clocks. Initialize
338 * this relationship.
339 */
340 mckr = RD4(sc, PMC_MCKR);
341 mck.parent = clock_list[mckr & 0x3];
342 mck.parent->refcnt++;

--- 119 unchanged lines hidden --- 		386
387 /*
388 * MCK and PCU derive from one of the primary clocks. Initialize
389 * this relationship.
390 */
391 mckr = RD4(sc, PMC_MCKR);
392 mck.parent = clock_list[mckr & 0x3];
393 mck.parent->refcnt++;

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