| at91_machdep.c (237115) | at91_machdep.c (237130) |
|---|---|
| 1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without --- 30 unchanged lines hidden (view full) --- 39 * Machine dependant functions for kernel setup 40 * 41 * This file needs a lot of work. 42 * 43 * Created : 17/09/94 44 */ 45 46#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without --- 30 unchanged lines hidden (view full) --- 39 * Machine dependant functions for kernel setup 40 * 41 * This file needs a lot of work. 42 * 43 * Created : 17/09/94 44 */ 45 46#include <sys/cdefs.h> |
| 47__FBSDID("$FreeBSD: head/sys/arm/at91/at91_machdep.c 237115 2012-06-15 06:38:55Z imp $"); | 47__FBSDID("$FreeBSD: head/sys/arm/at91/at91_machdep.c 237130 2012-06-15 08:37:50Z imp $"); |
| 48 49#define _ARM32_BUS_DMA_PRIVATE 50#include <sys/param.h> 51#include <sys/systm.h> 52#include <sys/sysproto.h> 53#include <sys/signalvar.h> 54#include <sys/imgact.h> 55#include <sys/kernel.h> --- 140 unchanged lines hidden (view full) --- 196 AT91SAM9G20_NAND_PA_BASE, 197 AT91SAM9G20_NAND_SIZE, 198 VM_PROT_READ|VM_PROT_WRITE, 199 PTE_NOCACHE, 200 }, 201 { 0, 0, 0, 0, 0, } 202}; 203 | 48 49#define _ARM32_BUS_DMA_PRIVATE 50#include <sys/param.h> 51#include <sys/systm.h> 52#include <sys/sysproto.h> 53#include <sys/signalvar.h> 54#include <sys/imgact.h> 55#include <sys/kernel.h> --- 140 unchanged lines hidden (view full) --- 196 AT91SAM9G20_NAND_PA_BASE, 197 AT91SAM9G20_NAND_SIZE, 198 VM_PROT_READ|VM_PROT_WRITE, 199 PTE_NOCACHE, 200 }, 201 { 0, 0, 0, 0, 0, } 202}; 203 |
| 204#ifdef LINUX_BOOT_ABI 205extern int membanks; 206extern int memstart[]; 207extern int memsize[]; 208#endif 209 |
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| 204long 205at91_ramsize(void) 206{ 207 uint32_t cr, mr; 208 int banks, rows, cols, bw; | 210long 211at91_ramsize(void) 212{ 213 uint32_t cr, mr; 214 int banks, rows, cols, bw; |
| 215#ifdef LINUX_BOOT_ABI 216 // If we found any ATAGs that were for memory, return the first bank. 217 if (membanks > 0) 218 return memsize[0]; 219#endif |
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| 209 210 if (at91_is_rm92()) { 211 uint32_t *SDRAMC = (uint32_t *)(AT91_BASE + AT91RM92_SDRAMC_BASE); 212 cr = SDRAMC[AT91RM92_SDRAMC_CR / 4]; 213 mr = SDRAMC[AT91RM92_SDRAMC_MR / 4]; 214 banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1; 215 rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11; 216 cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8; --- 371 unchanged lines hidden (view full) --- 588 589} 590 591void 592cpu_initclocks(void) 593{ 594 595} | 220 221 if (at91_is_rm92()) { 222 uint32_t *SDRAMC = (uint32_t *)(AT91_BASE + AT91RM92_SDRAMC_BASE); 223 cr = SDRAMC[AT91RM92_SDRAMC_CR / 4]; 224 mr = SDRAMC[AT91RM92_SDRAMC_MR / 4]; 225 banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1; 226 rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11; 227 cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8; --- 371 unchanged lines hidden (view full) --- 599 600} 601 602void 603cpu_initclocks(void) 604{ 605 606} |
| 607 608void 609DELAY(int n) 610{ 611 if (soc_data.delay) 612 soc_data.delay(n); 613} 614 615void 616cpu_reset(void) 617{ 618 if (soc_data.reset) 619 soc_data.reset(); 620 while (1) 621 continue; 622} |
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