| swtch-v6.S (282780) | swtch-v6.S (283366) |
|---|---|
| 1/* $NetBSD: cpuswitch.S,v 1.41 2003/11/15 08:44:18 scw Exp $ */ 2 3/*- 4 * Copyright 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford for Wasabi Systems, Inc. 8 * --- 73 unchanged lines hidden (view full) --- 82#include "opt_sched.h" 83 84#include <machine/acle-compat.h> 85#include <machine/asm.h> 86#include <machine/asmacros.h> 87#include <machine/armreg.h> 88#include <machine/vfp.h> 89 | 1/* $NetBSD: cpuswitch.S,v 1.41 2003/11/15 08:44:18 scw Exp $ */ 2 3/*- 4 * Copyright 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford for Wasabi Systems, Inc. 8 * --- 73 unchanged lines hidden (view full) --- 82#include "opt_sched.h" 83 84#include <machine/acle-compat.h> 85#include <machine/asm.h> 86#include <machine/asmacros.h> 87#include <machine/armreg.h> 88#include <machine/vfp.h> 89 |
| 90__FBSDID("$FreeBSD: head/sys/arm/arm/swtch.S 282780 2015-05-11 19:55:01Z alc $"); | 90__FBSDID("$FreeBSD: head/sys/arm/arm/swtch.S 283366 2015-05-24 12:20:11Z andrew $"); |
| 91 92#if __ARM_ARCH >= 6 && defined(SMP) 93#define GET_PCPU(tmp, tmp2) \ 94 mrc p15, 0, tmp, c0, c0, 5; \ 95 and tmp, tmp, #0xf; \ 96 ldr tmp2, .Lcurpcpu+4; \ 97 mul tmp, tmp, tmp2; \ 98 ldr tmp2, .Lcurpcpu; \ --- 39 unchanged lines hidden (view full) --- 138 */ 139 140#ifdef VFP /* This thread is dying, disable */ 141 bl _C_LABEL(vfp_discard) /* VFP without preserving state. */ 142#endif 143 144 GET_PCPU(r7, r9) 145 ldr r7, [r5, #(TD_PCB)] /* r7 = new thread's PCB */ | 91 92#if __ARM_ARCH >= 6 && defined(SMP) 93#define GET_PCPU(tmp, tmp2) \ 94 mrc p15, 0, tmp, c0, c0, 5; \ 95 and tmp, tmp, #0xf; \ 96 ldr tmp2, .Lcurpcpu+4; \ 97 mul tmp, tmp, tmp2; \ 98 ldr tmp2, .Lcurpcpu; \ --- 39 unchanged lines hidden (view full) --- 138 */ 139 140#ifdef VFP /* This thread is dying, disable */ 141 bl _C_LABEL(vfp_discard) /* VFP without preserving state. */ 142#endif 143 144 GET_PCPU(r7, r9) 145 ldr r7, [r5, #(TD_PCB)] /* r7 = new thread's PCB */ |
| 146 | 146 |
| 147 /* Switch to lwp0 context */ 148 149 ldr r9, .Lcpufuncs 150#if !defined(CPU_ARM11) && !defined(CPU_CORTEXA) && !defined(CPU_MV_PJ4B) && !defined(CPU_KRAIT) 151 mov lr, pc 152 ldr pc, [r9, #CF_IDCACHE_WBINV_ALL] 153#endif 154 ldr r0, [r7, #(PCB_PL1VEC)] --- 117 unchanged lines hidden (view full) --- 272 /* Set the new tp */ 273 ldr r9, [r1, #(TD_MD + MD_TP)] 274 str r9, [r3] 275 ldr r9, [r1, #(TD_MD + MD_RAS_START)] 276 str r9, [r3, #4] 277 ldr r9, [r1, #(TD_MD + MD_RAS_END)] 278 str r9, [r3, #8] 279#else | 147 /* Switch to lwp0 context */ 148 149 ldr r9, .Lcpufuncs 150#if !defined(CPU_ARM11) && !defined(CPU_CORTEXA) && !defined(CPU_MV_PJ4B) && !defined(CPU_KRAIT) 151 mov lr, pc 152 ldr pc, [r9, #CF_IDCACHE_WBINV_ALL] 153#endif 154 ldr r0, [r7, #(PCB_PL1VEC)] --- 117 unchanged lines hidden (view full) --- 272 /* Set the new tp */ 273 ldr r9, [r1, #(TD_MD + MD_TP)] 274 str r9, [r3] 275 ldr r9, [r1, #(TD_MD + MD_RAS_START)] 276 str r9, [r3, #4] 277 ldr r9, [r1, #(TD_MD + MD_RAS_END)] 278 str r9, [r3, #8] 279#else |
| 280 /* 281 * Set new tp. No need to store the old one first, userland can't | 280 /* 281 * Set new tp. No need to store the old one first, userland can't |
| 282 * change it directly on armv6. 283 */ 284 ldr r9, [r1, #(TD_MD + MD_TP)] 285 mcr p15, 0, r9, c13, c0, 3 286#endif | 282 * change it directly on armv6. 283 */ 284 ldr r9, [r1, #(TD_MD + MD_TP)] 285 mcr p15, 0, r9, c13, c0, 3 286#endif |
| 287 | 287 |
| 288 /* Get the user structure for the new process in r9 */ 289 ldr r9, [r1, #(TD_PCB)] 290 291 /* rem: r2 = old PCB */ 292 /* rem: r9 = new PCB */ 293 /* rem: interrupts are enabled */ 294 295#ifdef VFP --- 106 unchanged lines hidden (view full) --- 402#if defined(SCHED_ULE) && defined(SMP) 403 ldr r6, .Lblocked_lock 404 GET_CURTHREAD_PTR(r3) 4051: 406 ldr r4, [r3, #TD_LOCK] 407 cmp r4, r6 408 beq 1b 409#endif | 288 /* Get the user structure for the new process in r9 */ 289 ldr r9, [r1, #(TD_PCB)] 290 291 /* rem: r2 = old PCB */ 292 /* rem: r9 = new PCB */ 293 /* rem: interrupts are enabled */ 294 295#ifdef VFP --- 106 unchanged lines hidden (view full) --- 402#if defined(SCHED_ULE) && defined(SMP) 403 ldr r6, .Lblocked_lock 404 GET_CURTHREAD_PTR(r3) 4051: 406 ldr r4, [r3, #TD_LOCK] 407 cmp r4, r6 408 beq 1b 409#endif |
| 410 | 410 |
| 411 /* XXXSCW: Safe to re-enable FIQs here */ 412 413 /* rem: r9 = new PCB */ 414 415 /* Restore all the saved registers and exit */ 416 add r3, r9, #PCB_R4 417 ldmia r3, {r4-r12, sp, pc} 418END(cpu_switch) --- 370 unchanged lines hidden (view full) --- 789END(cpu_switch) 790 791 792#endif /* !ARM_NEW_PMAP */ 793 794ENTRY(savectx) 795 stmfd sp!, {lr} 796 sub sp, sp, #4 | 411 /* XXXSCW: Safe to re-enable FIQs here */ 412 413 /* rem: r9 = new PCB */ 414 415 /* Restore all the saved registers and exit */ 416 add r3, r9, #PCB_R4 417 ldmia r3, {r4-r12, sp, pc} 418END(cpu_switch) --- 370 unchanged lines hidden (view full) --- 789END(cpu_switch) 790 791 792#endif /* !ARM_NEW_PMAP */ 793 794ENTRY(savectx) 795 stmfd sp!, {lr} 796 sub sp, sp, #4 |
| 797 | 797 |
| 798 /* Store all the registers in the thread's pcb */ 799 add r3, r0, #(PCB_R4) 800 stmia r3, {r4-r12, sp, lr, pc} 801#ifdef VFP 802 fmrx r2, fpexc /* If the VFP is enabled */ 803 tst r2, #(VFPEXC_EN) /* the current thread has */ 804 movne r1, #1 /* used it, so go save */ 805 addne r0, r0, #(PCB_VFPSTATE) /* the state into the PCB */ --- 16 unchanged lines hidden --- | 798 /* Store all the registers in the thread's pcb */ 799 add r3, r0, #(PCB_R4) 800 stmia r3, {r4-r12, sp, lr, pc} 801#ifdef VFP 802 fmrx r2, fpexc /* If the VFP is enabled */ 803 tst r2, #(VFPEXC_EN) /* the current thread has */ 804 movne r1, #1 /* used it, so go save */ 805 addne r0, r0, #(PCB_VFPSTATE) /* the state into the PCB */ --- 16 unchanged lines hidden --- |