| busdma_machdep-v6.c (286968) | busdma_machdep-v6.c (286969) |
|---|---|
| 1/*- 2 * Copyright (c) 2012-2014 Ian Lepore 3 * Copyright (c) 2010 Mark Tinguely 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 2002 Peter Grehan 6 * Copyright (c) 1997, 1998 Justin T. Gibbs. 7 * All rights reserved. 8 * --- 17 unchanged lines hidden (view full) --- 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * From i386/busdma_machdep.c 191438 2009-04-23 20:24:19Z jhb 31 */ 32 33#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2012-2014 Ian Lepore 3 * Copyright (c) 2010 Mark Tinguely 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 2002 Peter Grehan 6 * Copyright (c) 1997, 1998 Justin T. Gibbs. 7 * All rights reserved. 8 * --- 17 unchanged lines hidden (view full) --- 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * From i386/busdma_machdep.c 191438 2009-04-23 20:24:19Z jhb 31 */ 32 33#include <sys/cdefs.h> |
| 34__FBSDID("$FreeBSD: head/sys/arm/arm/busdma_machdep-v6.c 286968 2015-08-20 19:14:16Z ian $"); | 34__FBSDID("$FreeBSD: head/sys/arm/arm/busdma_machdep-v6.c 286969 2015-08-20 19:39:15Z ian $"); |
| 35 36#define _ARM32_BUS_DMA_PRIVATE 37#include <sys/param.h> 38#include <sys/kdb.h> 39#include <ddb/ddb.h> 40#include <ddb/db_output.h> 41#include <sys/systm.h> 42#include <sys/malloc.h> --- 1333 unchanged lines hidden (view full) --- 1376 * due to accesses to other data near the dma buffer could have 1377 * brought buffer data into the caches which is now stale. The 1378 * caches are invalidated from the outermost to innermost; the 1379 * prefetches could be happening right now, and if L1 were 1380 * invalidated first, stale L2 data could be prefetched into L1. 1381 */ 1382 if (op & BUS_DMASYNC_POSTREAD) { 1383 while (bpage != NULL) { | 35 36#define _ARM32_BUS_DMA_PRIVATE 37#include <sys/param.h> 38#include <sys/kdb.h> 39#include <ddb/ddb.h> 40#include <ddb/db_output.h> 41#include <sys/systm.h> 42#include <sys/malloc.h> --- 1333 unchanged lines hidden (view full) --- 1376 * due to accesses to other data near the dma buffer could have 1377 * brought buffer data into the caches which is now stale. The 1378 * caches are invalidated from the outermost to innermost; the 1379 * prefetches could be happening right now, and if L1 were 1380 * invalidated first, stale L2 data could be prefetched into L1. 1381 */ 1382 if (op & BUS_DMASYNC_POSTREAD) { 1383 while (bpage != NULL) { |
| 1384 vm_offset_t startv; 1385 vm_paddr_t startp; 1386 int len; 1387 1388 startv = bpage->vaddr &~ arm_dcache_align_mask; 1389 startp = bpage->busaddr &~ arm_dcache_align_mask; 1390 len = bpage->datacount; 1391 1392 if (startv != bpage->vaddr) 1393 len += bpage->vaddr & arm_dcache_align_mask; 1394 if (len & arm_dcache_align_mask) 1395 len = (len - 1396 (len & arm_dcache_align_mask)) + 1397 arm_dcache_align; 1398 l2cache_inv_range(startv, startp, len); 1399 cpu_dcache_inv_range(startv, len); | 1384 l2cache_inv_range((vm_offset_t)bpage->vaddr, 1385 (vm_offset_t)bpage->busaddr, 1386 bpage->datacount); 1387 cpu_dcache_inv_range((vm_offset_t)bpage->vaddr, 1388 bpage->datacount); |
| 1400 if (bpage->datavaddr != 0) 1401 bcopy((void *)bpage->vaddr, 1402 (void *)bpage->datavaddr, 1403 bpage->datacount); 1404 else 1405 physcopyin((void *)bpage->vaddr, 1406 bpage->dataaddr, 1407 bpage->datacount); --- 346 unchanged lines hidden --- | 1389 if (bpage->datavaddr != 0) 1390 bcopy((void *)bpage->vaddr, 1391 (void *)bpage->datavaddr, 1392 bpage->datacount); 1393 else 1394 physcopyin((void *)bpage->vaddr, 1395 bpage->dataaddr, 1396 bpage->datacount); --- 346 unchanged lines hidden --- |