| busdma_machdep-v6.c (274545) | busdma_machdep-v6.c (274596) |
|---|---|
| 1/*- 2 * Copyright (c) 2012-2014 Ian Lepore 3 * Copyright (c) 2010 Mark Tinguely 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 2002 Peter Grehan 6 * Copyright (c) 1997, 1998 Justin T. Gibbs. 7 * All rights reserved. 8 * --- 17 unchanged lines hidden (view full) --- 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * From i386/busdma_machdep.c 191438 2009-04-23 20:24:19Z jhb 31 */ 32 33#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2012-2014 Ian Lepore 3 * Copyright (c) 2010 Mark Tinguely 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 2002 Peter Grehan 6 * Copyright (c) 1997, 1998 Justin T. Gibbs. 7 * All rights reserved. 8 * --- 17 unchanged lines hidden (view full) --- 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * From i386/busdma_machdep.c 191438 2009-04-23 20:24:19Z jhb 31 */ 32 33#include <sys/cdefs.h> |
| 34__FBSDID("$FreeBSD: head/sys/arm/arm/busdma_machdep-v6.c 274545 2014-11-15 05:40:20Z ian $"); | 34__FBSDID("$FreeBSD: head/sys/arm/arm/busdma_machdep-v6.c 274596 2014-11-16 20:34:14Z ian $"); |
| 35 36#define _ARM32_BUS_DMA_PRIVATE 37#include <sys/param.h> 38#include <sys/kdb.h> 39#include <ddb/ddb.h> 40#include <ddb/db_output.h> 41#include <sys/systm.h> 42#include <sys/malloc.h> --- 1288 unchanged lines hidden (view full) --- 1331 bcopy((void *)bpage->datavaddr, 1332 (void *)bpage->vaddr, 1333 bpage->datacount); 1334 else 1335 physcopyout(bpage->dataaddr, 1336 (void *)bpage->vaddr, 1337 bpage->datacount); 1338 cpu_dcache_wb_range((vm_offset_t)bpage->vaddr, | 35 36#define _ARM32_BUS_DMA_PRIVATE 37#include <sys/param.h> 38#include <sys/kdb.h> 39#include <ddb/ddb.h> 40#include <ddb/db_output.h> 41#include <sys/systm.h> 42#include <sys/malloc.h> --- 1288 unchanged lines hidden (view full) --- 1331 bcopy((void *)bpage->datavaddr, 1332 (void *)bpage->vaddr, 1333 bpage->datacount); 1334 else 1335 physcopyout(bpage->dataaddr, 1336 (void *)bpage->vaddr, 1337 bpage->datacount); 1338 cpu_dcache_wb_range((vm_offset_t)bpage->vaddr, |
| 1339 bpage->datacount); | 1339 bpage->datacount); |
| 1340 l2cache_wb_range((vm_offset_t)bpage->vaddr, 1341 (vm_offset_t)bpage->busaddr, 1342 bpage->datacount); 1343 bpage = STAILQ_NEXT(bpage, links); 1344 } 1345 dmat->bounce_zone->total_bounced++; 1346 } 1347 --- 37 unchanged lines hidden (view full) --- 1385 bpage = STAILQ_NEXT(bpage, links); 1386 } 1387 dmat->bounce_zone->total_bounced++; 1388 } 1389 } 1390 1391 /* 1392 * For COHERENT memory no cache maintenance is necessary, but ensure all | 1340 l2cache_wb_range((vm_offset_t)bpage->vaddr, 1341 (vm_offset_t)bpage->busaddr, 1342 bpage->datacount); 1343 bpage = STAILQ_NEXT(bpage, links); 1344 } 1345 dmat->bounce_zone->total_bounced++; 1346 } 1347 --- 37 unchanged lines hidden (view full) --- 1385 bpage = STAILQ_NEXT(bpage, links); 1386 } 1387 dmat->bounce_zone->total_bounced++; 1388 } 1389 } 1390 1391 /* 1392 * For COHERENT memory no cache maintenance is necessary, but ensure all |
| 1393 * writes have reached memory for the PREWRITE case. | 1393 * writes have reached memory for the PREWRITE case. No action is 1394 * needed for a PREREAD without PREWRITE also set, because that would 1395 * imply that the cpu had written to the COHERENT buffer and expected 1396 * the dma device to see that change, and by definition a PREWRITE sync 1397 * is required to make that happen. |
| 1394 */ 1395 if (map->flags & DMAMAP_COHERENT) { 1396 if (op & BUS_DMASYNC_PREWRITE) { | 1398 */ 1399 if (map->flags & DMAMAP_COHERENT) { 1400 if (op & BUS_DMASYNC_PREWRITE) { |
| 1397 dsb(); 1398 cpu_l2cache_drain_writebuf(); | 1401 dsb(); 1402 cpu_l2cache_drain_writebuf(); |
| 1399 } 1400 return; 1401 } 1402 1403 if (map->sync_count != 0) { 1404 if (!pmap_dmap_iscurrent(map->pmap)) 1405 panic("_bus_dmamap_sync: wrong user map for sync."); 1406 /* ARM caches are not self-snooping for dma */ --- 296 unchanged lines hidden --- | 1403 } 1404 return; 1405 } 1406 1407 if (map->sync_count != 0) { 1408 if (!pmap_dmap_iscurrent(map->pmap)) 1409 panic("_bus_dmamap_sync: wrong user map for sync."); 1410 /* ARM caches are not self-snooping for dma */ --- 296 unchanged lines hidden --- |