| a10_mmc.c (308324) | a10_mmc.c (309756) |
|---|---|
| 1/*- 2 * Copyright (c) 2013 Alexander Fedorov 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2013 Alexander Fedorov 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: stable/11/sys/arm/allwinner/a10_mmc.c 308324 2016-11-05 04:17:32Z mmel $"); | 28__FBSDID("$FreeBSD: stable/11/sys/arm/allwinner/a10_mmc.c 309756 2016-12-09 20:07:01Z manu $"); |
| 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/kernel.h> 34#include <sys/lock.h> 35#include <sys/malloc.h> 36#include <sys/module.h> --- 16 unchanged lines hidden (view full) --- 53#include <dev/extres/hwreset/hwreset.h> 54 55#define A10_MMC_MEMRES 0 56#define A10_MMC_IRQRES 1 57#define A10_MMC_RESSZ 2 58#define A10_MMC_DMA_SEGS ((MAXPHYS / PAGE_SIZE) + 1) 59#define A10_MMC_DMA_MAX_SIZE 0x2000 60#define A10_MMC_DMA_FTRGLEVEL 0x20070008 | 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/kernel.h> 34#include <sys/lock.h> 35#include <sys/malloc.h> 36#include <sys/module.h> --- 16 unchanged lines hidden (view full) --- 53#include <dev/extres/hwreset/hwreset.h> 54 55#define A10_MMC_MEMRES 0 56#define A10_MMC_IRQRES 1 57#define A10_MMC_RESSZ 2 58#define A10_MMC_DMA_SEGS ((MAXPHYS / PAGE_SIZE) + 1) 59#define A10_MMC_DMA_MAX_SIZE 0x2000 60#define A10_MMC_DMA_FTRGLEVEL 0x20070008 |
| 61#define A10_MMC_RESET_RETRY 1000 |
|
| 61 62#define CARD_ID_FREQUENCY 400000 63 64static struct ofw_compat_data compat_data[] = { 65 {"allwinner,sun4i-a10-mmc", 1}, 66 {"allwinner,sun5i-a13-mmc", 1}, 67 {NULL, 0} 68}; --- 155 unchanged lines hidden (view full) --- 224 device_printf(sc->a10_dev, "Couldn't setup DMA!\n"); 225 goto fail; 226 } 227 228 if (OF_getencprop(node, "bus-width", &bus_width, sizeof(uint32_t)) <= 0) 229 bus_width = 4; 230 231 sc->a10_host.f_min = 400000; | 62 63#define CARD_ID_FREQUENCY 400000 64 65static struct ofw_compat_data compat_data[] = { 66 {"allwinner,sun4i-a10-mmc", 1}, 67 {"allwinner,sun5i-a13-mmc", 1}, 68 {NULL, 0} 69}; --- 155 unchanged lines hidden (view full) --- 225 device_printf(sc->a10_dev, "Couldn't setup DMA!\n"); 226 goto fail; 227 } 228 229 if (OF_getencprop(node, "bus-width", &bus_width, sizeof(uint32_t)) <= 0) 230 bus_width = 4; 231 232 sc->a10_host.f_min = 400000; |
| 232 sc->a10_host.f_max = 50000000; | 233 sc->a10_host.f_max = 52000000; |
| 233 sc->a10_host.host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; 234 sc->a10_host.mode = mode_sd; 235 sc->a10_host.caps = MMC_CAP_HSPEED; 236 if (bus_width >= 4) 237 sc->a10_host.caps |= MMC_CAP_4_BIT_DATA; 238 if (bus_width >= 8) 239 sc->a10_host.caps |= MMC_CAP_8_BIT_DATA; 240 --- 203 unchanged lines hidden (view full) --- 444 return (0); 445} 446 447static void 448a10_mmc_req_done(struct a10_mmc_softc *sc) 449{ 450 struct mmc_command *cmd; 451 struct mmc_request *req; | 234 sc->a10_host.host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; 235 sc->a10_host.mode = mode_sd; 236 sc->a10_host.caps = MMC_CAP_HSPEED; 237 if (bus_width >= 4) 238 sc->a10_host.caps |= MMC_CAP_4_BIT_DATA; 239 if (bus_width >= 8) 240 sc->a10_host.caps |= MMC_CAP_8_BIT_DATA; 241 --- 203 unchanged lines hidden (view full) --- 445 return (0); 446} 447 448static void 449a10_mmc_req_done(struct a10_mmc_softc *sc) 450{ 451 struct mmc_command *cmd; 452 struct mmc_request *req; |
| 453 uint32_t val, mask; 454 int retry; |
|
| 452 453 cmd = sc->a10_req->cmd; 454 if (cmd->error != MMC_ERR_NONE) { | 455 456 cmd = sc->a10_req->cmd; 457 if (cmd->error != MMC_ERR_NONE) { |
| 455 /* Reset the controller. */ 456 a10_mmc_reset(sc); | 458 /* Reset the FIFO and DMA engines. */ 459 mask = A10_MMC_CTRL_FIFO_RST | A10_MMC_CTRL_DMA_RST; 460 val = A10_MMC_READ_4(sc, A10_MMC_GCTL); 461 A10_MMC_WRITE_4(sc, A10_MMC_GCTL, val | mask); 462 463 retry = A10_MMC_RESET_RETRY; 464 while (--retry > 0) { 465 val = A10_MMC_READ_4(sc, A10_MMC_GCTL); 466 if ((val & mask) == 0) 467 break; 468 DELAY(10); 469 } 470 if (retry == 0) 471 device_printf(sc->a10_dev, 472 "timeout resetting DMA/FIFO\n"); 473 a10_mmc_update_clock(sc, 1); |
| 457 } 458 459 req = sc->a10_req; 460 callout_stop(&sc->a10_timeoutc); 461 sc->a10_req = NULL; 462 sc->a10_intr = 0; 463 sc->a10_resid = 0; 464 sc->a10_dma_map_err = 0; --- 441 unchanged lines hidden --- | 474 } 475 476 req = sc->a10_req; 477 callout_stop(&sc->a10_timeoutc); 478 sc->a10_req = NULL; 479 sc->a10_intr = 0; 480 sc->a10_resid = 0; 481 sc->a10_dma_map_err = 0; --- 441 unchanged lines hidden --- |