| vmcs.h (249879) | vmcs.h (256072) |
|---|---|
| 1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/amd64/vmm/intel/vmcs.h 249879 2013-04-25 04:56:43Z grehan $ | 26 * $FreeBSD: head/sys/amd64/vmm/intel/vmcs.h 256072 2013-10-05 21:22:35Z neel $ |
| 27 */ 28 29#ifndef _VMCS_H_ 30#define _VMCS_H_ 31 32#ifdef _KERNEL 33struct vmcs { 34 uint32_t identifier; --- 7 unchanged lines hidden (view full) --- 42 uint32_t index; 43 uint32_t reserved; 44 uint64_t val; 45 46}; 47 48int vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count); 49int vmcs_set_defaults(struct vmcs *vmcs, u_long host_rip, u_long host_rsp, | 27 */ 28 29#ifndef _VMCS_H_ 30#define _VMCS_H_ 31 32#ifdef _KERNEL 33struct vmcs { 34 uint32_t identifier; --- 7 unchanged lines hidden (view full) --- 42 uint32_t index; 43 uint32_t reserved; 44 uint64_t val; 45 46}; 47 48int vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count); 49int vmcs_set_defaults(struct vmcs *vmcs, u_long host_rip, u_long host_rsp, |
| 50 u_long ept_pml4, | 50 uint64_t eptp, |
| 51 uint32_t pinbased_ctls, uint32_t procbased_ctls, 52 uint32_t procbased_ctls2, uint32_t exit_ctls, 53 uint32_t entry_ctls, u_long msr_bitmap, 54 uint16_t vpid); 55int vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *rv); 56int vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val); 57int vmcs_getdesc(struct vmcs *vmcs, int ident, 58 struct seg_desc *desc); --- 4 unchanged lines hidden (view full) --- 63#define vmexit_instruction_length() vmcs_read(VMCS_EXIT_INSTRUCTION_LENGTH) 64#define vmcs_guest_rip() vmcs_read(VMCS_GUEST_RIP) 65#define vmcs_instruction_error() vmcs_read(VMCS_INSTRUCTION_ERROR) 66#define vmcs_exit_reason() (vmcs_read(VMCS_EXIT_REASON) & 0xffff) 67#define vmcs_exit_qualification() vmcs_read(VMCS_EXIT_QUALIFICATION) 68#define vmcs_guest_cr3() vmcs_read(VMCS_GUEST_CR3) 69#define vmcs_gpa() vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS) 70#define vmcs_gla() vmcs_read(VMCS_GUEST_LINEAR_ADDRESS) | 51 uint32_t pinbased_ctls, uint32_t procbased_ctls, 52 uint32_t procbased_ctls2, uint32_t exit_ctls, 53 uint32_t entry_ctls, u_long msr_bitmap, 54 uint16_t vpid); 55int vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *rv); 56int vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val); 57int vmcs_getdesc(struct vmcs *vmcs, int ident, 58 struct seg_desc *desc); --- 4 unchanged lines hidden (view full) --- 63#define vmexit_instruction_length() vmcs_read(VMCS_EXIT_INSTRUCTION_LENGTH) 64#define vmcs_guest_rip() vmcs_read(VMCS_GUEST_RIP) 65#define vmcs_instruction_error() vmcs_read(VMCS_INSTRUCTION_ERROR) 66#define vmcs_exit_reason() (vmcs_read(VMCS_EXIT_REASON) & 0xffff) 67#define vmcs_exit_qualification() vmcs_read(VMCS_EXIT_QUALIFICATION) 68#define vmcs_guest_cr3() vmcs_read(VMCS_GUEST_CR3) 69#define vmcs_gpa() vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS) 70#define vmcs_gla() vmcs_read(VMCS_GUEST_LINEAR_ADDRESS) |
| 71#define vmcs_idt_vectoring_info() vmcs_read(VMCS_IDT_VECTORING_INFO) 72#define vmcs_idt_vectoring_err() vmcs_read(VMCS_IDT_VECTORING_ERROR) |
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| 71 72#endif /* _KERNEL */ 73 74#define VMCS_INITIAL 0xffffffffffffffff 75 76#define VMCS_IDENT(encoding) ((encoding) | 0x80000000) 77/* 78 * VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B. --- 230 unchanged lines hidden (view full) --- 309/* 310 * VMCS interrupt information fields 311 */ 312#define VMCS_INTERRUPTION_INFO_VALID (1U << 31) 313#define VMCS_INTERRUPTION_INFO_HW_INTR (0 << 8) 314#define VMCS_INTERRUPTION_INFO_NMI (2 << 8) 315 316/* | 73 74#endif /* _KERNEL */ 75 76#define VMCS_INITIAL 0xffffffffffffffff 77 78#define VMCS_IDENT(encoding) ((encoding) | 0x80000000) 79/* 80 * VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B. --- 230 unchanged lines hidden (view full) --- 311/* 312 * VMCS interrupt information fields 313 */ 314#define VMCS_INTERRUPTION_INFO_VALID (1U << 31) 315#define VMCS_INTERRUPTION_INFO_HW_INTR (0 << 8) 316#define VMCS_INTERRUPTION_INFO_NMI (2 << 8) 317 318/* |
| 319 * VMCS IDT-Vectoring information fields 320 */ 321#define VMCS_IDT_VEC_VALID (1 << 31) 322#define VMCS_IDT_VEC_ERRCODE_VALID (1 << 11) 323 324/* |
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| 317 * VMCS Guest interruptibility field 318 */ 319#define VMCS_INTERRUPTIBILITY_STI_BLOCKING (1 << 0) 320#define VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING (1 << 1) 321#define VMCS_INTERRUPTIBILITY_SMI_BLOCKING (1 << 2) 322#define VMCS_INTERRUPTIBILITY_NMI_BLOCKING (1 << 3) 323 324/* 325 * Exit qualification for EXIT_REASON_INVAL_VMCS 326 */ 327#define EXIT_QUAL_NMI_WHILE_STI_BLOCKING 3 328 329/* 330 * Exit qualification for EPT violation 331 */ 332#define EPT_VIOLATION_DATA_READ (1UL << 0) 333#define EPT_VIOLATION_DATA_WRITE (1UL << 1) 334#define EPT_VIOLATION_INST_FETCH (1UL << 2) | 325 * VMCS Guest interruptibility field 326 */ 327#define VMCS_INTERRUPTIBILITY_STI_BLOCKING (1 << 0) 328#define VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING (1 << 1) 329#define VMCS_INTERRUPTIBILITY_SMI_BLOCKING (1 << 2) 330#define VMCS_INTERRUPTIBILITY_NMI_BLOCKING (1 << 3) 331 332/* 333 * Exit qualification for EXIT_REASON_INVAL_VMCS 334 */ 335#define EXIT_QUAL_NMI_WHILE_STI_BLOCKING 3 336 337/* 338 * Exit qualification for EPT violation 339 */ 340#define EPT_VIOLATION_DATA_READ (1UL << 0) 341#define EPT_VIOLATION_DATA_WRITE (1UL << 1) 342#define EPT_VIOLATION_INST_FETCH (1UL << 2) |
| 343#define EPT_VIOLATION_GPA_READABLE (1UL << 3) 344#define EPT_VIOLATION_GPA_WRITEABLE (1UL << 4) 345#define EPT_VIOLATION_GPA_EXECUTABLE (1UL << 5) |
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| 335#define EPT_VIOLATION_GLA_VALID (1UL << 7) 336#define EPT_VIOLATION_XLAT_VALID (1UL << 8) 337 338#endif | 346#define EPT_VIOLATION_GLA_VALID (1UL << 7) 347#define EPT_VIOLATION_XLAT_VALID (1UL << 8) 348 349#endif |