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cpufunc.h (113734) cpufunc.h (114349)
1/*-
2 * Copyright (c) 1993 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
1/*-
2 * Copyright (c) 1993 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: head/sys/amd64/include/cpufunc.h 113728 2003-04-20 01:35:21Z davidxu $
33 * $FreeBSD: head/sys/amd64/include/cpufunc.h 114349 2003-05-01 01:05:25Z peter $
34 */
35
36/*
37 * Functions to provide access to special i386 instructions.
38 * This in included in sys/systm.h, and that file should be
39 * used in preference to this.
40 */
41

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47
48struct thread;
49struct region_descriptor;
50
51__BEGIN_DECLS
52#define readb(va) (*(volatile u_int8_t *) (va))
53#define readw(va) (*(volatile u_int16_t *) (va))
54#define readl(va) (*(volatile u_int32_t *) (va))
34 */
35
36/*
37 * Functions to provide access to special i386 instructions.
38 * This in included in sys/systm.h, and that file should be
39 * used in preference to this.
40 */
41

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47
48struct thread;
49struct region_descriptor;
50
51__BEGIN_DECLS
52#define readb(va) (*(volatile u_int8_t *) (va))
53#define readw(va) (*(volatile u_int16_t *) (va))
54#define readl(va) (*(volatile u_int32_t *) (va))
55#define readq(va) (*(volatile u_int64_t *) (va))
55
56#define writeb(va, d) (*(volatile u_int8_t *) (va) = (d))
57#define writew(va, d) (*(volatile u_int16_t *) (va) = (d))
58#define writel(va, d) (*(volatile u_int32_t *) (va) = (d))
56
57#define writeb(va, d) (*(volatile u_int8_t *) (va) = (d))
58#define writew(va, d) (*(volatile u_int16_t *) (va) = (d))
59#define writel(va, d) (*(volatile u_int32_t *) (va) = (d))
60#define writeq(va, d) (*(volatile u_int64_t *) (va) = (d))
59
60#ifdef __GNUC__
61
62static __inline void
63breakpoint(void)
64{
65 __asm __volatile("int $3");
66}

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305}
306
307static __inline void
308ia32_pause(void)
309{
310 __asm __volatile("pause");
311}
312
61
62#ifdef __GNUC__
63
64static __inline void
65breakpoint(void)
66{
67 __asm __volatile("int $3");
68}

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307}
308
309static __inline void
310ia32_pause(void)
311{
312 __asm __volatile("pause");
313}
314
313static __inline u_int
314read_eflags(void)
315static __inline u_long
316read_rflags(void)
315{
317{
316 u_int ef;
318 u_long rf;
317
319
318 __asm __volatile("pushfl; popl %0" : "=r" (ef));
319 return (ef);
320 __asm __volatile("pushfq; popq %0" : "=r" (rf));
321 return (rf);
320}
321
322static __inline u_int64_t
323rdmsr(u_int msr)
324{
322}
323
324static __inline u_int64_t
325rdmsr(u_int msr)
326{
325 u_int64_t rv;
327 u_int32_t low, high;
326
328
327 __asm __volatile("rdmsr" : "=A" (rv) : "c" (msr));
328 return (rv);
329 __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr));
330 return (low | ((u_int64_t)high << 32));
329}
330
331static __inline u_int64_t
332rdpmc(u_int pmc)
333{
331}
332
333static __inline u_int64_t
334rdpmc(u_int pmc)
335{
334 u_int64_t rv;
336 u_int32_t low, high;
335
337
336 __asm __volatile("rdpmc" : "=A" (rv) : "c" (pmc));
337 return (rv);
338 __asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc));
339 return (low | ((u_int64_t)high << 32));
338}
339
340static __inline u_int64_t
341rdtsc(void)
342{
340}
341
342static __inline u_int64_t
343rdtsc(void)
344{
343 u_int64_t rv;
345 u_int32_t low, high;
344
346
345 __asm __volatile("rdtsc" : "=A" (rv));
346 return (rv);
347 __asm __volatile("rdtsc" : "=a" (low), "=d" (high));
348 return (low | ((u_int64_t)high << 32));
347}
348
349static __inline void
350wbinvd(void)
351{
352 __asm __volatile("wbinvd");
353}
354
355static __inline void
349}
350
351static __inline void
352wbinvd(void)
353{
354 __asm __volatile("wbinvd");
355}
356
357static __inline void
356write_eflags(u_int ef)
358write_rflags(u_long rf)
357{
359{
358 __asm __volatile("pushl %0; popfl" : : "r" (ef));
360 __asm __volatile("pushq %0; popfq" : : "r" (rf));
359}
360
361static __inline void
362wrmsr(u_int msr, u_int64_t newval)
363{
361}
362
363static __inline void
364wrmsr(u_int msr, u_int64_t newval)
365{
364 __asm __volatile("wrmsr" : : "A" (newval), "c" (msr));
366 u_int32_t low, high;
367
368 low = newval;
369 high = newval >> 32;
370 __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr));
365}
366
367static __inline void
371}
372
373static __inline void
368load_cr0(u_int data)
374load_cr0(u_long data)
369{
370
375{
376
371 __asm __volatile("movl %0,%%cr0" : : "r" (data));
377 __asm __volatile("movq %0,%%cr0" : : "r" (data));
372}
373
378}
379
374static __inline u_int
380static __inline u_long
375rcr0(void)
376{
381rcr0(void)
382{
377 u_int data;
383 u_long data;
378
384
379 __asm __volatile("movl %%cr0,%0" : "=r" (data));
385 __asm __volatile("movq %%cr0,%0" : "=r" (data));
380 return (data);
381}
382
386 return (data);
387}
388
383static __inline u_int
389static __inline u_long
384rcr2(void)
385{
390rcr2(void)
391{
386 u_int data;
392 u_long data;
387
393
388 __asm __volatile("movl %%cr2,%0" : "=r" (data));
394 __asm __volatile("movq %%cr2,%0" : "=r" (data));
389 return (data);
390}
391
392static __inline void
395 return (data);
396}
397
398static __inline void
393load_cr3(u_int data)
399load_cr3(u_long data)
394{
395
400{
401
396 __asm __volatile("movl %0,%%cr3" : : "r" (data) : "memory");
402 __asm __volatile("movq %0,%%cr3" : : "r" (data) : "memory");
397}
398
403}
404
399static __inline u_int
405static __inline u_long
400rcr3(void)
401{
406rcr3(void)
407{
402 u_int data;
408 u_long data;
403
409
404 __asm __volatile("movl %%cr3,%0" : "=r" (data));
410 __asm __volatile("movq %%cr3,%0" : "=r" (data));
405 return (data);
406}
407
408static __inline void
411 return (data);
412}
413
414static __inline void
409load_cr4(u_int data)
415load_cr4(u_long data)
410{
416{
411 __asm __volatile("movl %0,%%cr4" : : "r" (data));
417 __asm __volatile("movq %0,%%cr4" : : "r" (data));
412}
413
418}
419
414static __inline u_int
420static __inline u_long
415rcr4(void)
416{
421rcr4(void)
422{
417 u_int data;
423 u_long data;
418
424
419 __asm __volatile("movl %%cr4,%0" : "=r" (data));
425 __asm __volatile("movq %%cr4,%0" : "=r" (data));
420 return (data);
421}
422
423/*
424 * Global TLB flush (except for thise for pages marked PG_G)
425 */
426static __inline void
427invltlb(void)
428{
429
430 load_cr3(rcr3());
431}
432
433/*
434 * TLB flush for an individual page (even if it has PG_G).
435 * Only works on 486+ CPUs (i386 does not have PG_G).
436 */
437static __inline void
426 return (data);
427}
428
429/*
430 * Global TLB flush (except for thise for pages marked PG_G)
431 */
432static __inline void
433invltlb(void)
434{
435
436 load_cr3(rcr3());
437}
438
439/*
440 * TLB flush for an individual page (even if it has PG_G).
441 * Only works on 486+ CPUs (i386 does not have PG_G).
442 */
443static __inline void
438invlpg(u_int addr)
444invlpg(u_long addr)
439{
440
441 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
442}
443
445{
446
447 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
448}
449
450/* XXX these are replaced with rdmsr/wrmsr */
444static __inline u_int
445rfs(void)
446{
447 u_int sel;
448 __asm __volatile("movl %%fs,%0" : "=rm" (sel));
449 return (sel);
450}
451

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485
486/* void ltr(u_short sel); */
487static __inline void
488ltr(u_short sel)
489{
490 __asm __volatile("ltr %0" : : "r" (sel));
491}
492
451static __inline u_int
452rfs(void)
453{
454 u_int sel;
455 __asm __volatile("movl %%fs,%0" : "=rm" (sel));
456 return (sel);
457}
458

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492
493/* void ltr(u_short sel); */
494static __inline void
495ltr(u_short sel)
496{
497 __asm __volatile("ltr %0" : : "r" (sel));
498}
499
493static __inline u_int
494rdr0(void)
495{
496 u_int data;
497 __asm __volatile("movl %%dr0,%0" : "=r" (data));
498 return (data);
499}
500
501static __inline void
502load_dr0(u_int dr0)
503{
504 __asm __volatile("movl %0,%%dr0" : : "r" (dr0));
505}
506
507static __inline u_int
508rdr1(void)
509{
510 u_int data;
511 __asm __volatile("movl %%dr1,%0" : "=r" (data));
512 return (data);
513}
514
515static __inline void
516load_dr1(u_int dr1)
517{
518 __asm __volatile("movl %0,%%dr1" : : "r" (dr1));
519}
520
521static __inline u_int
522rdr2(void)
523{
524 u_int data;
525 __asm __volatile("movl %%dr2,%0" : "=r" (data));
526 return (data);
527}
528
529static __inline void
530load_dr2(u_int dr2)
531{
532 __asm __volatile("movl %0,%%dr2" : : "r" (dr2));
533}
534
535static __inline u_int
536rdr3(void)
537{
538 u_int data;
539 __asm __volatile("movl %%dr3,%0" : "=r" (data));
540 return (data);
541}
542
543static __inline void
544load_dr3(u_int dr3)
545{
546 __asm __volatile("movl %0,%%dr3" : : "r" (dr3));
547}
548
549static __inline u_int
550rdr4(void)
551{
552 u_int data;
553 __asm __volatile("movl %%dr4,%0" : "=r" (data));
554 return (data);
555}
556
557static __inline void
558load_dr4(u_int dr4)
559{
560 __asm __volatile("movl %0,%%dr4" : : "r" (dr4));
561}
562
563static __inline u_int
564rdr5(void)
565{
566 u_int data;
567 __asm __volatile("movl %%dr5,%0" : "=r" (data));
568 return (data);
569}
570
571static __inline void
572load_dr5(u_int dr5)
573{
574 __asm __volatile("movl %0,%%dr5" : : "r" (dr5));
575}
576
577static __inline u_int
578rdr6(void)
579{
580 u_int data;
581 __asm __volatile("movl %%dr6,%0" : "=r" (data));
582 return (data);
583}
584
585static __inline void
586load_dr6(u_int dr6)
587{
588 __asm __volatile("movl %0,%%dr6" : : "r" (dr6));
589}
590
591static __inline u_int
592rdr7(void)
593{
594 u_int data;
595 __asm __volatile("movl %%dr7,%0" : "=r" (data));
596 return (data);
597}
598
599static __inline void
600load_dr7(u_int dr7)
601{
602 __asm __volatile("movl %0,%%dr7" : : "r" (dr7));
603}
604
605static __inline register_t
606intr_disable(void)
607{
500static __inline register_t
501intr_disable(void)
502{
608 register_t eflags;
503 register_t rflags;
609
504
610 eflags = read_eflags();
505 rflags = read_rflags();
611 disable_intr();
506 disable_intr();
612 return (eflags);
507 return (rflags);
613}
614
615static __inline void
508}
509
510static __inline void
616intr_restore(register_t eflags)
511intr_restore(register_t rflags)
617{
512{
618 write_eflags(eflags);
513 write_rflags(rflags);
619}
620
621#else /* !__GNUC__ */
622
623int breakpoint(void);
624u_int bsfl(u_int mask);
625u_int bsrl(u_int mask);
514}
515
516#else /* !__GNUC__ */
517
518int breakpoint(void);
519u_int bsfl(u_int mask);
520u_int bsrl(u_int mask);
626void cpu_invlpg(u_int addr);
627void cpu_invlpg_range(u_int start, u_int end);
521void cpu_invlpg(u_long addr);
522void cpu_invlpg_range(u_long start, u_long end);
628void disable_intr(void);
629void do_cpuid(u_int ax, u_int *p);
630void enable_intr(void);
631void halt(void);
632u_char inb(u_int port);
633u_int inl(u_int port);
634void insb(u_int port, void *addr, size_t cnt);
635void insl(u_int port, void *addr, size_t cnt);

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659u_int rcr2(void);
660u_int rcr3(void);
661u_int rcr4(void);
662u_int rfs(void);
663u_int rgs(void);
664u_int64_t rdmsr(u_int msr);
665u_int64_t rdpmc(u_int pmc);
666u_int64_t rdtsc(void);
523void disable_intr(void);
524void do_cpuid(u_int ax, u_int *p);
525void enable_intr(void);
526void halt(void);
527u_char inb(u_int port);
528u_int inl(u_int port);
529void insb(u_int port, void *addr, size_t cnt);
530void insl(u_int port, void *addr, size_t cnt);

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554u_int rcr2(void);
555u_int rcr3(void);
556u_int rcr4(void);
557u_int rfs(void);
558u_int rgs(void);
559u_int64_t rdmsr(u_int msr);
560u_int64_t rdpmc(u_int pmc);
561u_int64_t rdtsc(void);
667u_int read_eflags(void);
562u_int read_rflags(void);
668void wbinvd(void);
563void wbinvd(void);
669void write_eflags(u_int ef);
564void write_rflags(u_int rf);
670void wrmsr(u_int msr, u_int64_t newval);
565void wrmsr(u_int msr, u_int64_t newval);
671u_int rdr0(void);
672void load_dr0(u_int dr0);
673u_int rdr1(void);
674void load_dr1(u_int dr1);
675u_int rdr2(void);
676void load_dr2(u_int dr2);
677u_int rdr3(void);
678void load_dr3(u_int dr3);
679u_int rdr4(void);
680void load_dr4(u_int dr4);
681u_int rdr5(void);
682void load_dr5(u_int dr5);
683u_int rdr6(void);
684void load_dr6(u_int dr6);
685u_int rdr7(void);
686void load_dr7(u_int dr7);
687register_t intr_disable(void);
566void load_dr7(u_int dr7);
567register_t intr_disable(void);
688void intr_restore(register_t ef);
568void intr_restore(register_t rf);
689
690#endif /* __GNUC__ */
691
692void reset_dbregs(void);
693
694__END_DECLS
695
696#endif /* !_MACHINE_CPUFUNC_H_ */
569
570#endif /* __GNUC__ */
571
572void reset_dbregs(void);
573
574__END_DECLS
575
576#endif /* !_MACHINE_CPUFUNC_H_ */