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db_disasm.c (238109) db_disasm.c (238166)
1/*-
2 * Mach Operating System
3 * Copyright (c) 1991,1990 Carnegie Mellon University
4 * All Rights Reserved.
5 *
6 * Permission to use, copy, modify and distribute this software and its
7 * documentation is hereby granted, provided that both the copyright
8 * notice and this permission notice appear in all copies of the

--- 11 unchanged lines hidden (view full) ---

20 * Carnegie Mellon University
21 * Pittsburgh PA 15213-3890
22 *
23 * any improvements or extensions that they make and grant Carnegie the
24 * rights to redistribute these changes.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Mach Operating System
3 * Copyright (c) 1991,1990 Carnegie Mellon University
4 * All Rights Reserved.
5 *
6 * Permission to use, copy, modify and distribute this software and its
7 * documentation is hereby granted, provided that both the copyright
8 * notice and this permission notice appear in all copies of the

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20 * Carnegie Mellon University
21 * Pittsburgh PA 15213-3890
22 *
23 * any improvements or extensions that they make and grant Carnegie the
24 * rights to redistribute these changes.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/amd64/amd64/db_disasm.c 238109 2012-07-04 16:47:39Z jhb $");
28__FBSDID("$FreeBSD: head/sys/amd64/amd64/db_disasm.c 238166 2012-07-06 14:25:59Z jhb $");
29
30/*
31 * Instruction disassembler.
32 */
33#include <sys/param.h>
29
30/*
31 * Instruction disassembler.
32 */
33#include <sys/param.h>
34#include <sys/libkern.h>
34
35#include <ddb/ddb.h>
36#include <ddb/db_access.h>
37#include <ddb/db_sym.h>
38
39/*
40 * Size attributes
41 */
42#define BYTE 0
43#define WORD 1
44#define LONG 2
45#define QUAD 3
46#define SNGL 4
47#define DBLR 5
48#define EXTR 6
49#define SDEP 7
35
36#include <ddb/ddb.h>
37#include <ddb/db_access.h>
38#include <ddb/db_sym.h>
39
40/*
41 * Size attributes
42 */
43#define BYTE 0
44#define WORD 1
45#define LONG 2
46#define QUAD 3
47#define SNGL 4
48#define DBLR 5
49#define EXTR 6
50#define SDEP 7
50#define NONE 8
51#define ADEP 8
52#define ESC 9
53#define NONE 10
51
52/*
53 * REX prefix and bits
54 */
55#define REX_B 1
56#define REX_X 2
57#define REX_R 4
58#define REX_W 8
59#define REX 0x40
60
61/*
62 * Addressing modes
63 */
64#define E 1 /* general effective address */
65#define Eind 2 /* indirect address (jump, call) */
66#define Ew 3 /* address, word size */
67#define Eb 4 /* address, byte size */
68#define R 5 /* register, in 'reg' field */
69#define Rw 6 /* word register, in 'reg' field */
54
55/*
56 * REX prefix and bits
57 */
58#define REX_B 1
59#define REX_X 2
60#define REX_R 4
61#define REX_W 8
62#define REX 0x40
63
64/*
65 * Addressing modes
66 */
67#define E 1 /* general effective address */
68#define Eind 2 /* indirect address (jump, call) */
69#define Ew 3 /* address, word size */
70#define Eb 4 /* address, byte size */
71#define R 5 /* register, in 'reg' field */
72#define Rw 6 /* word register, in 'reg' field */
73#define Rq 39 /* quad register, in 'reg' field */
70#define Ri 7 /* register in instruction */
71#define S 8 /* segment reg, in 'reg' field */
72#define Si 9 /* segment reg, in instruction */
73#define A 10 /* accumulator */
74#define BX 11 /* (bx) */
75#define CL 12 /* cl, for shifts */
76#define DX 13 /* dx, for IO */
77#define SI 14 /* si */

--- 37 unchanged lines hidden (view full) ---

115struct finst {
116 const char * f_name; /* name for memory instruction */
117 int f_size; /* size for memory instruction */
118 int f_rrmode; /* mode for rr instruction */
119 const void * f_rrname; /* name for rr instruction
120 (or pointer to table) */
121};
122
74#define Ri 7 /* register in instruction */
75#define S 8 /* segment reg, in 'reg' field */
76#define Si 9 /* segment reg, in instruction */
77#define A 10 /* accumulator */
78#define BX 11 /* (bx) */
79#define CL 12 /* cl, for shifts */
80#define DX 13 /* dx, for IO */
81#define SI 14 /* si */

--- 37 unchanged lines hidden (view full) ---

119struct finst {
120 const char * f_name; /* name for memory instruction */
121 int f_size; /* size for memory instruction */
122 int f_rrmode; /* mode for rr instruction */
123 const void * f_rrname; /* name for rr instruction
124 (or pointer to table) */
125};
126
127static const struct inst db_inst_0f388x[] = {
128/*80*/ { "", TRUE, SDEP, op2(E, Rq), "invept" },
129/*81*/ { "", TRUE, SDEP, op2(E, Rq), "invvpid" },
130/*82*/ { "", FALSE, NONE, 0, 0 },
131/*83*/ { "", FALSE, NONE, 0, 0 },
132/*84*/ { "", FALSE, NONE, 0, 0 },
133/*85*/ { "", FALSE, NONE, 0, 0 },
134/*86*/ { "", FALSE, NONE, 0, 0 },
135/*87*/ { "", FALSE, NONE, 0, 0 },
136
137/*88*/ { "", FALSE, NONE, 0, 0 },
138/*89*/ { "", FALSE, NONE, 0, 0 },
139/*8a*/ { "", FALSE, NONE, 0, 0 },
140/*8b*/ { "", FALSE, NONE, 0, 0 },
141/*8c*/ { "", FALSE, NONE, 0, 0 },
142/*8d*/ { "", FALSE, NONE, 0, 0 },
143/*8e*/ { "", FALSE, NONE, 0, 0 },
144/*8f*/ { "", FALSE, NONE, 0, 0 },
145};
146
147static const struct inst * const db_inst_0f38[] = {
148 0,
149 0,
150 0,
151 0,
152 0,
153 0,
154 0,
155 0,
156 db_inst_0f388x,
157 0,
158 0,
159 0,
160 0,
161 0,
162 0,
163 0
164};
165
123static const char * const db_Grp6[] = {
124 "sldt",
125 "str",
126 "lldt",
127 "ltr",
128 "verr",
129 "verw",
130 "",

--- 24 unchanged lines hidden (view full) ---

155
156static const char * const db_Grp9[] = {
157 "",
158 "cmpxchg8b",
159 "",
160 "",
161 "",
162 "",
166static const char * const db_Grp6[] = {
167 "sldt",
168 "str",
169 "lldt",
170 "ltr",
171 "verr",
172 "verw",
173 "",

--- 24 unchanged lines hidden (view full) ---

198
199static const char * const db_Grp9[] = {
200 "",
201 "cmpxchg8b",
202 "",
203 "",
204 "",
205 "",
163 "",
164 ""
206 "vmptrld",
207 "vmptrst"
165};
166
167static const char * const db_Grp15[] = {
168 "fxsave",
169 "fxrstor",
170 "ldmxcsr",
171 "stmxcsr",
172 "xsave",

--- 58 unchanged lines hidden (view full) ---

231/*31*/ { "rdtsc", FALSE, NONE, 0, 0 },
232/*32*/ { "rdmsr", FALSE, NONE, 0, 0 },
233/*33*/ { "rdpmc", FALSE, NONE, 0, 0 },
234/*34*/ { "sysenter",FALSE,NONE, 0, 0 },
235/*35*/ { "sysexit",FALSE,NONE, 0, 0 },
236/*36*/ { "", FALSE, NONE, 0, 0 },
237/*37*/ { "getsec",FALSE, NONE, 0, 0 },
238
208};
209
210static const char * const db_Grp15[] = {
211 "fxsave",
212 "fxrstor",
213 "ldmxcsr",
214 "stmxcsr",
215 "xsave",

--- 58 unchanged lines hidden (view full) ---

274/*31*/ { "rdtsc", FALSE, NONE, 0, 0 },
275/*32*/ { "rdmsr", FALSE, NONE, 0, 0 },
276/*33*/ { "rdpmc", FALSE, NONE, 0, 0 },
277/*34*/ { "sysenter",FALSE,NONE, 0, 0 },
278/*35*/ { "sysexit",FALSE,NONE, 0, 0 },
279/*36*/ { "", FALSE, NONE, 0, 0 },
280/*37*/ { "getsec",FALSE, NONE, 0, 0 },
281
239/*38*/ { "", FALSE, NONE, 0, 0 },
282/*38*/ { "", FALSE, ESC, 0, db_inst_0f38 },
240/*39*/ { "", FALSE, NONE, 0, 0 },
241/*3a*/ { "", FALSE, NONE, 0, 0 },
242/*3b*/ { "", FALSE, NONE, 0, 0 },
243/*3c*/ { "", FALSE, NONE, 0, 0 },
244/*3d*/ { "", FALSE, NONE, 0, 0 },
245/*3e*/ { "", FALSE, NONE, 0, 0 },
246/*3f*/ { "", FALSE, NONE, 0, 0 },
247};

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261/*4a*/ { "cmovp", TRUE, NONE, op2(E, R), 0 },
262/*4b*/ { "cmovnp", TRUE, NONE, op2(E, R), 0 },
263/*4c*/ { "cmovl", TRUE, NONE, op2(E, R), 0 },
264/*4d*/ { "cmovnl", TRUE, NONE, op2(E, R), 0 },
265/*4e*/ { "cmovle", TRUE, NONE, op2(E, R), 0 },
266/*4f*/ { "cmovnle",TRUE, NONE, op2(E, R), 0 },
267};
268
283/*39*/ { "", FALSE, NONE, 0, 0 },
284/*3a*/ { "", FALSE, NONE, 0, 0 },
285/*3b*/ { "", FALSE, NONE, 0, 0 },
286/*3c*/ { "", FALSE, NONE, 0, 0 },
287/*3d*/ { "", FALSE, NONE, 0, 0 },
288/*3e*/ { "", FALSE, NONE, 0, 0 },
289/*3f*/ { "", FALSE, NONE, 0, 0 },
290};

--- 13 unchanged lines hidden (view full) ---

304/*4a*/ { "cmovp", TRUE, NONE, op2(E, R), 0 },
305/*4b*/ { "cmovnp", TRUE, NONE, op2(E, R), 0 },
306/*4c*/ { "cmovl", TRUE, NONE, op2(E, R), 0 },
307/*4d*/ { "cmovnl", TRUE, NONE, op2(E, R), 0 },
308/*4e*/ { "cmovle", TRUE, NONE, op2(E, R), 0 },
309/*4f*/ { "cmovnle",TRUE, NONE, op2(E, R), 0 },
310};
311
312static const struct inst db_inst_0f7x[] = {
313/*70*/ { "", FALSE, NONE, 0, 0 },
314/*71*/ { "", FALSE, NONE, 0, 0 },
315/*72*/ { "", FALSE, NONE, 0, 0 },
316/*73*/ { "", FALSE, NONE, 0, 0 },
317/*74*/ { "", FALSE, NONE, 0, 0 },
318/*75*/ { "", FALSE, NONE, 0, 0 },
319/*76*/ { "", FALSE, NONE, 0, 0 },
320/*77*/ { "", FALSE, NONE, 0, 0 },
321
322/*78*/ { "vmread", TRUE, NONE, op2(Rq, E), 0 },
323/*79*/ { "vmwrite",TRUE, NONE, op2(E, Rq), 0 },
324/*7a*/ { "", FALSE, NONE, 0, 0 },
325/*7b*/ { "", FALSE, NONE, 0, 0 },
326/*7c*/ { "", FALSE, NONE, 0, 0 },
327/*7d*/ { "", FALSE, NONE, 0, 0 },
328/*7e*/ { "", FALSE, NONE, 0, 0 },
329/*7f*/ { "", FALSE, NONE, 0, 0 },
330};
331
269static const struct inst db_inst_0f8x[] = {
270/*80*/ { "jo", FALSE, NONE, op1(Dl), 0 },
271/*81*/ { "jno", FALSE, NONE, op1(Dl), 0 },
272/*82*/ { "jb", FALSE, NONE, op1(Dl), 0 },
273/*83*/ { "jnb", FALSE, NONE, op1(Dl), 0 },
274/*84*/ { "jz", FALSE, NONE, op1(Dl), 0 },
275/*85*/ { "jnz", FALSE, NONE, op1(Dl), 0 },
276/*86*/ { "jbe", FALSE, NONE, op1(Dl), 0 },

--- 91 unchanged lines hidden (view full) ---

368static const struct inst * const db_inst_0f[] = {
369 db_inst_0f0x,
370 0,
371 db_inst_0f2x,
372 db_inst_0f3x,
373 db_inst_0f4x,
374 0,
375 0,
332static const struct inst db_inst_0f8x[] = {
333/*80*/ { "jo", FALSE, NONE, op1(Dl), 0 },
334/*81*/ { "jno", FALSE, NONE, op1(Dl), 0 },
335/*82*/ { "jb", FALSE, NONE, op1(Dl), 0 },
336/*83*/ { "jnb", FALSE, NONE, op1(Dl), 0 },
337/*84*/ { "jz", FALSE, NONE, op1(Dl), 0 },
338/*85*/ { "jnz", FALSE, NONE, op1(Dl), 0 },
339/*86*/ { "jbe", FALSE, NONE, op1(Dl), 0 },

--- 91 unchanged lines hidden (view full) ---

431static const struct inst * const db_inst_0f[] = {
432 db_inst_0f0x,
433 0,
434 db_inst_0f2x,
435 db_inst_0f3x,
436 db_inst_0f4x,
437 0,
438 0,
376 0,
439 db_inst_0f7x,
377 db_inst_0f8x,
378 db_inst_0f9x,
379 db_inst_0fax,
380 db_inst_0fbx,
381 db_inst_0fcx,
382 0,
383 0,
384 0

--- 192 unchanged lines hidden (view full) ---

577
578/*08*/ { "or", TRUE, BYTE, op2(R, E), 0 },
579/*09*/ { "or", TRUE, LONG, op2(R, E), 0 },
580/*0a*/ { "or", TRUE, BYTE, op2(E, R), 0 },
581/*0b*/ { "or", TRUE, LONG, op2(E, R), 0 },
582/*0c*/ { "or", FALSE, BYTE, op2(I, A), 0 },
583/*0d*/ { "or", FALSE, LONG, op2(I, A), 0 },
584/*0e*/ { "push", FALSE, NONE, op1(Si), 0 },
440 db_inst_0f8x,
441 db_inst_0f9x,
442 db_inst_0fax,
443 db_inst_0fbx,
444 db_inst_0fcx,
445 0,
446 0,
447 0

--- 192 unchanged lines hidden (view full) ---

640
641/*08*/ { "or", TRUE, BYTE, op2(R, E), 0 },
642/*09*/ { "or", TRUE, LONG, op2(R, E), 0 },
643/*0a*/ { "or", TRUE, BYTE, op2(E, R), 0 },
644/*0b*/ { "or", TRUE, LONG, op2(E, R), 0 },
645/*0c*/ { "or", FALSE, BYTE, op2(I, A), 0 },
646/*0d*/ { "or", FALSE, LONG, op2(I, A), 0 },
647/*0e*/ { "push", FALSE, NONE, op1(Si), 0 },
585/*0f*/ { "", FALSE, NONE, 0, 0 },
648/*0f*/ { "", FALSE, ESC, 0, db_inst_0f },
586
587/*10*/ { "adc", TRUE, BYTE, op2(R, E), 0 },
588/*11*/ { "adc", TRUE, LONG, op2(R, E), 0 },
589/*12*/ { "adc", TRUE, BYTE, op2(E, R), 0 },
590/*13*/ { "adc", TRUE, LONG, op2(E, R), 0 },
591/*14*/ { "adc", FALSE, BYTE, op2(I, A), 0 },
592/*15*/ { "adc", FALSE, LONG, op2(Is, A), 0 },
593/*16*/ { "push", FALSE, NONE, op1(Si), 0 },

--- 139 unchanged lines hidden (view full) ---

733/*91*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
734/*92*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
735/*93*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
736/*94*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
737/*95*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
738/*96*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
739/*97*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
740
649
650/*10*/ { "adc", TRUE, BYTE, op2(R, E), 0 },
651/*11*/ { "adc", TRUE, LONG, op2(R, E), 0 },
652/*12*/ { "adc", TRUE, BYTE, op2(E, R), 0 },
653/*13*/ { "adc", TRUE, LONG, op2(E, R), 0 },
654/*14*/ { "adc", FALSE, BYTE, op2(I, A), 0 },
655/*15*/ { "adc", FALSE, LONG, op2(Is, A), 0 },
656/*16*/ { "push", FALSE, NONE, op1(Si), 0 },

--- 139 unchanged lines hidden (view full) ---

796/*91*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
797/*92*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
798/*93*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
799/*94*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
800/*95*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
801/*96*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
802/*97*/ { "xchg", FALSE, LONG, op2(A, Ri), 0 },
803
741/*98*/ { "cbw", FALSE, SDEP, 0, "cwde" }, /* cbw/cwde */
742/*99*/ { "cwd", FALSE, SDEP, 0, "cdq" }, /* cwd/cdq */
804/*98*/ { "cwde", FALSE, SDEP, 0, "cbw" },
805/*99*/ { "cdq", FALSE, SDEP, 0, "cwd" },
743/*9a*/ { "lcall", FALSE, NONE, op1(OS), 0 },
744/*9b*/ { "wait", FALSE, NONE, 0, 0 },
745/*9c*/ { "pushf", FALSE, LONG, 0, 0 },
746/*9d*/ { "popf", FALSE, LONG, 0, 0 },
747/*9e*/ { "sahf", FALSE, NONE, 0, 0 },
748/*9f*/ { "lahf", FALSE, NONE, 0, 0 },
749
750/*a0*/ { "mov", FALSE, BYTE, op2(O, A), 0 },

--- 66 unchanged lines hidden (view full) ---

817/*dc*/ { "", TRUE, NONE, 0, db_Escc },
818/*dd*/ { "", TRUE, NONE, 0, db_Escd },
819/*de*/ { "", TRUE, NONE, 0, db_Esce },
820/*df*/ { "", TRUE, NONE, 0, db_Escf },
821
822/*e0*/ { "loopne",FALSE, NONE, op1(Db), 0 },
823/*e1*/ { "loope", FALSE, NONE, op1(Db), 0 },
824/*e2*/ { "loop", FALSE, NONE, op1(Db), 0 },
806/*9a*/ { "lcall", FALSE, NONE, op1(OS), 0 },
807/*9b*/ { "wait", FALSE, NONE, 0, 0 },
808/*9c*/ { "pushf", FALSE, LONG, 0, 0 },
809/*9d*/ { "popf", FALSE, LONG, 0, 0 },
810/*9e*/ { "sahf", FALSE, NONE, 0, 0 },
811/*9f*/ { "lahf", FALSE, NONE, 0, 0 },
812
813/*a0*/ { "mov", FALSE, BYTE, op2(O, A), 0 },

--- 66 unchanged lines hidden (view full) ---

880/*dc*/ { "", TRUE, NONE, 0, db_Escc },
881/*dd*/ { "", TRUE, NONE, 0, db_Escd },
882/*de*/ { "", TRUE, NONE, 0, db_Esce },
883/*df*/ { "", TRUE, NONE, 0, db_Escf },
884
885/*e0*/ { "loopne",FALSE, NONE, op1(Db), 0 },
886/*e1*/ { "loope", FALSE, NONE, op1(Db), 0 },
887/*e2*/ { "loop", FALSE, NONE, op1(Db), 0 },
825/*e3*/ { "jcxz", FALSE, SDEP, op1(Db), "jecxz" },
888/*e3*/ { "jrcxz", FALSE, ADEP, op1(Db), "jecxz" },
826/*e4*/ { "in", FALSE, BYTE, op2(Ib, A), 0 },
827/*e5*/ { "in", FALSE, LONG, op2(Ib, A) , 0 },
828/*e6*/ { "out", FALSE, BYTE, op2(A, Ib), 0 },
829/*e7*/ { "out", FALSE, LONG, op2(A, Ib) , 0 },
830
831/*e8*/ { "call", FALSE, NONE, op1(Dl), 0 },
832/*e9*/ { "jmp", FALSE, NONE, op1(Dl), 0 },
833/*ea*/ { "ljmp", FALSE, NONE, op1(OS), 0 },

--- 369 unchanged lines hidden (view full) ---

1203 }
1204 if (inst >= 0x40 && inst < 0x50) {
1205 rex = inst;
1206 prefix = TRUE;
1207 }
1208 if (prefix) {
1209 get_value_inc(inst, loc, 1, FALSE);
1210 }
889/*e4*/ { "in", FALSE, BYTE, op2(Ib, A), 0 },
890/*e5*/ { "in", FALSE, LONG, op2(Ib, A) , 0 },
891/*e6*/ { "out", FALSE, BYTE, op2(A, Ib), 0 },
892/*e7*/ { "out", FALSE, LONG, op2(A, Ib) , 0 },
893
894/*e8*/ { "call", FALSE, NONE, op1(Dl), 0 },
895/*e9*/ { "jmp", FALSE, NONE, op1(Dl), 0 },
896/*ea*/ { "ljmp", FALSE, NONE, op1(OS), 0 },

--- 369 unchanged lines hidden (view full) ---

1266 }
1267 if (inst >= 0x40 && inst < 0x50) {
1268 rex = inst;
1269 prefix = TRUE;
1270 }
1271 if (prefix) {
1272 get_value_inc(inst, loc, 1, FALSE);
1273 }
1211 if (rep == TRUE) {
1212 if (inst == 0x90) {
1213 db_printf("pause\n");
1214 return (loc);
1215 }
1216 db_printf("repe "); /* XXX repe VS rep */
1217 rep = FALSE;
1218 }
1219 } while (prefix);
1220
1221 if (inst >= 0xd8 && inst <= 0xdf) {
1222 loc = db_disasm_esc(loc, inst, rex, short_addr, size, seg);
1223 db_printf("\n");
1224 return (loc);
1225 }
1226
1274 } while (prefix);
1275
1276 if (inst >= 0xd8 && inst <= 0xdf) {
1277 loc = db_disasm_esc(loc, inst, rex, short_addr, size, seg);
1278 db_printf("\n");
1279 return (loc);
1280 }
1281
1227 if (inst == 0x0f) {
1282 ip = &db_inst_table[inst];
1283 while (ip->i_size == ESC) {
1228 get_value_inc(inst, loc, 1, FALSE);
1284 get_value_inc(inst, loc, 1, FALSE);
1229 ip = db_inst_0f[inst>>4];
1285 ip = ((const struct inst * const *)ip->i_extra)[inst>>4];
1230 if (ip == 0) {
1231 ip = &db_bad_inst;
1232 }
1233 else {
1234 ip = &ip[inst&0xf];
1235 }
1236 }
1286 if (ip == 0) {
1287 ip = &db_bad_inst;
1288 }
1289 else {
1290 ip = &ip[inst&0xf];
1291 }
1292 }
1237 else
1238 ip = &db_inst_table[inst];
1239
1240 if (ip->i_has_modrm) {
1241 get_value_inc(regmodrm, loc, 1, FALSE);
1242 loc = db_read_address(loc, short_addr, rex, regmodrm, &address);
1243 }
1244
1245 i_name = ip->i_name;
1246 i_size = ip->i_size;

--- 17 unchanged lines hidden (view full) ---

1264 i_name = ip->i_name;
1265 i_mode = ip->i_mode;
1266 i_size = ip->i_size;
1267 }
1268
1269 /* Special cases that don't fit well in the tables. */
1270 if (ip->i_extra == db_Grp7 && f_mod(rex, regmodrm) == 3) {
1271 switch (regmodrm) {
1293
1294 if (ip->i_has_modrm) {
1295 get_value_inc(regmodrm, loc, 1, FALSE);
1296 loc = db_read_address(loc, short_addr, rex, regmodrm, &address);
1297 }
1298
1299 i_name = ip->i_name;
1300 i_size = ip->i_size;

--- 17 unchanged lines hidden (view full) ---

1318 i_name = ip->i_name;
1319 i_mode = ip->i_mode;
1320 i_size = ip->i_size;
1321 }
1322
1323 /* Special cases that don't fit well in the tables. */
1324 if (ip->i_extra == db_Grp7 && f_mod(rex, regmodrm) == 3) {
1325 switch (regmodrm) {
1326 case 0xc1:
1327 i_name = "vmcall";
1328 i_size = NONE;
1329 i_mode = 0;
1330 break;
1331 case 0xc2:
1332 i_name = "vmlaunch";
1333 i_size = NONE;
1334 i_mode = 0;
1335 break;
1336 case 0xc3:
1337 i_name = "vmresume";
1338 i_size = NONE;
1339 i_mode = 0;
1340 break;
1341 case 0xc4:
1342 i_name = "vmxoff";
1343 i_size = NONE;
1344 i_mode = 0;
1345 break;
1272 case 0xc8:
1273 i_name = "monitor";
1274 i_size = NONE;
1275 i_mode = 0;
1276 break;
1277 case 0xc9:
1278 i_name = "mwait";
1279 i_size = NONE;

--- 22 unchanged lines hidden (view full) ---

1302 }
1303 }
1304 if (ip->i_extra == db_Grp15 && f_mod(rex, regmodrm) == 3) {
1305 i_name = db_Grp15b[f_reg(rex, regmodrm)];
1306 i_size = NONE;
1307 i_mode = 0;
1308 }
1309
1346 case 0xc8:
1347 i_name = "monitor";
1348 i_size = NONE;
1349 i_mode = 0;
1350 break;
1351 case 0xc9:
1352 i_name = "mwait";
1353 i_size = NONE;

--- 22 unchanged lines hidden (view full) ---

1376 }
1377 }
1378 if (ip->i_extra == db_Grp15 && f_mod(rex, regmodrm) == 3) {
1379 i_name = db_Grp15b[f_reg(rex, regmodrm)];
1380 i_size = NONE;
1381 i_mode = 0;
1382 }
1383
1384 /* Handle instructions identified by mandatory prefixes. */
1385 if (rep == TRUE) {
1386 if (inst == 0x90) {
1387 i_name = "pause";
1388 i_size = NONE;
1389 i_mode = 0;
1390 rep = FALSE;
1391 } else if (ip->i_extra == db_Grp9 && f_mod(rex, regmodrm) != 3 &&
1392 f_reg(rex, regmodrm) == 0x6) {
1393 i_name = "vmxon";
1394 rep = FALSE;
1395 }
1396 }
1397 if (size == WORD) {
1398 if (ip->i_extra == db_Grp9 && f_mod(rex, regmodrm) != 3 &&
1399 f_reg(rex, regmodrm) == 0x6) {
1400 i_name = "vmclear";
1401 }
1402 }
1403 if (rex & REX_W) {
1404 if (strcmp(i_name, "cwde") == 0)
1405 i_name = "cdqe";
1406 else if (strcmp(i_name, "cmpxchg8b") == 0)
1407 i_name = "cmpxchg16b";
1408 }
1409
1410 if (rep == TRUE)
1411 db_printf("repe "); /* XXX repe VS rep */
1412
1310 if (i_size == SDEP) {
1413 if (i_size == SDEP) {
1311 if (size == WORD)
1414 if (size == LONG)
1312 db_printf("%s", i_name);
1313 else
1314 db_printf("%s", (const char *)ip->i_extra);
1415 db_printf("%s", i_name);
1416 else
1417 db_printf("%s", (const char *)ip->i_extra);
1418 } else if (i_size == ADEP) {
1419 if (short_addr == FALSE)
1420 db_printf("%s", i_name);
1421 else
1422 db_printf("%s", (const char *)ip->i_extra);
1315 }
1316 else {
1317 db_printf("%s", i_name);
1318 if ((inst >= 0x50 && inst <= 0x5f) || inst == 0x68 || inst == 0x6a) {
1319 i_size = NONE;
1320 db_printf("q");
1321 }
1322 if (i_size != NONE) {

--- 53 unchanged lines hidden (view full) ---

1376 case R:
1377 db_printf("%s", db_reg[rex != 0 ? 1 : 0][(size == LONG && (rex & REX_W)) ? QUAD : size][f_reg(rex, regmodrm)]);
1378 break;
1379
1380 case Rw:
1381 db_printf("%s", db_reg[rex != 0 ? 1 : 0][WORD][f_reg(rex, regmodrm)]);
1382 break;
1383
1423 }
1424 else {
1425 db_printf("%s", i_name);
1426 if ((inst >= 0x50 && inst <= 0x5f) || inst == 0x68 || inst == 0x6a) {
1427 i_size = NONE;
1428 db_printf("q");
1429 }
1430 if (i_size != NONE) {

--- 53 unchanged lines hidden (view full) ---

1484 case R:
1485 db_printf("%s", db_reg[rex != 0 ? 1 : 0][(size == LONG && (rex & REX_W)) ? QUAD : size][f_reg(rex, regmodrm)]);
1486 break;
1487
1488 case Rw:
1489 db_printf("%s", db_reg[rex != 0 ? 1 : 0][WORD][f_reg(rex, regmodrm)]);
1490 break;
1491
1492 case Rq:
1493 db_printf("%s", db_reg[rex != 0 ? 1 : 0][QUAD][f_reg(rex, regmodrm)]);
1494 break;
1495
1384 case Ri:
1385 db_printf("%s", db_reg[0][QUAD][f_rm(rex, inst)]);
1386 break;
1387
1388 case Ril:
1389 db_printf("%s", db_reg[rex != 0 ? 1 : 0][(rex & REX_R) ? QUAD : LONG][f_rm(rex, inst)]);
1390 break;
1391

--- 134 unchanged lines hidden --- 		1496 case Ri:
1497 db_printf("%s", db_reg[0][QUAD][f_rm(rex, inst)]);
1498 break;
1499
1500 case Ril:
1501 db_printf("%s", db_reg[rex != 0 ? 1 : 0][(rex & REX_R) ? QUAD : LONG][f_rm(rex, inst)]);
1502 break;
1503

--- 134 unchanged lines hidden ---