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libpmc.c (283120) libpmc.c (284218)
1/*-
2 * Copyright (c) 2003-2008 Joseph Koshy
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2003-2008 Joseph Koshy
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/lib/libpmc/libpmc.c 283120 2015-05-19 18:58:18Z jhb $");
28__FBSDID("$FreeBSD: head/lib/libpmc/libpmc.c 284218 2015-06-10 12:42:30Z br $");
29
30#include <sys/types.h>
31#include <sys/param.h>
32#include <sys/module.h>
33#include <sys/pmc.h>
34#include <sys/syscall.h>
35
36#include <ctype.h>

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263 __PMC_EV_ALIAS_SANDYBRIDGEUC()
264};
265
266static const struct pmc_event_descr westmereuc_event_table[] =
267{
268 __PMC_EV_ALIAS_WESTMEREUC()
269};
270
29
30#include <sys/types.h>
31#include <sys/param.h>
32#include <sys/module.h>
33#include <sys/pmc.h>
34#include <sys/syscall.h>
35
36#include <ctype.h>

--- 226 unchanged lines hidden (view full) ---

263 __PMC_EV_ALIAS_SANDYBRIDGEUC()
264};
265
266static const struct pmc_event_descr westmereuc_event_table[] =
267{
268 __PMC_EV_ALIAS_WESTMEREUC()
269};
270
271static const struct pmc_event_descr cortex_a8_event_table[] =
272{
273 __PMC_EV_ALIAS_ARMV7_CORTEX_A8()
274};
275
276static const struct pmc_event_descr cortex_a9_event_table[] =
277{
278 __PMC_EV_ALIAS_ARMV7_CORTEX_A9()
279};
280
271static const struct pmc_event_descr cortex_a53_event_table[] =
272{
273 __PMC_EV_ALIAS_ARMV8_CORTEX_A53()
274};
275
276static const struct pmc_event_descr cortex_a57_event_table[] =
277{
278 __PMC_EV_ALIAS_ARMV8_CORTEX_A57()

--- 24 unchanged lines hidden (view full) ---

303PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
304PMC_MDEP_TABLE(westmere_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
305PMC_MDEP_TABLE(k7, K7, PMC_CLASS_SOFT, PMC_CLASS_TSC);
306PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC);
307PMC_MDEP_TABLE(p4, P4, PMC_CLASS_SOFT, PMC_CLASS_TSC);
308PMC_MDEP_TABLE(p5, P5, PMC_CLASS_SOFT, PMC_CLASS_TSC);
309PMC_MDEP_TABLE(p6, P6, PMC_CLASS_SOFT, PMC_CLASS_TSC);
310PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_SOFT, PMC_CLASS_XSCALE);
281static const struct pmc_event_descr cortex_a53_event_table[] =
282{
283 __PMC_EV_ALIAS_ARMV8_CORTEX_A53()
284};
285
286static const struct pmc_event_descr cortex_a57_event_table[] =
287{
288 __PMC_EV_ALIAS_ARMV8_CORTEX_A57()

--- 24 unchanged lines hidden (view full) ---

313PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
314PMC_MDEP_TABLE(westmere_ex, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC);
315PMC_MDEP_TABLE(k7, K7, PMC_CLASS_SOFT, PMC_CLASS_TSC);
316PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC);
317PMC_MDEP_TABLE(p4, P4, PMC_CLASS_SOFT, PMC_CLASS_TSC);
318PMC_MDEP_TABLE(p5, P5, PMC_CLASS_SOFT, PMC_CLASS_TSC);
319PMC_MDEP_TABLE(p6, P6, PMC_CLASS_SOFT, PMC_CLASS_TSC);
320PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_SOFT, PMC_CLASS_XSCALE);
311PMC_MDEP_TABLE(armv7, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
321PMC_MDEP_TABLE(cortex_a8, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
322PMC_MDEP_TABLE(cortex_a9, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
312PMC_MDEP_TABLE(cortex_a53, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
313PMC_MDEP_TABLE(cortex_a57, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
314PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_SOFT, PMC_CLASS_MIPS24K);
315PMC_MDEP_TABLE(mips74k, MIPS74K, PMC_CLASS_SOFT, PMC_CLASS_MIPS74K);
316PMC_MDEP_TABLE(octeon, OCTEON, PMC_CLASS_SOFT, PMC_CLASS_OCTEON);
317PMC_MDEP_TABLE(ppc7450, PPC7450, PMC_CLASS_SOFT, PMC_CLASS_PPC7450, PMC_CLASS_TSC);
318PMC_MDEP_TABLE(ppc970, PPC970, PMC_CLASS_SOFT, PMC_CLASS_PPC970, PMC_CLASS_TSC);
319PMC_MDEP_TABLE(e500, E500, PMC_CLASS_SOFT, PMC_CLASS_E500, PMC_CLASS_TSC);

--- 52 unchanged lines hidden (view full) ---

372#endif
373#if defined(__i386__) || defined(__amd64__)
374PMC_CLASS_TABLE_DESC(tsc, TSC, tsc, tsc);
375#endif
376#if defined(__arm__)
377#if defined(__XSCALE__)
378PMC_CLASS_TABLE_DESC(xscale, XSCALE, xscale, xscale);
379#endif
323PMC_MDEP_TABLE(cortex_a53, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
324PMC_MDEP_TABLE(cortex_a57, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
325PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_SOFT, PMC_CLASS_MIPS24K);
326PMC_MDEP_TABLE(mips74k, MIPS74K, PMC_CLASS_SOFT, PMC_CLASS_MIPS74K);
327PMC_MDEP_TABLE(octeon, OCTEON, PMC_CLASS_SOFT, PMC_CLASS_OCTEON);
328PMC_MDEP_TABLE(ppc7450, PPC7450, PMC_CLASS_SOFT, PMC_CLASS_PPC7450, PMC_CLASS_TSC);
329PMC_MDEP_TABLE(ppc970, PPC970, PMC_CLASS_SOFT, PMC_CLASS_PPC970, PMC_CLASS_TSC);
330PMC_MDEP_TABLE(e500, E500, PMC_CLASS_SOFT, PMC_CLASS_E500, PMC_CLASS_TSC);

--- 52 unchanged lines hidden (view full) ---

383#endif
384#if defined(__i386__) || defined(__amd64__)
385PMC_CLASS_TABLE_DESC(tsc, TSC, tsc, tsc);
386#endif
387#if defined(__arm__)
388#if defined(__XSCALE__)
389PMC_CLASS_TABLE_DESC(xscale, XSCALE, xscale, xscale);
390#endif
380PMC_CLASS_TABLE_DESC(armv7, ARMV7, armv7, armv7);
391PMC_CLASS_TABLE_DESC(cortex_a8, ARMV7, cortex_a9, armv7);
392PMC_CLASS_TABLE_DESC(cortex_a9, ARMV7, cortex_a9, armv7);
381#endif
382#if defined(__aarch64__)
383PMC_CLASS_TABLE_DESC(cortex_a53, ARMV8, cortex_a53, arm64);
384PMC_CLASS_TABLE_DESC(cortex_a57, ARMV8, cortex_a57, arm64);
385#endif
386#if defined(__mips__)
387PMC_CLASS_TABLE_DESC(mips24k, MIPS24K, mips24k, mips);
388PMC_CLASS_TABLE_DESC(mips74k, MIPS74K, mips74k, mips);

--- 2042 unchanged lines hidden (view full) ---

2431 default:
2432 break;
2433 }
2434
2435 return (0);
2436}
2437#endif
2438
393#endif
394#if defined(__aarch64__)
395PMC_CLASS_TABLE_DESC(cortex_a53, ARMV8, cortex_a53, arm64);
396PMC_CLASS_TABLE_DESC(cortex_a57, ARMV8, cortex_a57, arm64);
397#endif
398#if defined(__mips__)
399PMC_CLASS_TABLE_DESC(mips24k, MIPS24K, mips24k, mips);
400PMC_CLASS_TABLE_DESC(mips74k, MIPS74K, mips74k, mips);

--- 2042 unchanged lines hidden (view full) ---

2443 default:
2444 break;
2445 }
2446
2447 return (0);
2448}
2449#endif
2450
2439static struct pmc_event_alias armv7_aliases[] = {
2451static struct pmc_event_alias cortex_a8_aliases[] = {
2440 EV_ALIAS("dc-misses", "L1_DCACHE_REFILL"),
2441 EV_ALIAS("ic-misses", "L1_ICACHE_REFILL"),
2442 EV_ALIAS("instructions", "INSTR_EXECUTED"),
2443 EV_ALIAS(NULL, NULL)
2444};
2452 EV_ALIAS("dc-misses", "L1_DCACHE_REFILL"),
2453 EV_ALIAS("ic-misses", "L1_ICACHE_REFILL"),
2454 EV_ALIAS("instructions", "INSTR_EXECUTED"),
2455 EV_ALIAS(NULL, NULL)
2456};
2457
2458static struct pmc_event_alias cortex_a9_aliases[] = {
2459 EV_ALIAS("dc-misses", "L1_DCACHE_REFILL"),
2460 EV_ALIAS("ic-misses", "L1_ICACHE_REFILL"),
2461 EV_ALIAS("instructions", "INSTR_EXECUTED"),
2462 EV_ALIAS(NULL, NULL)
2463};
2464
2445static int
2446armv7_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
2447 struct pmc_op_pmcallocate *pmc_config __unused)
2448{
2449 switch (pe) {
2450 default:
2451 break;
2452 }

--- 523 unchanged lines hidden (view full) ---

2976 ev = p6_event_table;
2977 count = PMC_EVENT_TABLE_SIZE(p6);
2978 break;
2979 case PMC_CLASS_XSCALE:
2980 ev = xscale_event_table;
2981 count = PMC_EVENT_TABLE_SIZE(xscale);
2982 break;
2983 case PMC_CLASS_ARMV7:
2465static int
2466armv7_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
2467 struct pmc_op_pmcallocate *pmc_config __unused)
2468{
2469 switch (pe) {
2470 default:
2471 break;
2472 }

--- 523 unchanged lines hidden (view full) ---

2996 ev = p6_event_table;
2997 count = PMC_EVENT_TABLE_SIZE(p6);
2998 break;
2999 case PMC_CLASS_XSCALE:
3000 ev = xscale_event_table;
3001 count = PMC_EVENT_TABLE_SIZE(xscale);
3002 break;
3003 case PMC_CLASS_ARMV7:
2984 ev = armv7_event_table;
2985 count = PMC_EVENT_TABLE_SIZE(armv7);
3004 switch (cpu_info.pm_cputype) {
3005 default:
3006 case PMC_CPU_ARMV7_CORTEX_A8:
3007 ev = cortex_a8_event_table;
3008 count = PMC_EVENT_TABLE_SIZE(cortex_a8);
3009 break;
3010 case PMC_CPU_ARMV7_CORTEX_A9:
3011 ev = cortex_a9_event_table;
3012 count = PMC_EVENT_TABLE_SIZE(cortex_a9);
3013 break;
3014 }
2986 break;
2987 case PMC_CLASS_ARMV8:
2988 switch (cpu_info.pm_cputype) {
2989 default:
2990 case PMC_CPU_ARMV8_CORTEX_A53:
2991 ev = cortex_a53_event_table;
2992 count = PMC_EVENT_TABLE_SIZE(cortex_a53);
2993 break;

--- 290 unchanged lines hidden (view full) ---

3284 break;
3285#if defined(__arm__)
3286#if defined(__XSCALE__)
3287 case PMC_CPU_INTEL_XSCALE:
3288 PMC_MDEP_INIT(xscale);
3289 pmc_class_table[n] = &xscale_class_table_descr;
3290 break;
3291#endif
3015 break;
3016 case PMC_CLASS_ARMV8:
3017 switch (cpu_info.pm_cputype) {
3018 default:
3019 case PMC_CPU_ARMV8_CORTEX_A53:
3020 ev = cortex_a53_event_table;
3021 count = PMC_EVENT_TABLE_SIZE(cortex_a53);
3022 break;

--- 290 unchanged lines hidden (view full) ---

3313 break;
3314#if defined(__arm__)
3315#if defined(__XSCALE__)
3316 case PMC_CPU_INTEL_XSCALE:
3317 PMC_MDEP_INIT(xscale);
3318 pmc_class_table[n] = &xscale_class_table_descr;
3319 break;
3320#endif
3292 case PMC_CPU_ARMV7:
3293 PMC_MDEP_INIT(armv7);
3294 pmc_class_table[n] = &armv7_class_table_descr;
3321 case PMC_CPU_ARMV7_CORTEX_A8:
3322 PMC_MDEP_INIT(cortex_a8);
3323 pmc_class_table[n] = &cortex_a8_class_table_descr;
3295 break;
3324 break;
3325 case PMC_CPU_ARMV7_CORTEX_A9:
3326 PMC_MDEP_INIT(cortex_a9);
3327 pmc_class_table[n] = &cortex_a9_class_table_descr;
3328 break;
3296#endif
3297#if defined(__aarch64__)
3298 case PMC_CPU_ARMV8_CORTEX_A53:
3299 PMC_MDEP_INIT(cortex_a53);
3300 pmc_class_table[n] = &cortex_a53_class_table_descr;
3301 break;
3302 case PMC_CPU_ARMV8_CORTEX_A57:
3303 PMC_MDEP_INIT(cortex_a57);

--- 206 unchanged lines hidden (view full) ---

3510 evfence = p5_event_table + PMC_EVENT_TABLE_SIZE(p5);
3511 } else if (pe >= PMC_EV_P6_FIRST && pe <= PMC_EV_P6_LAST) {
3512 ev = p6_event_table;
3513 evfence = p6_event_table + PMC_EVENT_TABLE_SIZE(p6);
3514 } else if (pe >= PMC_EV_XSCALE_FIRST && pe <= PMC_EV_XSCALE_LAST) {
3515 ev = xscale_event_table;
3516 evfence = xscale_event_table + PMC_EVENT_TABLE_SIZE(xscale);
3517 } else if (pe >= PMC_EV_ARMV7_FIRST && pe <= PMC_EV_ARMV7_LAST) {
3329#endif
3330#if defined(__aarch64__)
3331 case PMC_CPU_ARMV8_CORTEX_A53:
3332 PMC_MDEP_INIT(cortex_a53);
3333 pmc_class_table[n] = &cortex_a53_class_table_descr;
3334 break;
3335 case PMC_CPU_ARMV8_CORTEX_A57:
3336 PMC_MDEP_INIT(cortex_a57);

--- 206 unchanged lines hidden (view full) ---

3543 evfence = p5_event_table + PMC_EVENT_TABLE_SIZE(p5);
3544 } else if (pe >= PMC_EV_P6_FIRST && pe <= PMC_EV_P6_LAST) {
3545 ev = p6_event_table;
3546 evfence = p6_event_table + PMC_EVENT_TABLE_SIZE(p6);
3547 } else if (pe >= PMC_EV_XSCALE_FIRST && pe <= PMC_EV_XSCALE_LAST) {
3548 ev = xscale_event_table;
3549 evfence = xscale_event_table + PMC_EVENT_TABLE_SIZE(xscale);
3550 } else if (pe >= PMC_EV_ARMV7_FIRST && pe <= PMC_EV_ARMV7_LAST) {
3518 ev = armv7_event_table;
3519 evfence = armv7_event_table + PMC_EVENT_TABLE_SIZE(armv7);
3551 switch (cpu) {
3552 case PMC_CPU_ARMV7_CORTEX_A8:
3553 ev = cortex_a8_event_table;
3554 evfence = cortex_a8_event_table + PMC_EVENT_TABLE_SIZE(cortex_a8);
3555 break;
3556 case PMC_CPU_ARMV7_CORTEX_A9:
3557 ev = cortex_a9_event_table;
3558 evfence = cortex_a9_event_table + PMC_EVENT_TABLE_SIZE(cortex_a9);
3559 break;
3560 default: /* Unknown CPU type. */
3561 break;
3562 }
3520 } else if (pe >= PMC_EV_ARMV8_FIRST && pe <= PMC_EV_ARMV8_LAST) {
3521 switch (cpu) {
3522 case PMC_CPU_ARMV8_CORTEX_A53:
3523 ev = cortex_a53_event_table;
3524 evfence = cortex_a53_event_table + PMC_EVENT_TABLE_SIZE(cortex_a53);
3525 break;
3526 case PMC_CPU_ARMV8_CORTEX_A57:
3527 ev = cortex_a57_event_table;

--- 233 unchanged lines hidden --- 		3563 } else if (pe >= PMC_EV_ARMV8_FIRST && pe <= PMC_EV_ARMV8_LAST) {
3564 switch (cpu) {
3565 case PMC_CPU_ARMV8_CORTEX_A53:
3566 ev = cortex_a53_event_table;
3567 evfence = cortex_a53_event_table + PMC_EVENT_TABLE_SIZE(cortex_a53);
3568 break;
3569 case PMC_CPU_ARMV8_CORTEX_A57:
3570 ev = cortex_a57_event_table;

--- 233 unchanged lines hidden ---