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x86cpuid.pl (246772) x86cpuid.pl (261037)
1#!/usr/bin/env perl
2
3$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
4push(@INC, "${dir}perlasm", "perlasm");
5require "x86asm.pl";
6
7&asm_init($ARGV[0],"x86cpuid");
8

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62 &jb (&label("intel"));
63
64 &mov ("eax",0x80000008);
65 &cpuid ();
66 &movz ("esi",&LB("ecx")); # number of cores - 1
67 &inc ("esi"); # number of cores
68
69 &mov ("eax",1);
1#!/usr/bin/env perl
2
3$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
4push(@INC, "${dir}perlasm", "perlasm");
5require "x86asm.pl";
6
7&asm_init($ARGV[0],"x86cpuid");
8

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62 &jb (&label("intel"));
63
64 &mov ("eax",0x80000008);
65 &cpuid ();
66 &movz ("esi",&LB("ecx")); # number of cores - 1
67 &inc ("esi"); # number of cores
68
69 &mov ("eax",1);
70 &xor ("ecx","ecx");
70 &cpuid ();
71 &bt ("edx",28);
72 &jnc (&label("generic"));
73 &shr ("ebx",16);
74 &and ("ebx",0xff);
75 &cmp ("ebx","esi");
76 &ja (&label("generic"));
77 &and ("edx",0xefffffff); # clear hyper-threading bit

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86 &mov ("ecx",0); # query L1D
87 &cpuid ();
88 &mov ("edi","eax");
89 &shr ("edi",14);
90 &and ("edi",0xfff); # number of cores -1 per L1D
91
92&set_label("nocacheinfo");
93 &mov ("eax",1);
71 &cpuid ();
72 &bt ("edx",28);
73 &jnc (&label("generic"));
74 &shr ("ebx",16);
75 &and ("ebx",0xff);
76 &cmp ("ebx","esi");
77 &ja (&label("generic"));
78 &and ("edx",0xefffffff); # clear hyper-threading bit

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87 &mov ("ecx",0); # query L1D
88 &cpuid ();
89 &mov ("edi","eax");
90 &shr ("edi",14);
91 &and ("edi",0xfff); # number of cores -1 per L1D
92
93&set_label("nocacheinfo");
94 &mov ("eax",1);
95 &xor ("ecx","ecx");
94 &cpuid ();
95 &and ("edx",0xbfefffff); # force reserved bits #20, #30 to 0
96 &cmp ("ebp",0);
97 &jne (&label("notintel"));
98 &or ("edx",1<<30); # set reserved bit#30 on Intel CPUs
99 &and (&HB("eax"),15); # familiy ID
100 &cmp (&HB("eax"),15); # P4?
101 &jne (&label("notintel"));

--- 255 unchanged lines hidden --- 		96 &cpuid ();
97 &and ("edx",0xbfefffff); # force reserved bits #20, #30 to 0
98 &cmp ("ebp",0);
99 &jne (&label("notintel"));
100 &or ("edx",1<<30); # set reserved bit#30 on Intel CPUs
101 &and (&HB("eax"),15); # familiy ID
102 &cmp (&HB("eax"),15); # P4?
103 &jne (&label("notintel"));

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