| MipsTargetStreamer.h (321369) | MipsTargetStreamer.h (326496) |
|---|---|
| 1//===-- MipsTargetStreamer.h - Mips Target Streamer ------------*- C++ -*--===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 105 unchanged lines hidden (view full) --- 114 void emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, SMLoc IDLoc, 115 const MCSubtargetInfo *STI); 116 void emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, MCOperand Op2, 117 SMLoc IDLoc, const MCSubtargetInfo *STI); 118 void emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, 119 SMLoc IDLoc, const MCSubtargetInfo *STI); 120 void emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm, 121 SMLoc IDLoc, const MCSubtargetInfo *STI); | 1//===-- MipsTargetStreamer.h - Mips Target Streamer ------------*- C++ -*--===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 105 unchanged lines hidden (view full) --- 114 void emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, SMLoc IDLoc, 115 const MCSubtargetInfo *STI); 116 void emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, MCOperand Op2, 117 SMLoc IDLoc, const MCSubtargetInfo *STI); 118 void emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, 119 SMLoc IDLoc, const MCSubtargetInfo *STI); 120 void emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm, 121 SMLoc IDLoc, const MCSubtargetInfo *STI); |
| 122 void emitRRIII(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm0, 123 int16_t Imm1, int16_t Imm2, SMLoc IDLoc, 124 const MCSubtargetInfo *STI); |
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| 122 void emitAddu(unsigned DstReg, unsigned SrcReg, unsigned TrgReg, bool Is64Bit, 123 const MCSubtargetInfo *STI); 124 void emitDSLL(unsigned DstReg, unsigned SrcReg, int16_t ShiftAmount, 125 SMLoc IDLoc, const MCSubtargetInfo *STI); 126 void emitEmptyDelaySlot(bool hasShortDelaySlot, SMLoc IDLoc, 127 const MCSubtargetInfo *STI); 128 void emitNop(SMLoc IDLoc, const MCSubtargetInfo *STI); 129 --- 201 unchanged lines hidden --- | 125 void emitAddu(unsigned DstReg, unsigned SrcReg, unsigned TrgReg, bool Is64Bit, 126 const MCSubtargetInfo *STI); 127 void emitDSLL(unsigned DstReg, unsigned SrcReg, int16_t ShiftAmount, 128 SMLoc IDLoc, const MCSubtargetInfo *STI); 129 void emitEmptyDelaySlot(bool hasShortDelaySlot, SMLoc IDLoc, 130 const MCSubtargetInfo *STI); 131 void emitNop(SMLoc IDLoc, const MCSubtargetInfo *STI); 132 --- 201 unchanged lines hidden --- |