| MipsRegisterInfo.td (280031) | MipsRegisterInfo.td (283526) |
|---|---|
| 1//===-- MipsRegisterInfo.td - Mips Register defs -----------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 374 unchanged lines hidden (view full) --- 383def MSA128B: RegisterClass<"Mips", [v16i8], 128, 384 (sequence "W%u", 0, 31)>; 385def MSA128H: RegisterClass<"Mips", [v8i16, v8f16], 128, 386 (sequence "W%u", 0, 31)>; 387def MSA128W: RegisterClass<"Mips", [v4i32, v4f32], 128, 388 (sequence "W%u", 0, 31)>; 389def MSA128D: RegisterClass<"Mips", [v2i64, v2f64], 128, 390 (sequence "W%u", 0, 31)>; | 1//===-- MipsRegisterInfo.td - Mips Register defs -----------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 374 unchanged lines hidden (view full) --- 383def MSA128B: RegisterClass<"Mips", [v16i8], 128, 384 (sequence "W%u", 0, 31)>; 385def MSA128H: RegisterClass<"Mips", [v8i16, v8f16], 128, 386 (sequence "W%u", 0, 31)>; 387def MSA128W: RegisterClass<"Mips", [v4i32, v4f32], 128, 388 (sequence "W%u", 0, 31)>; 389def MSA128D: RegisterClass<"Mips", [v2i64, v2f64], 128, 390 (sequence "W%u", 0, 31)>; |
| 391def MSA128WEvens: RegisterClass<"Mips", [v4i32, v4f32], 128, 392 (decimate (sequence "W%u", 0, 31), 2)>; |
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| 391 392def MSACtrl: RegisterClass<"Mips", [i32], 32, (add 393 MSAIR, MSACSR, MSAAccess, MSASave, MSAModify, MSARequest, MSAMap, MSAUnmap)>; 394 395// Hi/Lo Registers 396def LO32 : RegisterClass<"Mips", [i32], 32, (add LO0)>; 397def HI32 : RegisterClass<"Mips", [i32], 32, (add HI0)>; 398def LO32DSP : RegisterClass<"Mips", [i32], 32, (sequence "LO%u", 0, 3)>; --- 219 unchanged lines hidden --- | 393 394def MSACtrl: RegisterClass<"Mips", [i32], 32, (add 395 MSAIR, MSACSR, MSAAccess, MSASave, MSAModify, MSARequest, MSAMap, MSAUnmap)>; 396 397// Hi/Lo Registers 398def LO32 : RegisterClass<"Mips", [i32], 32, (add LO0)>; 399def HI32 : RegisterClass<"Mips", [i32], 32, (add HI0)>; 400def LO32DSP : RegisterClass<"Mips", [i32], 32, (sequence "LO%u", 0, 3)>; --- 219 unchanged lines hidden --- |