140a141,142
> (*TUL)[HexagonII::TypeCVI_4SLOT_MPY] = UnitsAndLanes(CVI_XLANE, 4);
> (*TUL)[HexagonII::TypeCVI_ZW] = UnitsAndLanes(CVI_ZW, 1);
302a305
> unsigned NonZCVIloads = 0, AllCVIloads = 0, CVIstores = 0;
333a337,341
> ++NonZCVIloads;
> LLVM_FALLTHROUGH;
> case HexagonII::TypeCVI_ZW:
> ++AllCVIloads;
> LLVM_FALLTHROUGH;
350a359,360
> ++CVIstores;
> LLVM_FALLTHROUGH;
408c418,422
< if ((load0 > 1 || store0 > 1) || (duplex > 1 || (duplex && memory))) {
---
> const unsigned ZCVIloads = AllCVIloads - NonZCVIloads;
> const bool ValidHVXMem =
> NonZCVIloads <= 1 && ZCVIloads <= 1 && CVIstores <= 1;
> if ((load0 > 1 || store0 > 1 || !ValidHVXMem) ||
> (duplex > 1 || (duplex && memory))) {