| ARMHazardRecognizer.cpp (219077) | ARMHazardRecognizer.cpp (221345) |
|---|---|
| 1//===-- ARMHazardRecognizer.cpp - ARM postra hazard recognizer ------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 35 unchanged lines hidden (view full) --- 44 // Look for special VMLA / VMLS hazards. A VMUL / VADD / VSUB following 45 // a VMLA / VMLS will cause 4 cycle stall. 46 const TargetInstrDesc &TID = MI->getDesc(); 47 if (LastMI && (TID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) { 48 MachineInstr *DefMI = LastMI; 49 const TargetInstrDesc &LastTID = LastMI->getDesc(); 50 // Skip over one non-VFP / NEON instruction. 51 if (!LastTID.isBarrier() && | 1//===-- ARMHazardRecognizer.cpp - ARM postra hazard recognizer ------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 35 unchanged lines hidden (view full) --- 44 // Look for special VMLA / VMLS hazards. A VMUL / VADD / VSUB following 45 // a VMLA / VMLS will cause 4 cycle stall. 46 const TargetInstrDesc &TID = MI->getDesc(); 47 if (LastMI && (TID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) { 48 MachineInstr *DefMI = LastMI; 49 const TargetInstrDesc &LastTID = LastMI->getDesc(); 50 // Skip over one non-VFP / NEON instruction. 51 if (!LastTID.isBarrier() && |
| 52 // On A9, AGU and NEON/FPU are muxed. 53 !(STI.isCortexA9() && (LastTID.mayLoad() || LastTID.mayStore())) && |
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| 52 (LastTID.TSFlags & ARMII::DomainMask) == ARMII::DomainGeneral) { 53 MachineBasicBlock::iterator I = LastMI; 54 if (I != LastMI->getParent()->begin()) { 55 I = llvm::prior(I); 56 DefMI = &*I; 57 } 58 } 59 --- 59 unchanged lines hidden --- | 54 (LastTID.TSFlags & ARMII::DomainMask) == ARMII::DomainGeneral) { 55 MachineBasicBlock::iterator I = LastMI; 56 if (I != LastMI->getParent()->begin()) { 57 I = llvm::prior(I); 58 DefMI = &*I; 59 } 60 } 61 --- 59 unchanged lines hidden --- |