| AllocationOrder.cpp (223017) | AllocationOrder.cpp (224145) |
|---|---|
| 1//===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 27 unchanged lines hidden (view full) --- 36 // Translate to physreg, or 0 if not assigned yet. 37 if (TargetRegisterInfo::isVirtualRegister(Hint)) 38 Hint = VRM.getPhys(Hint); 39 40 // The first hint pair component indicates a target-specific hint. 41 if (HintPair.first) { 42 const TargetRegisterInfo &TRI = VRM.getTargetRegInfo(); 43 // The remaining allocation order may depend on the hint. | 1//===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 27 unchanged lines hidden (view full) --- 36 // Translate to physreg, or 0 if not assigned yet. 37 if (TargetRegisterInfo::isVirtualRegister(Hint)) 38 Hint = VRM.getPhys(Hint); 39 40 // The first hint pair component indicates a target-specific hint. 41 if (HintPair.first) { 42 const TargetRegisterInfo &TRI = VRM.getTargetRegInfo(); 43 // The remaining allocation order may depend on the hint. |
| 44 const unsigned *B, *E; 45 tie(B, E) = TRI.getAllocationOrder(RC, HintPair.first, Hint, 46 VRM.getMachineFunction()); 47 48 // Empty allocation order? 49 if (B == E) | 44 ArrayRef<unsigned> Order = 45 TRI.getRawAllocationOrder(RC, HintPair.first, Hint, 46 VRM.getMachineFunction()); 47 if (Order.empty()) |
| 50 return; 51 52 // Copy the allocation order with reserved registers removed. 53 OwnedBegin = true; | 48 return; 49 50 // Copy the allocation order with reserved registers removed. 51 OwnedBegin = true; |
| 54 unsigned *P = new unsigned[E - B]; | 52 unsigned *P = new unsigned[Order.size()]; |
| 55 Begin = P; | 53 Begin = P; |
| 56 for (; B != E; ++B) 57 if (!RCI.isReserved(*B)) 58 *P++ = *B; | 54 for (unsigned i = 0; i != Order.size(); ++i) 55 if (!RCI.isReserved(Order[i])) 56 *P++ = Order[i]; |
| 59 End = P; 60 61 // Target-dependent hints require resolution. 62 Hint = TRI.ResolveRegAllocHint(HintPair.first, Hint, 63 VRM.getMachineFunction()); 64 } else { 65 // If there is no hint or just a normal hint, use the cached allocation 66 // order from RegisterClassInfo. --- 15 unchanged lines hidden --- | 57 End = P; 58 59 // Target-dependent hints require resolution. 60 Hint = TRI.ResolveRegAllocHint(HintPair.first, Hint, 61 VRM.getMachineFunction()); 62 } else { 63 // If there is no hint or just a normal hint, use the cached allocation 64 // order from RegisterClassInfo. --- 15 unchanged lines hidden --- |