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AggressiveAntiDepBreaker.h (223017) AggressiveAntiDepBreaker.h (224145)
1//=- llvm/CodeGen/AggressiveAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-=//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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18#define LLVM_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H
19
20#include "AntiDepBreaker.h"
21#include "llvm/CodeGen/MachineBasicBlock.h"
22#include "llvm/CodeGen/MachineFrameInfo.h"
23#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/MachineRegisterInfo.h"
25#include "llvm/CodeGen/ScheduleDAG.h"
1//=- llvm/CodeGen/AggressiveAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-=//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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18#define LLVM_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H
19
20#include "AntiDepBreaker.h"
21#include "llvm/CodeGen/MachineBasicBlock.h"
22#include "llvm/CodeGen/MachineFrameInfo.h"
23#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/MachineRegisterInfo.h"
25#include "llvm/CodeGen/ScheduleDAG.h"
26#include "llvm/Target/TargetSubtarget.h"
26#include "llvm/Target/TargetSubtargetInfo.h"
27#include "llvm/Target/TargetRegisterInfo.h"
28#include "llvm/ADT/BitVector.h"
29#include "llvm/ADT/SmallSet.h"
30#include <map>
31
32namespace llvm {
27#include "llvm/Target/TargetRegisterInfo.h"
28#include "llvm/ADT/BitVector.h"
29#include "llvm/ADT/SmallSet.h"
30#include <map>
31
32namespace llvm {
33class RegisterClassInfo;
34
33 /// Class AggressiveAntiDepState
34 /// Contains all the state necessary for anti-dep breaking.
35 class AggressiveAntiDepState {
36 public:
37 /// RegisterReference - Information about a register reference
38 /// within a liverange
39 typedef struct {
40 /// Operand - The registers operand

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112
113
114 /// Class AggressiveAntiDepBreaker
115 class AggressiveAntiDepBreaker : public AntiDepBreaker {
116 MachineFunction& MF;
117 MachineRegisterInfo &MRI;
118 const TargetInstrInfo *TII;
119 const TargetRegisterInfo *TRI;
35 /// Class AggressiveAntiDepState
36 /// Contains all the state necessary for anti-dep breaking.
37 class AggressiveAntiDepState {
38 public:
39 /// RegisterReference - Information about a register reference
40 /// within a liverange
41 typedef struct {
42 /// Operand - The registers operand

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114
115
116 /// Class AggressiveAntiDepBreaker
117 class AggressiveAntiDepBreaker : public AntiDepBreaker {
118 MachineFunction& MF;
119 MachineRegisterInfo &MRI;
120 const TargetInstrInfo *TII;
121 const TargetRegisterInfo *TRI;
122 const RegisterClassInfo &RegClassInfo;
120
123
121 /// AllocatableSet - The set of allocatable registers.
122 /// We'll be ignoring anti-dependencies on non-allocatable registers,
123 /// because they may not be safe to break.
124 const BitVector AllocatableSet;
125
126 /// CriticalPathSet - The set of registers that should only be
127 /// renamed if they are on the critical path.
128 BitVector CriticalPathSet;
129
130 /// State - The state used to identify and rename anti-dependence
131 /// registers.
132 AggressiveAntiDepState *State;
133
134 public:
135 AggressiveAntiDepBreaker(MachineFunction& MFi,
124 /// CriticalPathSet - The set of registers that should only be
125 /// renamed if they are on the critical path.
126 BitVector CriticalPathSet;
127
128 /// State - The state used to identify and rename anti-dependence
129 /// registers.
130 AggressiveAntiDepState *State;
131
132 public:
133 AggressiveAntiDepBreaker(MachineFunction& MFi,
136 TargetSubtarget::RegClassVector& CriticalPathRCs);
134 const RegisterClassInfo &RCI,
135 TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
137 ~AggressiveAntiDepBreaker();
138
139 /// Start - Initialize anti-dep breaking for a new basic block.
140 void StartBlock(MachineBasicBlock *BB);
141
142 /// BreakAntiDependencies - Identifiy anti-dependencies along the critical
143 /// path
144 /// of the ScheduleDAG and break them by renaming registers.

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153 /// instruction, which will not be scheduled.
154 ///
155 void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex);
156
157 /// Finish - Finish anti-dep breaking for a basic block.
158 void FinishBlock();
159
160 private:
136 ~AggressiveAntiDepBreaker();
137
138 /// Start - Initialize anti-dep breaking for a new basic block.
139 void StartBlock(MachineBasicBlock *BB);
140
141 /// BreakAntiDependencies - Identifiy anti-dependencies along the critical
142 /// path
143 /// of the ScheduleDAG and break them by renaming registers.

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152 /// instruction, which will not be scheduled.
153 ///
154 void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex);
155
156 /// Finish - Finish anti-dep breaking for a basic block.
157 void FinishBlock();
158
159 private:
161 typedef std::map<const TargetRegisterClass *,
162 TargetRegisterClass::const_iterator> RenameOrderType;
160 /// Keep track of a position in the allocation order for each regclass.
161 typedef std::map<const TargetRegisterClass *, unsigned> RenameOrderType;
163
164 /// IsImplicitDefUse - Return true if MO represents a register
165 /// that is both implicitly used and defined in MI
166 bool IsImplicitDefUse(MachineInstr *MI, MachineOperand& MO);
167
168 /// GetPassthruRegs - If MI implicitly def/uses a register, then
169 /// return that register and all subregisters.
170 void GetPassthruRegs(MachineInstr *MI, std::set<unsigned>& PassthruRegs);

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163 /// IsImplicitDefUse - Return true if MO represents a register
164 /// that is both implicitly used and defined in MI
165 bool IsImplicitDefUse(MachineInstr *MI, MachineOperand& MO);
166
167 /// GetPassthruRegs - If MI implicitly def/uses a register, then
168 /// return that register and all subregisters.
169 void GetPassthruRegs(MachineInstr *MI, std::set<unsigned>& PassthruRegs);

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