| isa.h (128019) | isa.h (131643) |
|---|---|
| 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 16 unchanged lines hidden (view full) --- 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * from: @(#)isa.h 5.7 (Berkeley) 5/9/91 | 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 16 unchanged lines hidden (view full) --- 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * from: @(#)isa.h 5.7 (Berkeley) 5/9/91 |
| 33 * $FreeBSD: head/sys/i386/isa/isa.h 128019 2004-04-07 20:46:16Z imp $ | 33 * $FreeBSD: head/sys/i386/isa/isa.h 131643 2004-07-05 18:39:30Z imp $ |
| 34 */ 35 36#ifdef PC98 37#error isa.h is included from PC-9801 source 38#endif 39 40#ifndef _I386_ISA_ISA_H_ 41#define _I386_ISA_ISA_H_ --- 21 unchanged lines hidden (view full) --- 63#define IO_RTC 0x070 /* RTC */ 64#define IO_NMI IO_RTC /* NMI Control */ 65#define IO_DMAPG 0x080 /* DMA Page Registers */ 66#define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */ 67#define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */ 68#define IO_NPX 0x0F0 /* Numeric Coprocessor */ 69 70 /* Cards */ | 34 */ 35 36#ifdef PC98 37#error isa.h is included from PC-9801 source 38#endif 39 40#ifndef _I386_ISA_ISA_H_ 41#define _I386_ISA_ISA_H_ --- 21 unchanged lines hidden (view full) --- 63#define IO_RTC 0x070 /* RTC */ 64#define IO_NMI IO_RTC /* NMI Control */ 65#define IO_DMAPG 0x080 /* DMA Page Registers */ 66#define IO_ICU2 0x0A0 /* 8259A Interrupt Controller #2 */ 67#define IO_DMA2 0x0C0 /* 8237A DMA Controller #2 */ 68#define IO_NPX 0x0F0 /* Numeric Coprocessor */ 69 70 /* Cards */ |
| 71 /* 0x100 - 0x16F Open */ 72 73#define IO_WD2 0x170 /* Secondary Fixed Disk Controller */ 74 75#define IO_PMP2 0x178 /* 82347 Power Management Peripheral */ 76 77 /* 0x17A - 0x1EF Open */ 78 79#define IO_WD1 0x1F0 /* Primary Fixed Disk Controller */ 80#define IO_GAME 0x201 /* Game Controller */ 81 82 /* 0x202 - 0x22A Open */ 83 84#define IO_ASC2 0x22B /* AmiScan addr.grp. 2 */ 85 86 /* 0x230 - 0x26A Open */ 87 88#define IO_ASC3 0x26B /* AmiScan addr.grp. 3 */ 89#define IO_GSC1 0x270 /* -- 0x27B! GeniScan GS-4500 addr.grp. 1 */ 90#define IO_LPT2 0x278 /* Parallel Port #2 */ 91 92 /* 0x280 - 0x2AA Open */ 93 94#define IO_ASC4 0x2AB /* AmiScan addr.grp. 4 */ 95 96 /* 0x2B0 - 0x2DF Open */ 97 98#define IO_GSC2 0x2E0 /* GeniScan GS-4500 addr.grp. 2 */ 99#define IO_COM4 0x2E8 /* COM4 i/o address */ 100#define IO_ASC5 0x2EB /* AmiScan addr.grp. 5 */ 101 102 /* 0x2F0 - 0x2F7 Open */ 103 104#define IO_COM2 0x2F8 /* COM2 i/o address */ 105 106 /* 0x300 - 0x32A Open */ 107 108#define IO_ASC6 0x32B /* AmiScan addr.grp. 6 */ 109#define IO_AHA0 0x330 /* adaptec 1542 default addr. */ 110#define IO_BT0 0x330 /* bustek 742a default addr. */ 111#define IO_UHA0 0x330 /* ultrastore 14f default addr. */ 112#define IO_AHA1 0x334 /* adaptec 1542 default addr. */ 113#define IO_BT1 0x334 /* bustek 742a default addr. */ 114 115 /* 0x340 - 0x36A Open */ 116 117#define IO_ASC7 0x36B /* AmiScan addr.grp. 7 */ 118#define IO_GSC3 0x370 /* GeniScan GS-4500 addr.grp. 3 */ 119#define IO_FD2 0x370 /* secondary base i/o address */ 120#define IO_LPT1 0x378 /* Parallel Port #1 */ 121 122 /* 0x380 - 0x3AA Open */ 123 124#define IO_ASC8 0x3AB /* AmiScan addr.grp. 8 */ 125#define IO_MDA 0x3B0 /* Monochome Adapter */ 126#define IO_LPT3 0x3BC /* Monochome Adapter Printer Port */ | |
| 127#define IO_VGA 0x3C0 /* E/VGA Ports */ 128#define IO_CGA 0x3D0 /* CGA Ports */ | 71#define IO_VGA 0x3C0 /* E/VGA Ports */ 72#define IO_CGA 0x3D0 /* CGA Ports */ |
| 129#define IO_GSC4 0x3E0 /* GeniScan GS-4500 addr.grp. 4 */ 130#define IO_COM3 0x3E8 /* COM3 i/o address */ 131#define IO_ASC1 0x3EB /* AmiScan addr.grp. 1 */ 132#define IO_FD1 0x3F0 /* primary base i/o address */ 133#define IO_COM1 0x3F8 /* COM1 i/o address */ | 73#define IO_MDA 0x3B0 /* Monochome Adapter */ |
| 134 135#define IO_ISAEND 0x3FF /* End (actually Max) of I/O Regs */ 136#endif /* !IO_ISABEGIN */ 137 138/* 139 * Input / Output Port Sizes - these are from several sources, and tend 140 * to be the larger of what was found. 141 */ 142#ifndef IO_ISASIZES 143#define IO_ISASIZES 144 | 74 75#define IO_ISAEND 0x3FF /* End (actually Max) of I/O Regs */ 76#endif /* !IO_ISABEGIN */ 77 78/* 79 * Input / Output Port Sizes - these are from several sources, and tend 80 * to be the larger of what was found. 81 */ 82#ifndef IO_ISASIZES 83#define IO_ISASIZES 84 |
| 145#define IO_ASCSIZE 5 /* AmiScan GI1904-based hand scanner */ | |
| 146#define IO_CGASIZE 12 /* CGA controllers */ | 85#define IO_CGASIZE 12 /* CGA controllers */ |
| 147#define IO_COMSIZE 8 /* 8250, 16x50 com controllers */ 148#define IO_DMASIZE 16 /* 8237 DMA controllers */ 149#define IO_DPGSIZE 32 /* 74LS612 DMA page registers */ 150#define IO_EISASIZE 256 /* EISA controllers */ 151#define IO_FDCSIZE 8 /* Nec765 floppy controllers */ 152#define IO_GAMSIZE 16 /* AT compatible game controllers */ 153#define IO_GSCSIZE 8 /* GeniScan GS-4500G hand scanner */ 154#define IO_ICUSIZE 16 /* 8259A interrupt controllers */ 155#define IO_KBDSIZE 16 /* 8042 Keyboard controllers */ 156#define IO_LPTSIZE 8 /* LPT controllers, some use only 4 */ | |
| 157#define IO_MDASIZE 12 /* Monochrome display controllers */ 158#define IO_NPXSIZE 16 /* 80387/80487 NPX registers */ | 86#define IO_MDASIZE 12 /* Monochrome display controllers */ 87#define IO_NPXSIZE 16 /* 80387/80487 NPX registers */ |
| 159#define IO_PMPSIZE 2 /* 82347 power management peripheral */ 160#define IO_PSMSIZE 5 /* 8042 Keyboard controllers */ 161#define IO_RTCSIZE 16 /* CMOS real time clock, NMI control */ 162#define IO_TMRSIZE 16 /* 8253 programmable timers */ | |
| 163#define IO_VGASIZE 16 /* VGA controllers */ | 88#define IO_VGASIZE 16 /* VGA controllers */ |
| 164#define IO_WDCSIZE 8 /* WD compatible disk controllers */ | |
| 165 166#endif /* !IO_ISASIZES */ 167 168/* 169 * Input / Output Memory Physical Addresses 170 */ 171#ifndef IOM_BEGIN 172#define IOM_BEGIN 0x0A0000 /* Start of I/O Memory "hole" */ --- 14 unchanged lines hidden --- | 89 90#endif /* !IO_ISASIZES */ 91 92/* 93 * Input / Output Memory Physical Addresses 94 */ 95#ifndef IOM_BEGIN 96#define IOM_BEGIN 0x0A0000 /* Start of I/O Memory "hole" */ --- 14 unchanged lines hidden --- |