| isa.h (10615) | isa.h (12366) |
|---|---|
| 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 20 unchanged lines hidden (view full) --- 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.h 5.7 (Berkeley) 5/9/91 | 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 20 unchanged lines hidden (view full) --- 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.h 5.7 (Berkeley) 5/9/91 |
| 37 * $Id: isa.h,v 1.15 1995/06/14 07:38:31 bde Exp $ | 37 * $Id: isa.h,v 1.16 1995/09/08 03:14:00 julian Exp $ |
| 38 */ 39 40#ifndef _I386_ISA_ISA_H_ 41#define _I386_ISA_ISA_H_ 42 43/* BEWARE: Included in both assembler and C code */ 44 45/* --- 28 unchanged lines hidden (view full) --- 74 75#define IO_PMP2 0x178 /* 82347 Power Management Peripheral */ 76 77 /* 0x17A - 0x1EF Open */ 78 79#define IO_WD1 0x1F0 /* Primary Fixed Disk Controller */ 80#define IO_GAME 0x201 /* Game Controller */ 81 | 38 */ 39 40#ifndef _I386_ISA_ISA_H_ 41#define _I386_ISA_ISA_H_ 42 43/* BEWARE: Included in both assembler and C code */ 44 45/* --- 28 unchanged lines hidden (view full) --- 74 75#define IO_PMP2 0x178 /* 82347 Power Management Peripheral */ 76 77 /* 0x17A - 0x1EF Open */ 78 79#define IO_WD1 0x1F0 /* Primary Fixed Disk Controller */ 80#define IO_GAME 0x201 /* Game Controller */ 81 |
| 82 /* 0x202 (?) - 0x26F Open */ | 82 /* 0x202 - 0x22A Open */ 83 |
| 83#define IO_ASC2 0x22B /* AmiScan addr.grp. 2 */ 84 | 84#define IO_ASC2 0x22B /* AmiScan addr.grp. 2 */ 85 |
| 86 /* 0x230 - 0x26A Open */ 87 88#define IO_ASC3 0x26B /* AmiScan addr.grp. 3 */ |
|
| 85#define IO_GSC1 0x270 /* -- 0x27B! GeniScan GS-4500 addr.grp. 1 */ 86#define IO_LPT2 0x278 /* Parallel Port #2 */ | 89#define IO_GSC1 0x270 /* -- 0x27B! GeniScan GS-4500 addr.grp. 1 */ 90#define IO_LPT2 0x278 /* Parallel Port #2 */ |
| 87#define IO_ASC3 0x26B /* AmiScan addr.grp. 3 */ | 91 92 /* 0x280 - 0x2AA Open */ 93 |
| 88#define IO_ASC4 0x2AB /* AmiScan addr.grp. 4 */ 89 | 94#define IO_ASC4 0x2AB /* AmiScan addr.grp. 4 */ 95 |
| 90 /* 0x280 - 0x2DF Open */ | 96 /* 0x2B0 - 0x2DF Open */ |
| 91 92#define IO_GSC2 0x2E0 /* GeniScan GS-4500 addr.grp. 2 */ 93#define IO_COM4 0x2E8 /* COM4 i/o address */ | 97 98#define IO_GSC2 0x2E0 /* GeniScan GS-4500 addr.grp. 2 */ 99#define IO_COM4 0x2E8 /* COM4 i/o address */ |
| 94 /* 0x2F0 - 0x2F7 Open */ 95 | |
| 96#define IO_ASC5 0x2EB /* AmiScan addr.grp. 5 */ 97 | 100#define IO_ASC5 0x2EB /* AmiScan addr.grp. 5 */ 101 |
| 102 /* 0x2F0 - 0x2F7 Open */ 103 |
|
| 98#define IO_COM2 0x2F8 /* COM2 i/o address */ 99 | 104#define IO_COM2 0x2F8 /* COM2 i/o address */ 105 |
| 100#define IO_ASC6 0x32B /* AmiScan addr.grp. 6 */ | 106 /* 0x300 - 0x32A Open */ |
| 101 | 107 |
| 102 103 /* 0x300 - 0x32F Open */ 104 | 108#define IO_ASC6 0x32B /* AmiScan addr.grp. 6 */ |
| 105#define IO_AHA0 0x330 /* adaptec 1542 default addr. */ 106#define IO_BT0 0x330 /* bustek 742a default addr. */ 107#define IO_UHA0 0x330 /* ultrastore 14f default addr. */ 108#define IO_AHA1 0x334 /* adaptec 1542 default addr. */ 109#define IO_BT1 0x334 /* bustek 742a default addr. */ 110 | 109#define IO_AHA0 0x330 /* adaptec 1542 default addr. */ 110#define IO_BT0 0x330 /* bustek 742a default addr. */ 111#define IO_UHA0 0x330 /* ultrastore 14f default addr. */ 112#define IO_AHA1 0x334 /* adaptec 1542 default addr. */ 113#define IO_BT1 0x334 /* bustek 742a default addr. */ 114 |
| 111 /* 0x340 - 0x36F Open */ 112#define IO_ASC7 0x36B /* AmiScan addr.grp. 7 */ | 115 /* 0x340 - 0x36A Open */ |
| 113 | 116 |
| 117#define IO_ASC7 0x36B /* AmiScan addr.grp. 7 */ |
|
| 114#define IO_GSC3 0x370 /* GeniScan GS-4500 addr.grp. 3 */ 115#define IO_FD2 0x370 /* secondary base i/o address */ 116#define IO_LPT1 0x378 /* Parallel Port #1 */ 117 | 118#define IO_GSC3 0x370 /* GeniScan GS-4500 addr.grp. 3 */ 119#define IO_FD2 0x370 /* secondary base i/o address */ 120#define IO_LPT1 0x378 /* Parallel Port #1 */ 121 |
| 118 /* 0x380 - 0x3AF Open */ 119#define IO_ASC8 0x3AB /* AmiScan addr.grp. 8 */ | 122 /* 0x380 - 0x3AA Open */ |
| 120 | 123 |
| 124#define IO_ASC8 0x3AB /* AmiScan addr.grp. 8 */ |
|
| 121#define IO_MDA 0x3B0 /* Monochome Adapter */ 122#define IO_LPT3 0x3BC /* Monochome Adapter Printer Port */ 123#define IO_VGA 0x3C0 /* E/VGA Ports */ 124#define IO_CGA 0x3D0 /* CGA Ports */ 125#define IO_GSC4 0x3E0 /* GeniScan GS-4500 addr.grp. 4 */ 126#define IO_COM3 0x3E8 /* COM3 i/o address */ 127#define IO_ASC1 0x3EB /* AmiScan addr.grp. 1 */ 128#define IO_FD1 0x3F0 /* primary base i/o address */ 129#define IO_COM1 0x3F8 /* COM1 i/o address */ 130 131#define IO_ISAEND 0x3FF /* End (actually Max) of I/O Regs */ | 125#define IO_MDA 0x3B0 /* Monochome Adapter */ 126#define IO_LPT3 0x3BC /* Monochome Adapter Printer Port */ 127#define IO_VGA 0x3C0 /* E/VGA Ports */ 128#define IO_CGA 0x3D0 /* CGA Ports */ 129#define IO_GSC4 0x3E0 /* GeniScan GS-4500 addr.grp. 4 */ 130#define IO_COM3 0x3E8 /* COM3 i/o address */ 131#define IO_ASC1 0x3EB /* AmiScan addr.grp. 1 */ 132#define IO_FD1 0x3F0 /* primary base i/o address */ 133#define IO_COM1 0x3F8 /* COM1 i/o address */ 134 135#define IO_ISAEND 0x3FF /* End (actually Max) of I/O Regs */ |
| 132#endif /* IO_ISABEGIN */ | 136#endif /* !IO_ISABEGIN */ |
| 133 134/* 135 * Input / Output Port Sizes - these are from several sources, and tend 136 * to be the larger of what was found. 137 */ 138#ifndef IO_ISASIZES 139#define IO_ISASIZES 140 | 137 138/* 139 * Input / Output Port Sizes - these are from several sources, and tend 140 * to be the larger of what was found. 141 */ 142#ifndef IO_ISASIZES 143#define IO_ISASIZES 144 |
| 141#define IO_COMSIZE 8 /* 8250, 16x50 com controllers */ | 145#define IO_ASCSIZE 5 /* AmiScan GI1904-based hand scanner */ |
| 142#define IO_CGASIZE 16 /* CGA controllers */ | 146#define IO_CGASIZE 16 /* CGA controllers */ |
| 147#define IO_COMSIZE 8 /* 8250, 16x50 com controllers */ |
|
| 143#define IO_DMASIZE 16 /* 8237 DMA controllers */ 144#define IO_DPGSIZE 32 /* 74LS612 DMA page reisters */ | 148#define IO_DMASIZE 16 /* 8237 DMA controllers */ 149#define IO_DPGSIZE 32 /* 74LS612 DMA page reisters */ |
| 150#define IO_EISASIZE 256 /* EISA controllers */ |
|
| 145#define IO_FDCSIZE 8 /* Nec765 floppy controllers */ | 151#define IO_FDCSIZE 8 /* Nec765 floppy controllers */ |
| 146#define IO_WDCSIZE 8 /* WD compatible disk controllers */ | |
| 147#define IO_GAMSIZE 16 /* AT compatible game controllers */ | 152#define IO_GAMSIZE 16 /* AT compatible game controllers */ |
| 153#define IO_GSCSIZE 8 /* GeniScan GS-4500G hand scanner */ |
|
| 148#define IO_ICUSIZE 16 /* 8259A interrupt controllers */ 149#define IO_KBDSIZE 16 /* 8042 Keyboard controllers */ 150#define IO_LPTSIZE 8 /* LPT controllers, some use only 4 */ 151#define IO_MDASIZE 16 /* Monochrome display controllers */ | 154#define IO_ICUSIZE 16 /* 8259A interrupt controllers */ 155#define IO_KBDSIZE 16 /* 8042 Keyboard controllers */ 156#define IO_LPTSIZE 8 /* LPT controllers, some use only 4 */ 157#define IO_MDASIZE 16 /* Monochrome display controllers */ |
| 158#define IO_NPXSIZE 16 /* 80387/80487 NPX registers */ 159#define IO_PMPSIZE 2 /* 82347 power management peripheral */ |
|
| 152#define IO_RTCSIZE 16 /* CMOS real time clock, NMI control */ 153#define IO_TMRSIZE 16 /* 8253 programmable timers */ | 160#define IO_RTCSIZE 16 /* CMOS real time clock, NMI control */ 161#define IO_TMRSIZE 16 /* 8253 programmable timers */ |
| 154#define IO_NPXSIZE 16 /* 80387/80487 NPX registers */ | |
| 155#define IO_VGASIZE 16 /* VGA controllers */ | 162#define IO_VGASIZE 16 /* VGA controllers */ |
| 156#define IO_EISASIZE 256 /* EISA controllers */ 157#define IO_PMPSIZE 2 /* 82347 power management peripheral */ | 163#define IO_WDCSIZE 8 /* WD compatible disk controllers */ |
| 158 | 164 |
| 159#endif /* IO_ISASIZES */ | 165#endif /* !IO_ISASIZES */ |
| 160 161/* 162 * Input / Output Memory Physical Addresses 163 */ 164#ifndef IOM_BEGIN 165#define IOM_BEGIN 0x0A0000 /* Start of I/O Memory "hole" */ 166#define IOM_END 0x100000 /* End of I/O Memory "hole" */ 167#define IOM_SIZE (IOM_END - IOM_BEGIN) | 166 167/* 168 * Input / Output Memory Physical Addresses 169 */ 170#ifndef IOM_BEGIN 171#define IOM_BEGIN 0x0A0000 /* Start of I/O Memory "hole" */ 172#define IOM_END 0x100000 /* End of I/O Memory "hole" */ 173#define IOM_SIZE (IOM_END - IOM_BEGIN) |
| 168#endif /* IOM_BEGIN */ | 174#endif /* !IOM_BEGIN */ |
| 169 170/* 171 * RAM Physical Address Space (ignoring the above mentioned "hole") 172 */ 173#ifndef RAM_BEGIN 174#define RAM_BEGIN 0x0000000 /* Start of RAM Memory */ 175#define RAM_END 0x1000000 /* End of RAM Memory */ 176#define RAM_SIZE (RAM_END - RAM_BEGIN) | 175 176/* 177 * RAM Physical Address Space (ignoring the above mentioned "hole") 178 */ 179#ifndef RAM_BEGIN 180#define RAM_BEGIN 0x0000000 /* Start of RAM Memory */ 181#define RAM_END 0x1000000 /* End of RAM Memory */ 182#define RAM_SIZE (RAM_END - RAM_BEGIN) |
| 177#endif /* RAM_BEGIN */ | 183#endif /* !RAM_BEGIN */ |
| 178 179/* 180 * Oddball Physical Memory Addresses 181 */ 182#ifndef COMPAQ_RAMRELOC 183#define COMPAQ_RAMRELOC 0x80C00000 /* Compaq RAM relocation/diag */ 184#define COMPAQ_RAMSETUP 0x80C00002 /* Compaq RAM setup */ 185#define WEITEK_FPU 0xC0000000 /* WTL 2167 */ 186#define CYRIX_EMC 0xC0000000 /* Cyrix EMC */ | 184 185/* 186 * Oddball Physical Memory Addresses 187 */ 188#ifndef COMPAQ_RAMRELOC 189#define COMPAQ_RAMRELOC 0x80C00000 /* Compaq RAM relocation/diag */ 190#define COMPAQ_RAMSETUP 0x80C00002 /* Compaq RAM setup */ 191#define WEITEK_FPU 0xC0000000 /* WTL 2167 */ 192#define CYRIX_EMC 0xC0000000 /* Cyrix EMC */ |
| 187#endif /* COMPAQ_RAMRELOC */ | 193#endif /* !COMPAQ_RAMRELOC */ |
| 188 189#endif /* !_I386_ISA_ISA_H_ */ | 194 195#endif /* !_I386_ISA_ISA_H_ */ |