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lsi64854.c (220939) lsi64854.c (226381)
1/*-
2 * Copyright (c) 2004 Scott Long
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
56 * POSSIBILITY OF SUCH DAMAGE.
57 */
58
59#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2004 Scott Long
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
56 * POSSIBILITY OF SUCH DAMAGE.
57 */
58
59#include <sys/cdefs.h>
60__FBSDID("$FreeBSD: head/sys/sparc64/sbus/lsi64854.c 220939 2011-04-22 09:31:40Z marius $");
60__FBSDID("$FreeBSD: head/sys/sparc64/sbus/lsi64854.c 226381 2011-10-15 09:29:43Z marius $");
61
62#include <sys/param.h>
63#include <sys/systm.h>
64#include <sys/bus.h>
65#include <sys/kernel.h>
66#include <sys/lock.h>
67#include <sys/mutex.h>
68#include <sys/rman.h>

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80#include <dev/esp/ncr53c9xvar.h>
81
82#ifdef DEBUG
83#define LDB_SCSI 1
84#define LDB_ENET 2
85#define LDB_PP 4
86#define LDB_ANY 0xff
87int lsi64854debug = 0;
61
62#include <sys/param.h>
63#include <sys/systm.h>
64#include <sys/bus.h>
65#include <sys/kernel.h>
66#include <sys/lock.h>
67#include <sys/mutex.h>
68#include <sys/rman.h>

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80#include <dev/esp/ncr53c9xvar.h>
81
82#ifdef DEBUG
83#define LDB_SCSI 1
84#define LDB_ENET 2
85#define LDB_PP 4
86#define LDB_ANY 0xff
87int lsi64854debug = 0;
88#define DPRINTF(a,x) do { if (lsi64854debug & (a)) printf x ; } while (0)
88#define DPRINTF(a,x) \
89 do { \
90 if ((lsi64854debug & (a)) != 0) \
91 printf x; \
92 } while (/* CONSTCOND */0)
89#else
90#define DPRINTF(a,x)
91#endif
92
93#define MAX_DMA_SZ (16*1024*1024)
94
95static void lsi64854_reset(struct lsi64854_softc *);
96static void lsi64854_map_scsi(void *, bus_dma_segment_t *, int, int);
93#else
94#define DPRINTF(a,x)
95#endif
96
97#define MAX_DMA_SZ (16*1024*1024)
98
99static void lsi64854_reset(struct lsi64854_softc *);
100static void lsi64854_map_scsi(void *, bus_dma_segment_t *, int, int);
97static int lsi64854_setup(struct lsi64854_softc *, caddr_t *, size_t *,
101static int lsi64854_setup(struct lsi64854_softc *, void **, size_t *,
98 int, size_t *);
99static int lsi64854_scsi_intr(void *);
100static int lsi64854_enet_intr(void *);
102 int, size_t *);
103static int lsi64854_scsi_intr(void *);
104static int lsi64854_enet_intr(void *);
101static int lsi64854_setup_pp(struct lsi64854_softc *, caddr_t *, size_t *,
102 int, size_t *);
105static int lsi64854_setup_pp(struct lsi64854_softc *, void **,
106 size_t *, int, size_t *);
103static int lsi64854_pp_intr(void *);
104
105/*
106 * Finish attaching this DMA device.
107 * Front-end must fill in these fields:
108 * sc_res
109 * sc_burst
110 * sc_channel (one of SCSI, ENET, PP)

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230 if (count == 0) { \
231 printf("%s: line %d: CSR = 0x%lx\n", __FILE__, __LINE__, \
232 (u_long)L64854_GCSR(SC)); \
233 if (DONTPANIC) \
234 printf(MSG); \
235 else \
236 panic(MSG); \
237 } \
107static int lsi64854_pp_intr(void *);
108
109/*
110 * Finish attaching this DMA device.
111 * Front-end must fill in these fields:
112 * sc_res
113 * sc_burst
114 * sc_channel (one of SCSI, ENET, PP)

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234 if (count == 0) { \
235 printf("%s: line %d: CSR = 0x%lx\n", __FILE__, __LINE__, \
236 (u_long)L64854_GCSR(SC)); \
237 if (DONTPANIC) \
238 printf(MSG); \
239 else \
240 panic(MSG); \
241 } \
238} while (0)
242} while (/* CONSTCOND */0)
239
240#define DMA_DRAIN(sc, dontpanic) do { \
241 uint32_t csr; \
242 /* \
243 * DMA rev0 & rev1: we are not allowed to touch the DMA "flush" \
244 * and "drain" bits while it is still thinking about a \
245 * request. \
246 * other revs: D_ESC_R_PEND bit reads as 0 \

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259 \
260 L64854_SCSR(sc,csr); \
261 } \
262 /* \
263 * Wait for draining to finish \
264 * rev0 & rev1 call this PACKCNT \
265 */ \
266 DMAWAIT(sc, L64854_GCSR(sc) & L64854_DRAINING, "DRAINING", dontpanic);\
243
244#define DMA_DRAIN(sc, dontpanic) do { \
245 uint32_t csr; \
246 /* \
247 * DMA rev0 & rev1: we are not allowed to touch the DMA "flush" \
248 * and "drain" bits while it is still thinking about a \
249 * request. \
250 * other revs: D_ESC_R_PEND bit reads as 0 \

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263 \
264 L64854_SCSR(sc,csr); \
265 } \
266 /* \
267 * Wait for draining to finish \
268 * rev0 & rev1 call this PACKCNT \
269 */ \
270 DMAWAIT(sc, L64854_GCSR(sc) & L64854_DRAINING, "DRAINING", dontpanic);\
267} while(0)
271} while (/* CONSTCOND */0)
268
269#define DMA_FLUSH(sc, dontpanic) do { \
270 uint32_t csr; \
271 /* \
272 * DMA rev0 & rev1: we are not allowed to touch the DMA "flush" \
273 * and "drain" bits while it is still thinking about a \
274 * request. \
275 * other revs: D_ESC_R_PEND bit reads as 0 \
276 */ \
277 DMAWAIT(sc, L64854_GCSR(sc) & D_ESC_R_PEND, "R_PEND", dontpanic);\
278 csr = L64854_GCSR(sc); \
279 csr &= ~(L64854_WRITE|L64854_EN_DMA); /* no-ops on ENET */ \
280 csr |= L64854_INVALIDATE; /* XXX FAS ? */ \
281 L64854_SCSR(sc,csr); \
272
273#define DMA_FLUSH(sc, dontpanic) do { \
274 uint32_t csr; \
275 /* \
276 * DMA rev0 & rev1: we are not allowed to touch the DMA "flush" \
277 * and "drain" bits while it is still thinking about a \
278 * request. \
279 * other revs: D_ESC_R_PEND bit reads as 0 \
280 */ \
281 DMAWAIT(sc, L64854_GCSR(sc) & D_ESC_R_PEND, "R_PEND", dontpanic);\
282 csr = L64854_GCSR(sc); \
283 csr &= ~(L64854_WRITE|L64854_EN_DMA); /* no-ops on ENET */ \
284 csr |= L64854_INVALIDATE; /* XXX FAS ? */ \
285 L64854_SCSR(sc,csr); \
282} while(0)
286} while (/* CONSTCOND */0)
283
284static void
285lsi64854_reset(struct lsi64854_softc *sc)
286{
287 uint32_t csr;
288
289 DMA_FLUSH(sc, 1);
290 csr = L64854_GCSR(sc);

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368 bus_write_4(sc->sc_res, L64854_REG_ADDR, segs[0].ds_addr);
369}
370
371#define DMAMAX(a) (MAX_DMA_SZ - ((a) & (MAX_DMA_SZ - 1)))
372/*
373 * setup a DMA transfer
374 */
375static int
287
288static void
289lsi64854_reset(struct lsi64854_softc *sc)
290{
291 uint32_t csr;
292
293 DMA_FLUSH(sc, 1);
294 csr = L64854_GCSR(sc);

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372 bus_write_4(sc->sc_res, L64854_REG_ADDR, segs[0].ds_addr);
373}
374
375#define DMAMAX(a) (MAX_DMA_SZ - ((a) & (MAX_DMA_SZ - 1)))
376/*
377 * setup a DMA transfer
378 */
379static int
376lsi64854_setup(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
380lsi64854_setup(struct lsi64854_softc *sc, void **addr, size_t *len,
377 int datain, size_t *dmasize)
378{
379 long bcnt;
380 uint32_t csr;
381
382 DMA_FLUSH(sc, 0);
383
384#if 0

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542 if (sc->sc_dmasize != 0) {
543 bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap,
544 (csr & D_WRITE) != 0 ? BUS_DMASYNC_POSTREAD :
545 BUS_DMASYNC_POSTWRITE);
546 bus_dmamap_unload(sc->sc_buffer_dmat, sc->sc_dmamap);
547 }
548
549 *sc->sc_dmalen -= trans;
381 int datain, size_t *dmasize)
382{
383 long bcnt;
384 uint32_t csr;
385
386 DMA_FLUSH(sc, 0);
387
388#if 0

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546 if (sc->sc_dmasize != 0) {
547 bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap,
548 (csr & D_WRITE) != 0 ? BUS_DMASYNC_POSTREAD :
549 BUS_DMASYNC_POSTWRITE);
550 bus_dmamap_unload(sc->sc_buffer_dmat, sc->sc_dmamap);
551 }
552
553 *sc->sc_dmalen -= trans;
550 *sc->sc_dmaaddr += trans;
554 *sc->sc_dmaaddr = (char *)*sc->sc_dmaaddr + trans;
551
552#if 0 /* this is not normal operation just yet */
553 if (*sc->sc_dmalen == 0 || nsc->sc_phase != nsc->sc_prevphase)
554 return (0);
555
556 /* and again */
557 dma_start(sc, sc->sc_dmaaddr, sc->sc_dmalen, DMACSR(sc) & D_WRITE);
558 return (1);

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615
616 bus_write_4(sc->sc_res, L64854_REG_CNT, sc->sc_dmasize);
617}
618
619/*
620 * setup a DMA transfer
621 */
622static int
555
556#if 0 /* this is not normal operation just yet */
557 if (*sc->sc_dmalen == 0 || nsc->sc_phase != nsc->sc_prevphase)
558 return (0);
559
560 /* and again */
561 dma_start(sc, sc->sc_dmaaddr, sc->sc_dmalen, DMACSR(sc) & D_WRITE);
562 return (1);

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619
620 bus_write_4(sc->sc_res, L64854_REG_CNT, sc->sc_dmasize);
621}
622
623/*
624 * setup a DMA transfer
625 */
626static int
623lsi64854_setup_pp(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
627lsi64854_setup_pp(struct lsi64854_softc *sc, void **addr, size_t *len,
624 int datain, size_t *dmasize)
625{
626 uint32_t csr;
627
628 DMA_FLUSH(sc, 0);
629
630 sc->sc_dmaaddr = addr;
631 sc->sc_dmalen = len;

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709 csr &= ~D_EN_DMA;
710 L64854_SCSR(sc, csr);
711 sc->sc_active = 0;
712
713 trans = sc->sc_dmasize - resid;
714 if (trans < 0) /* transferred < 0? */
715 trans = sc->sc_dmasize;
716 *sc->sc_dmalen -= trans;
628 int datain, size_t *dmasize)
629{
630 uint32_t csr;
631
632 DMA_FLUSH(sc, 0);
633
634 sc->sc_dmaaddr = addr;
635 sc->sc_dmalen = len;

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713 csr &= ~D_EN_DMA;
714 L64854_SCSR(sc, csr);
715 sc->sc_active = 0;
716
717 trans = sc->sc_dmasize - resid;
718 if (trans < 0) /* transferred < 0? */
719 trans = sc->sc_dmasize;
720 *sc->sc_dmalen -= trans;
717 *sc->sc_dmaaddr += trans;
721 *sc->sc_dmaaddr = (char *)*sc->sc_dmaaddr + trans;
718
719 if (sc->sc_dmasize != 0) {
720 bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap,
721 (csr & D_WRITE) != 0 ? BUS_DMASYNC_POSTREAD :
722 BUS_DMASYNC_POSTWRITE);
723 bus_dmamap_unload(sc->sc_buffer_dmat, sc->sc_dmamap);
724 }
725
726 return (ret != 0);
727}
722
723 if (sc->sc_dmasize != 0) {
724 bus_dmamap_sync(sc->sc_buffer_dmat, sc->sc_dmamap,
725 (csr & D_WRITE) != 0 ? BUS_DMASYNC_POSTREAD :
726 BUS_DMASYNC_POSTWRITE);
727 bus_dmamap_unload(sc->sc_buffer_dmat, sc->sc_dmamap);
728 }
729
730 return (ret != 0);
731}