| schizo.c (183423) | schizo.c (184428) |
|---|---|
| 1/*- 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * Copyright (c) 2001 - 2003 by Thomas Moestl <tmm@FreeBSD.org> 4 * Copyright (c) 2005, 2007, 2008 by Marius Strobl <marius@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 18 unchanged lines hidden (view full) --- 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp 31 * from: FreeBSD: psycho.c 183152 2008-09-18 19:45:22Z marius 32 */ 33 34#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * Copyright (c) 2001 - 2003 by Thomas Moestl <tmm@FreeBSD.org> 4 * Copyright (c) 2005, 2007, 2008 by Marius Strobl <marius@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 18 unchanged lines hidden (view full) --- 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp 31 * from: FreeBSD: psycho.c 183152 2008-09-18 19:45:22Z marius 32 */ 33 34#include <sys/cdefs.h> |
| 35__FBSDID("$FreeBSD: head/sys/sparc64/pci/schizo.c 183423 2008-09-28 00:07:05Z marius $"); | 35__FBSDID("$FreeBSD: head/sys/sparc64/pci/schizo.c 184428 2008-10-28 22:05:20Z marius $"); |
| 36 37/* 38 * Driver for `Schizo' Fireplane/Safari to PCI 2.1 and `Tomatillo' JBus to 39 * PCI 2.2 bridges 40 */ 41 42#include "opt_ofw_pci.h" 43#include "opt_schizo.h" --- 126 unchanged lines hidden (view full) --- 170 bus_addr_t sica_clr; 171}; 172 173struct schizo_dmasync { 174 struct schizo_softc *sds_sc; 175 driver_filter_t *sds_handler; 176 void *sds_arg; 177 void *sds_cookie; | 36 37/* 38 * Driver for `Schizo' Fireplane/Safari to PCI 2.1 and `Tomatillo' JBus to 39 * PCI 2.2 bridges 40 */ 41 42#include "opt_ofw_pci.h" 43#include "opt_schizo.h" --- 126 unchanged lines hidden (view full) --- 170 bus_addr_t sica_clr; 171}; 172 173struct schizo_dmasync { 174 struct schizo_softc *sds_sc; 175 driver_filter_t *sds_handler; 176 void *sds_arg; 177 void *sds_cookie; |
| 178 bus_size_t sds_syncreg; | |
| 179 uint64_t sds_syncval; 180 u_int sds_bswar; 181}; 182 183#define SCHIZO_PERF_CNT_QLTY 100 184 185#define SCHIZO_SPC_READ_8(spc, sc, offs) \ 186 bus_read_8((sc)->sc_mem_res[(spc)], (offs)) --- 763 unchanged lines hidden (view full) --- 950#define VIS_BLOCKSIZE 64 951 952static int 953schizo_dmasync(void *arg) 954{ 955 static u_char buf[VIS_BLOCKSIZE] __aligned(VIS_BLOCKSIZE); 956 struct schizo_dmasync *sds = arg; 957 struct schizo_softc *sc = sds->sds_sc; | 178 uint64_t sds_syncval; 179 u_int sds_bswar; 180}; 181 182#define SCHIZO_PERF_CNT_QLTY 100 183 184#define SCHIZO_SPC_READ_8(spc, sc, offs) \ 185 bus_read_8((sc)->sc_mem_res[(spc)], (offs)) --- 763 unchanged lines hidden (view full) --- 949#define VIS_BLOCKSIZE 64 950 951static int 952schizo_dmasync(void *arg) 953{ 954 static u_char buf[VIS_BLOCKSIZE] __aligned(VIS_BLOCKSIZE); 955 struct schizo_dmasync *sds = arg; 956 struct schizo_softc *sc = sds->sds_sc; |
| 958 uint64_t reg; | 957 register_t reg, s; |
| 959 int timeout; 960 | 958 int timeout; 959 |
| 961 SCHIZO_PCI_WRITE_8(sc, sds->sds_syncreg, sds->sds_syncval); | 960 SCHIZO_PCI_WRITE_8(sc, TOMXMS_PCI_DMA_SYNC_PEND, sds->sds_syncval); |
| 962 timeout = 1000000; | 961 timeout = 1000000; |
| 963 for (; (SCHIZO_PCI_READ_8(sc, sds->sds_syncreg) & | 962 for (; (SCHIZO_PCI_READ_8(sc, TOMXMS_PCI_DMA_SYNC_PEND) & |
| 964 sds->sds_syncval) != 0;) 965 if (--timeout < 0) 966 panic("%s: DMA does not sync", __func__); 967 968 if (sds->sds_bswar != 0) { | 963 sds->sds_syncval) != 0;) 964 if (--timeout < 0) 965 panic("%s: DMA does not sync", __func__); 966 967 if (sds->sds_bswar != 0) { |
| 969 critical_enter(); | 968 s = intr_disable(); |
| 970 reg = rd(fprs); 971 wr(fprs, reg | FPRS_FEF, 0); | 969 reg = rd(fprs); 970 wr(fprs, reg | FPRS_FEF, 0); |
| 972 __asm__ __volatile__("stda %%f0, [%0] %1" | 971 __asm __volatile("stda %%f0, [%0] %1" |
| 973 : : "r" (buf), "n" (ASI_BLK_COMMIT_S)); | 972 : : "r" (buf), "n" (ASI_BLK_COMMIT_S)); |
| 974 wr(fprs, reg, 0); | |
| 975 membar(Sync); | 973 membar(Sync); |
| 976 critical_exit(); | 974 wr(fprs, reg, 0); 975 intr_restore(s); |
| 977 } 978 return (sds->sds_handler(sds->sds_arg)); 979} 980 981static void 982schizo_intr_enable(void *arg) 983{ 984 struct intr_vector *iv = arg; --- 49 unchanged lines hidden (view full) --- 1034 vec = rman_get_start(ires); 1035 if (INTIGN(vec) != sc->sc_ign || 1036 intr_vectors[vec].iv_ic != &schizo_ic) { 1037 device_printf(dev, "invalid interrupt vector 0x%lx\n", vec); 1038 return (EINVAL); 1039 } 1040 1041 /* | 976 } 977 return (sds->sds_handler(sds->sds_arg)); 978} 979 980static void 981schizo_intr_enable(void *arg) 982{ 983 struct intr_vector *iv = arg; --- 49 unchanged lines hidden (view full) --- 1033 vec = rman_get_start(ires); 1034 if (INTIGN(vec) != sc->sc_ign || 1035 intr_vectors[vec].iv_ic != &schizo_ic) { 1036 device_printf(dev, "invalid interrupt vector 0x%lx\n", vec); 1037 return (EINVAL); 1038 } 1039 1040 /* |
| 1042 * Schizo revision >= 2.3 (i.e. version >= 5) and Tomatillo bridges 1043 * need to be manually told to sync DMA writes. | 1041 * Tomatillo and XMITS bridges need to be told to sync DMA writes 1042 * based on the INO of the respective device. |
| 1044 * Tomatillo revision <= 2.3 (i.e. version <= 4) bridges additionally 1045 * need a block store as a workaround for a hardware bug. 1046 * XXX setup of the wrapper and the contents of schizo_dmasync() 1047 * should be moved to schizo(4)-specific bus_dma_tag_create() and 1048 * bus_dmamap_sync() methods, respectively, once DMA tag creation 1049 * is newbus'ified, so the wrapper isn't only applied for interrupt 1050 * handlers but also for polling(4) callbacks. 1051 */ | 1043 * Tomatillo revision <= 2.3 (i.e. version <= 4) bridges additionally 1044 * need a block store as a workaround for a hardware bug. 1045 * XXX setup of the wrapper and the contents of schizo_dmasync() 1046 * should be moved to schizo(4)-specific bus_dma_tag_create() and 1047 * bus_dmamap_sync() methods, respectively, once DMA tag creation 1048 * is newbus'ified, so the wrapper isn't only applied for interrupt 1049 * handlers but also for polling(4) callbacks. 1050 */ |
| 1052 if ((sc->sc_mode == SCHIZO_MODE_SCZ && sc->sc_ver >= 5) || 1053 sc->sc_mode == SCHIZO_MODE_TOM) { | 1051 if (sc->sc_mode == SCHIZO_MODE_TOM || sc->sc_mode == SCHIZO_MODE_XMS) { |
| 1054 sds = malloc(sizeof(*sds), M_DEVBUF, M_NOWAIT | M_ZERO); 1055 if (sds == NULL) 1056 return (ENOMEM); 1057 sds->sds_sc = sc; 1058 sds->sds_arg = arg; | 1052 sds = malloc(sizeof(*sds), M_DEVBUF, M_NOWAIT | M_ZERO); 1053 if (sds == NULL) 1054 return (ENOMEM); 1055 sds->sds_sc = sc; 1056 sds->sds_arg = arg; |
| 1059 sds->sds_syncreg = sc->sc_mode == SCHIZO_MODE_SCZ ? 1060 SCZ_PCI_DMA_SYNC : TOMXMS_PCI_DMA_SYNC_PEND; | |
| 1061 sds->sds_syncval = 1ULL << INTINO(vec); 1062 if (sc->sc_mode == SCHIZO_MODE_TOM && sc->sc_ver <= 4) 1063 sds->sds_bswar = 1; 1064 if (intr == NULL) { 1065 sds->sds_handler = filt; 1066 error = bus_generic_setup_intr(dev, child, ires, 1067 flags, schizo_dmasync, intr, sds, cookiep); 1068 } else { --- 198 unchanged lines hidden --- | 1057 sds->sds_syncval = 1ULL << INTINO(vec); 1058 if (sc->sc_mode == SCHIZO_MODE_TOM && sc->sc_ver <= 4) 1059 sds->sds_bswar = 1; 1060 if (intr == NULL) { 1061 sds->sds_handler = filt; 1062 error = bus_generic_setup_intr(dev, child, ires, 1063 flags, schizo_dmasync, intr, sds, cookiep); 1064 } else { --- 198 unchanged lines hidden --- |