1/*-
2 * Copyright (c) 1999, 2000 Matthew R. Green
3 * Copyright (c) 2001 - 2003 by Thomas Moestl <tmm@FreeBSD.org>
4 * Copyright (c) 2005, 2007, 2008 by Marius Strobl <marius@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
--- 18 unchanged lines hidden (view full) ---
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp
31 * from: FreeBSD: psycho.c 183152 2008-09-18 19:45:22Z marius
32 */
33
34#include <sys/cdefs.h>
35__FBSDID("$FreeBSD: head/sys/sparc64/pci/schizo.c 206020 2010-03-31 22:32:56Z marius $");
36
37/*
38 * Driver for `Schizo' Fireplane/Safari to PCI 2.1 and `Tomatillo' JBus to
39 * PCI 2.2 bridges
40 */
41
42#include "opt_ofw_pci.h"
43#include "opt_schizo.h"
44
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/bus.h>
48#include <sys/kernel.h>
49#include <sys/lock.h>
50#include <sys/malloc.h>
51#include <sys/module.h>
52#include <sys/mutex.h>
53#include <sys/pcpu.h>
54#include <sys/rman.h>
55#include <sys/time.h>
56#include <sys/timetc.h>
57
58#include <dev/ofw/ofw_bus.h>
59#include <dev/ofw/ofw_pci.h>
60#include <dev/ofw/openfirm.h>
61
62#include <machine/bus.h>
--- 317 unchanged lines hidden (view full) ---
380#ifdef SCHIZO_DEBUG
381 device_printf(dev, "PCI DR 0x%016llx -> 0x%016llx\n",
382 (unsigned long long)SCHIZO_PCI_READ_8(sc, STX_PCI_DIAG),
383 (unsigned long long)reg);
384#endif
385 SCHIZO_PCI_WRITE_8(sc, STX_PCI_DIAG, reg);
386
387 /*
388 * On Tomatillo clear the I/O prefetch lengths (workaround for a
389 * Jalapeno bug).
390 */
391 if (mode == SCHIZO_MODE_TOM)
392 SCHIZO_PCI_WRITE_8(sc, TOM_PCI_IOC_CSR, TOM_PCI_IOC_PW |
393 (1 << TOM_PCI_IOC_PREF_OFF_SHIFT) | TOM_PCI_IOC_CPRM |
394 TOM_PCI_IOC_CPRO | TOM_PCI_IOC_CPRL);
395
--- 296 unchanged lines hidden (view full) ---
692 * Set the latency timer register as this isn't always done by the
693 * firmware.
694 */
695 PCIB_WRITE_CONFIG(dev, sc->sc_pci_secbus, STX_CS_DEVICE, STX_CS_FUNC,
696 PCIR_LATTIMER, OFW_PCI_LATENCY, 1);
697
698 ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(ofw_pci_intr_t));
699
700 /*
701 * At least when booting Fire V890 from disk a Schizo comes up with
702 * a PCI bus error residing which triggers as soon as we register
703 * schizo_pci_bus() even when clearing it from all involved registers
704 * beforehand (but is quiet once it has fired). Thus we make PCI bus
705 * errors non-fatal until we actually touch the bus.
706 */
707 sc->sc_flags |= SCHIZO_FLAGS_ARMED;
708 device_add_child(dev, "pci", -1);
709 return (bus_generic_attach(dev));
710}
711
712static void
713schizo_set_intr(struct schizo_softc *sc, u_int index, u_int ino,
714 driver_filter_t handler)
715{
--- 80 unchanged lines hidden (view full) ---
796 * Interrupt handlers
797 */
798static int
799schizo_pci_bus(void *arg)
800{
801 struct schizo_softc *sc = arg;
802 uint64_t afar, afsr, csr, iommu;
803 uint32_t status;
804
805 afar = SCHIZO_PCI_READ_8(sc, STX_PCI_AFAR);
806 afsr = SCHIZO_PCI_READ_8(sc, STX_PCI_AFSR);
807 csr = SCHIZO_PCI_READ_8(sc, STX_PCI_CTRL);
808 iommu = SCHIZO_PCI_READ_8(sc, STX_PCI_IOMMU);
809 status = PCIB_READ_CONFIG(sc->sc_dev, sc->sc_pci_secbus,
810 STX_CS_DEVICE, STX_CS_FUNC, PCIR_STATUS, 2);
811 if ((sc->sc_flags & SCHIZO_FLAGS_ARMED) == 0)
812 goto clear_error;
813 if ((csr & STX_PCI_CTRL_MMU_ERR) != 0) {
814 if ((iommu & TOM_PCI_IOMMU_ERR) == 0)
815 goto clear_error;
816
817 /* These are non-fatal if target abort was signaled. */
818 if ((status & PCIM_STATUS_STABORT) != 0 &&
819 ((iommu & TOM_PCI_IOMMU_ERRMASK) ==
820 TOM_PCI_IOMMU_INVALID_ERR ||
821 (iommu & TOM_PCI_IOMMU_ERR_ILLTSBTBW) != 0 ||
822 (iommu & TOM_PCI_IOMMU_ERR_BAD_VA) != 0)) {
823 SCHIZO_PCI_WRITE_8(sc, STX_PCI_IOMMU, iommu);
824 goto clear_error;
825 }
826 }
827
828 panic("%s: PCI bus %c error AFAR %#llx AFSR %#llx PCI CSR %#llx "
829 "IOMMU %#llx STATUS %#llx", device_get_nameunit(sc->sc_dev),
830 'A' + sc->sc_half, (unsigned long long)afar,
831 (unsigned long long)afsr, (unsigned long long)csr,
832 (unsigned long long)iommu, (unsigned long long)status);
833
834 clear_error:
835 if (bootverbose)
836 device_printf(sc->sc_dev,
837 "PCI bus %c error AFAR %#llx AFSR %#llx PCI CSR %#llx "
838 "STATUS %#llx", 'A' + sc->sc_half,
839 (unsigned long long)afar, (unsigned long long)afsr,
840 (unsigned long long)csr, (unsigned long long)status);
841 /* Clear the error bits that we caught. */
842 PCIB_WRITE_CONFIG(sc->sc_dev, sc->sc_pci_secbus, STX_CS_DEVICE,
843 STX_CS_FUNC, PCIR_STATUS, status, 2);
844 SCHIZO_PCI_WRITE_8(sc, STX_PCI_CTRL, csr);
845 SCHIZO_PCI_WRITE_8(sc, STX_PCI_AFSR, afsr);
846 return (FILTER_HANDLED);
847}
848
849static int
850schizo_ue(void *arg)
851{
852 struct schizo_softc *sc = arg;
853 uint64_t afar, afsr;
854 int i;
855
856 mtx_lock_spin(sc->sc_mtx);
857 afar = SCHIZO_CTRL_READ_8(sc, STX_CTRL_UE_AFAR);
858 for (i = 0; i < 1000; i++)
859 if (((afsr = SCHIZO_CTRL_READ_8(sc, STX_CTRL_UE_AFSR)) &
860 STX_CTRL_CE_AFSR_ERRPNDG) == 0)
861 break;
862 mtx_unlock_spin(sc->sc_mtx);
863 panic("%s: uncorrectable DMA error AFAR %#llx AFSR %#llx",
864 device_get_nameunit(sc->sc_dev), (unsigned long long)afar,
865 (unsigned long long)afsr);
866 return (FILTER_HANDLED);
867}
868
869static int
870schizo_ce(void *arg)
871{
872 struct schizo_softc *sc = arg;
873 uint64_t afar, afsr;
874 int i;
875
876 mtx_lock_spin(sc->sc_mtx);
877 afar = SCHIZO_CTRL_READ_8(sc, STX_CTRL_CE_AFAR);
878 for (i = 0; i < 1000; i++)
879 if (((afsr = SCHIZO_CTRL_READ_8(sc, STX_CTRL_UE_AFSR)) &
880 STX_CTRL_CE_AFSR_ERRPNDG) == 0)
881 break;
882 device_printf(sc->sc_dev,
883 "correctable DMA error AFAR %#llx AFSR %#llx\n",
884 (unsigned long long)afar, (unsigned long long)afsr);
885 /* Clear the error bits that we caught. */
886 SCHIZO_CTRL_WRITE_8(sc, STX_CTRL_UE_AFSR, afsr);
887 mtx_unlock_spin(sc->sc_mtx);
888 return (FILTER_HANDLED);
889}
890
891static int
892schizo_host_bus(void *arg)
893{
894 struct schizo_softc *sc = arg;
895 uint64_t errlog;
--- 587 unchanged lines hidden ---
2 * Copyright (c) 1999, 2000 Matthew R. Green
3 * Copyright (c) 2001 - 2003 by Thomas Moestl <tmm@FreeBSD.org>
4 * Copyright (c) 2005, 2007, 2008 by Marius Strobl <marius@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
--- 18 unchanged lines hidden (view full) ---
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp
31 * from: FreeBSD: psycho.c 183152 2008-09-18 19:45:22Z marius
32 */
33
34#include <sys/cdefs.h>
35__FBSDID("$FreeBSD: head/sys/sparc64/pci/schizo.c 206020 2010-03-31 22:32:56Z marius $");
36
37/*
38 * Driver for `Schizo' Fireplane/Safari to PCI 2.1 and `Tomatillo' JBus to
39 * PCI 2.2 bridges
40 */
41
42#include "opt_ofw_pci.h"
43#include "opt_schizo.h"
44
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/bus.h>
48#include <sys/kernel.h>
49#include <sys/lock.h>
50#include <sys/malloc.h>
51#include <sys/module.h>
52#include <sys/mutex.h>
53#include <sys/pcpu.h>
54#include <sys/rman.h>
55#include <sys/time.h>
56#include <sys/timetc.h>
57
58#include <dev/ofw/ofw_bus.h>
59#include <dev/ofw/ofw_pci.h>
60#include <dev/ofw/openfirm.h>
61
62#include <machine/bus.h>
--- 317 unchanged lines hidden (view full) ---
380#ifdef SCHIZO_DEBUG
381 device_printf(dev, "PCI DR 0x%016llx -> 0x%016llx\n",
382 (unsigned long long)SCHIZO_PCI_READ_8(sc, STX_PCI_DIAG),
383 (unsigned long long)reg);
384#endif
385 SCHIZO_PCI_WRITE_8(sc, STX_PCI_DIAG, reg);
386
387 /*
388 * On Tomatillo clear the I/O prefetch lengths (workaround for a
389 * Jalapeno bug).
390 */
391 if (mode == SCHIZO_MODE_TOM)
392 SCHIZO_PCI_WRITE_8(sc, TOM_PCI_IOC_CSR, TOM_PCI_IOC_PW |
393 (1 << TOM_PCI_IOC_PREF_OFF_SHIFT) | TOM_PCI_IOC_CPRM |
394 TOM_PCI_IOC_CPRO | TOM_PCI_IOC_CPRL);
395
--- 296 unchanged lines hidden (view full) ---
692 * Set the latency timer register as this isn't always done by the
693 * firmware.
694 */
695 PCIB_WRITE_CONFIG(dev, sc->sc_pci_secbus, STX_CS_DEVICE, STX_CS_FUNC,
696 PCIR_LATTIMER, OFW_PCI_LATENCY, 1);
697
698 ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(ofw_pci_intr_t));
699
700 /*
701 * At least when booting Fire V890 from disk a Schizo comes up with
702 * a PCI bus error residing which triggers as soon as we register
703 * schizo_pci_bus() even when clearing it from all involved registers
704 * beforehand (but is quiet once it has fired). Thus we make PCI bus
705 * errors non-fatal until we actually touch the bus.
706 */
707 sc->sc_flags |= SCHIZO_FLAGS_ARMED;
708 device_add_child(dev, "pci", -1);
709 return (bus_generic_attach(dev));
710}
711
712static void
713schizo_set_intr(struct schizo_softc *sc, u_int index, u_int ino,
714 driver_filter_t handler)
715{
--- 80 unchanged lines hidden (view full) ---
796 * Interrupt handlers
797 */
798static int
799schizo_pci_bus(void *arg)
800{
801 struct schizo_softc *sc = arg;
802 uint64_t afar, afsr, csr, iommu;
803 uint32_t status;
804
805 afar = SCHIZO_PCI_READ_8(sc, STX_PCI_AFAR);
806 afsr = SCHIZO_PCI_READ_8(sc, STX_PCI_AFSR);
807 csr = SCHIZO_PCI_READ_8(sc, STX_PCI_CTRL);
808 iommu = SCHIZO_PCI_READ_8(sc, STX_PCI_IOMMU);
809 status = PCIB_READ_CONFIG(sc->sc_dev, sc->sc_pci_secbus,
810 STX_CS_DEVICE, STX_CS_FUNC, PCIR_STATUS, 2);
811 if ((sc->sc_flags & SCHIZO_FLAGS_ARMED) == 0)
812 goto clear_error;
813 if ((csr & STX_PCI_CTRL_MMU_ERR) != 0) {
814 if ((iommu & TOM_PCI_IOMMU_ERR) == 0)
815 goto clear_error;
816
817 /* These are non-fatal if target abort was signaled. */
818 if ((status & PCIM_STATUS_STABORT) != 0 &&
819 ((iommu & TOM_PCI_IOMMU_ERRMASK) ==
820 TOM_PCI_IOMMU_INVALID_ERR ||
821 (iommu & TOM_PCI_IOMMU_ERR_ILLTSBTBW) != 0 ||
822 (iommu & TOM_PCI_IOMMU_ERR_BAD_VA) != 0)) {
823 SCHIZO_PCI_WRITE_8(sc, STX_PCI_IOMMU, iommu);
824 goto clear_error;
825 }
826 }
827
828 panic("%s: PCI bus %c error AFAR %#llx AFSR %#llx PCI CSR %#llx "
829 "IOMMU %#llx STATUS %#llx", device_get_nameunit(sc->sc_dev),
830 'A' + sc->sc_half, (unsigned long long)afar,
831 (unsigned long long)afsr, (unsigned long long)csr,
832 (unsigned long long)iommu, (unsigned long long)status);
833
834 clear_error:
835 if (bootverbose)
836 device_printf(sc->sc_dev,
837 "PCI bus %c error AFAR %#llx AFSR %#llx PCI CSR %#llx "
838 "STATUS %#llx", 'A' + sc->sc_half,
839 (unsigned long long)afar, (unsigned long long)afsr,
840 (unsigned long long)csr, (unsigned long long)status);
841 /* Clear the error bits that we caught. */
842 PCIB_WRITE_CONFIG(sc->sc_dev, sc->sc_pci_secbus, STX_CS_DEVICE,
843 STX_CS_FUNC, PCIR_STATUS, status, 2);
844 SCHIZO_PCI_WRITE_8(sc, STX_PCI_CTRL, csr);
845 SCHIZO_PCI_WRITE_8(sc, STX_PCI_AFSR, afsr);
846 return (FILTER_HANDLED);
847}
848
849static int
850schizo_ue(void *arg)
851{
852 struct schizo_softc *sc = arg;
853 uint64_t afar, afsr;
854 int i;
855
856 mtx_lock_spin(sc->sc_mtx);
857 afar = SCHIZO_CTRL_READ_8(sc, STX_CTRL_UE_AFAR);
858 for (i = 0; i < 1000; i++)
859 if (((afsr = SCHIZO_CTRL_READ_8(sc, STX_CTRL_UE_AFSR)) &
860 STX_CTRL_CE_AFSR_ERRPNDG) == 0)
861 break;
862 mtx_unlock_spin(sc->sc_mtx);
863 panic("%s: uncorrectable DMA error AFAR %#llx AFSR %#llx",
864 device_get_nameunit(sc->sc_dev), (unsigned long long)afar,
865 (unsigned long long)afsr);
866 return (FILTER_HANDLED);
867}
868
869static int
870schizo_ce(void *arg)
871{
872 struct schizo_softc *sc = arg;
873 uint64_t afar, afsr;
874 int i;
875
876 mtx_lock_spin(sc->sc_mtx);
877 afar = SCHIZO_CTRL_READ_8(sc, STX_CTRL_CE_AFAR);
878 for (i = 0; i < 1000; i++)
879 if (((afsr = SCHIZO_CTRL_READ_8(sc, STX_CTRL_UE_AFSR)) &
880 STX_CTRL_CE_AFSR_ERRPNDG) == 0)
881 break;
882 device_printf(sc->sc_dev,
883 "correctable DMA error AFAR %#llx AFSR %#llx\n",
884 (unsigned long long)afar, (unsigned long long)afsr);
885 /* Clear the error bits that we caught. */
886 SCHIZO_CTRL_WRITE_8(sc, STX_CTRL_UE_AFSR, afsr);
887 mtx_unlock_spin(sc->sc_mtx);
888 return (FILTER_HANDLED);
889}
890
891static int
892schizo_host_bus(void *arg)
893{
894 struct schizo_softc *sc = arg;
895 uint64_t errlog;
--- 587 unchanged lines hidden ---