1/*
2 * Copyright (c) 1999, 2000 Matthew R. Green
3 * All rights reserved.
4 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp
30 *
|
31 * $FreeBSD: head/sys/sparc64/pci/psycho.c 93682 2002-04-02 17:27:35Z tmm $
|
| 31 * $FreeBSD: head/sys/sparc64/pci/psycho.c 98148 2002-06-12 19:20:57Z tmm $ |
32 */
33
34/*
35 * Support for `psycho' and `psycho+' UPA to PCI bridge and
36 * UltraSPARC IIi and IIe `sabre' PCI controllers.
37 */
38
39#include "opt_psycho.h"
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/bus.h>
44#include <sys/kernel.h>
45#include <sys/malloc.h>
46
47#include <ofw/openfirm.h>
48#include <ofw/ofw_pci.h>
49
50#include <machine/bus.h>
51#include <machine/iommureg.h>
52#include <machine/bus_common.h>
53#include <machine/frame.h>
54#include <machine/intr_machdep.h>
55#include <machine/nexusvar.h>
56#include <machine/ofw_upa.h>
57#include <machine/resource.h>
58
59#include <sys/rman.h>
60
61#include <machine/iommuvar.h>
62
63#include <pci/pcivar.h>
64#include <pci/pcireg.h>
65
66#include <sparc64/pci/ofw_pci.h>
67#include <sparc64/pci/psychoreg.h>
68#include <sparc64/pci/psychovar.h>
69
70#include "pcib_if.h"
71#include "sparcbus_if.h"
72
73static void psycho_get_ranges(phandle_t, struct upa_ranges **, int *);
74static void psycho_set_intr(struct psycho_softc *, int, device_t, bus_addr_t,
75 int, driver_intr_t);
76static int psycho_find_intrmap(struct psycho_softc *, int, bus_addr_t *,
77 bus_addr_t *, u_long *);
78static void psycho_intr_stub(void *);
79#ifdef PSYCHO_STRAY
80static void psycho_intr_stray(void *);
81#endif
82static bus_space_tag_t psycho_alloc_bus_tag(struct psycho_softc *, int);
83
84
85/* Interrupt handlers */
86static void psycho_ue(void *);
87static void psycho_ce(void *);
88static void psycho_bus_a(void *);
89static void psycho_bus_b(void *);
90static void psycho_powerfail(void *);
91#ifdef PSYCHO_MAP_WAKEUP
92static void psycho_wakeup(void *);
93#endif
94
95/* IOMMU support */
96static void psycho_iommu_init(struct psycho_softc *, int);
|
| 97static ofw_pci_binit_t psycho_binit; |
98
99/*
100 * bus space and bus dma support for UltraSPARC `psycho'. note that most
101 * of the bus dma support is provided by the iommu dvma controller.
102 */
103static int psycho_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, int,
104 bus_dmamap_t *);
105static int psycho_dmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t);
106static int psycho_dmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
107 void *, bus_size_t, bus_dmamap_callback_t *, void *, int);
108static void psycho_dmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t);
109static void psycho_dmamap_sync(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
110 bus_dmasync_op_t);
111static int psycho_dmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, void **, int,
112 bus_dmamap_t *);
113static void psycho_dmamem_free(bus_dma_tag_t, bus_dma_tag_t, void *,
114 bus_dmamap_t);
115
116/*
117 * autoconfiguration
118 */
119static int psycho_probe(device_t);
120static int psycho_attach(device_t);
121static int psycho_read_ivar(device_t, device_t, int, u_long *);
122static int psycho_setup_intr(device_t, device_t, struct resource *, int,
123 driver_intr_t *, void *, void **);
124static int psycho_teardown_intr(device_t, device_t, struct resource *, void *);
125static struct resource *psycho_alloc_resource(device_t, device_t, int, int *,
126 u_long, u_long, u_long, u_int);
127static int psycho_activate_resource(device_t, device_t, int, int,
128 struct resource *);
129static int psycho_deactivate_resource(device_t, device_t, int, int,
130 struct resource *);
131static int psycho_release_resource(device_t, device_t, int, int,
132 struct resource *);
133static int psycho_maxslots(device_t);
134static u_int32_t psycho_read_config(device_t, u_int, u_int, u_int, u_int, int);
135static void psycho_write_config(device_t, u_int, u_int, u_int, u_int, u_int32_t,
136 int);
137static int psycho_route_interrupt(device_t, device_t, int);
138static int psycho_intr_pending(device_t, int);
139static bus_space_handle_t psycho_get_bus_handle(device_t dev, enum sbbt_id id,
140 bus_space_handle_t childhdl, bus_space_tag_t *tag);
141
142static device_method_t psycho_methods[] = {
143 /* Device interface */
144 DEVMETHOD(device_probe, psycho_probe),
145 DEVMETHOD(device_attach, psycho_attach),
146
147 /* Bus interface */
148 DEVMETHOD(bus_print_child, bus_generic_print_child),
149 DEVMETHOD(bus_read_ivar, psycho_read_ivar),
150 DEVMETHOD(bus_setup_intr, psycho_setup_intr),
151 DEVMETHOD(bus_teardown_intr, psycho_teardown_intr),
152 DEVMETHOD(bus_alloc_resource, psycho_alloc_resource),
153 DEVMETHOD(bus_activate_resource, psycho_activate_resource),
154 DEVMETHOD(bus_deactivate_resource, psycho_deactivate_resource),
155 DEVMETHOD(bus_release_resource, psycho_release_resource),
156
157 /* pcib interface */
158 DEVMETHOD(pcib_maxslots, psycho_maxslots),
159 DEVMETHOD(pcib_read_config, psycho_read_config),
160 DEVMETHOD(pcib_write_config, psycho_write_config),
161 DEVMETHOD(pcib_route_interrupt, psycho_route_interrupt),
162
163 /* sparcbus interface */
164 DEVMETHOD(sparcbus_intr_pending, psycho_intr_pending),
165 DEVMETHOD(sparcbus_get_bus_handle, psycho_get_bus_handle),
166
167 { 0, 0 }
168};
169
170static driver_t psycho_driver = {
171 "pcib",
172 psycho_methods,
173 sizeof(struct psycho_softc),
174};
175
176static devclass_t psycho_devclass;
177
178DRIVER_MODULE(psycho, nexus, psycho_driver, psycho_devclass, 0, 0);
179
180static int psycho_ndevs;
181static struct psycho_softc *psycho_softcs[4];
182
183struct psycho_clr {
184 struct psycho_softc *pci_sc;
185 bus_addr_t pci_clr; /* clear register */
186 driver_intr_t *pci_handler; /* handler to call */
187 void *pci_arg; /* argument for the handler */
188 void *pci_cookie; /* interrupt cookie of parent bus */
189};
190
191struct psycho_strayclr {
192 struct psycho_softc *psc_sc;
193 bus_addr_t psc_clr; /* clear register */
194};
195
196#define PSYCHO_READ8(sc, off) \
197 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off))
198#define PSYCHO_WRITE8(sc, off, v) \
199 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v))
200#define PCICTL_READ8(sc, off) \
201 PSYCHO_READ8((sc), (sc)->sc_pcictl + (off))
202#define PCICTL_WRITE8(sc, off, v) \
203 PSYCHO_WRITE8((sc), (sc)->sc_pcictl + (off), (v))
204
205/*
206 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a
207 * single PCI bus and does not have a streaming buffer. It often has an APB
208 * (advanced PCI bridge) connected to it, which was designed specifically for
209 * the IIi. The APB let's the IIi handle two independednt PCI buses, and
210 * appears as two "simba"'s underneath the sabre.
211 *
212 * "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus
213 * and manages two PCI buses. "psycho" has two 64-bit 33MHz buses, while
214 * "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You
215 * will usually find a "psycho+" since I don't think the original "psycho"
216 * ever shipped, and if it did it would be in the U30.
217 *
218 * Each "psycho" PCI bus appears as a separate OFW node, but since they are
219 * both part of the same IC, they only have a single register space. As such,
220 * they need to be configured together, even though the autoconfiguration will
221 * attach them separately.
222 *
223 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often
224 * as pci1 and pci2, although they have been implemented with other PCI bus
225 * numbers on some machines.
226 *
227 * On UltraII machines, there can be any number of "psycho+" ICs, each
228 * providing two PCI buses.
229 *
230 *
231 * XXXX The psycho/sabre node has an `interrupts' attribute. They contain
232 * the values of the following interrupts in this order:
233 *
234 * PCI Bus Error (30)
235 * DMA UE (2e)
236 * DMA CE (2f)
237 * Power Fail (25)
238 *
239 * We really should attach handlers for each.
240 */
241#define OFW_PCI_TYPE "pci"
242#define OFW_SABRE_MODEL "SUNW,sabre"
243#define OFW_SABRE_COMPAT "pci108e,a001"
244#define OFW_SIMBA_MODEL "SUNW,simba"
245#define OFW_PSYCHO_MODEL "SUNW,psycho"
246
247static int
248psycho_probe(device_t dev)
249{
250 phandle_t node;
251 char *dtype, *model;
252 static char compat[32];
253
254 node = nexus_get_node(dev);
255 if (OF_getprop(node, "compatible", compat, sizeof(compat)) == -1)
256 compat[0] = '\0';
257
258 dtype = nexus_get_device_type(dev);
259 model = nexus_get_model(dev);
260 /* match on a type of "pci" and a sabre or a psycho */
261 if (nexus_get_reg(dev) != NULL && dtype != NULL &&
262 strcmp(dtype, OFW_PCI_TYPE) == 0 &&
263 ((model != NULL && (strcmp(model, OFW_SABRE_MODEL) == 0 ||
264 strcmp(model, OFW_PSYCHO_MODEL) == 0)) ||
265 strcmp(compat, OFW_SABRE_COMPAT) == 0)) {
266 device_set_desc(dev, "U2P UPA-PCI bridge");
267 return (0);
268 }
269
270 return (ENXIO);
271}
272
273/*
274 * SUNW,psycho initialisation ..
275 * - find the per-psycho registers
276 * - figure out the IGN.
277 * - find our partner psycho
278 * - configure ourselves
279 * - bus range, bus,
280 * - interrupt map,
281 * - setup the chipsets.
282 * - if we're the first of the pair, initialise the IOMMU, otherwise
283 * just copy it's tags and addresses.
284 */
285static int
286psycho_attach(device_t dev)
287{
288 struct psycho_softc *sc;
289 struct psycho_softc *osc = NULL;
290 struct psycho_softc *asc;
291 struct upa_regs *reg;
|
| 292 struct ofw_pci_bdesc obd; |
293 char compat[32];
294 char *model;
295 phandle_t node;
296 u_int64_t csr;
297 u_long pcictl_offs, mlen;
298 int psycho_br[2];
299 int n, i, nreg, rid;
300#if defined(PSYCHO_DEBUG) || defined(PSYCHO_STRAY)
301 bus_addr_t map, clr;
302 u_int64_t mr;
303#endif
304#ifdef PSYCHO_STRAY
305 struct psycho_strayclr *sclr;
306#endif
307
308 node = nexus_get_node(dev);
309 sc = device_get_softc(dev);
310 if (OF_getprop(node, "compatible", compat, sizeof(compat)) == -1)
311 compat[0] = '\0';
312
313 sc->sc_node = node;
314 sc->sc_dev = dev;
315 sc->sc_dmatag = nexus_get_dmatag(dev);
316
317 /*
318 * call the model-specific initialisation routine.
319 */
320 model = nexus_get_model(dev);
321 if ((model != NULL &&
322 strcmp(model, OFW_SABRE_MODEL) == 0) ||
323 strcmp(compat, OFW_SABRE_COMPAT) == 0) {
324 sc->sc_mode = PSYCHO_MODE_SABRE;
325 if (model == NULL)
326 model = "sabre";
327 } else if (model != NULL &&
328 strcmp(model, OFW_PSYCHO_MODEL) == 0)
329 sc->sc_mode = PSYCHO_MODE_PSYCHO;
330 else
331 panic("psycho_attach: unknown model!");
332
333 /*
334 * The psycho gets three register banks:
335 * (0) per-PBM configuration and status registers
336 * (1) per-PBM PCI configuration space, containing only the
337 * PBM 256-byte PCI header
338 * (2) the shared psycho configuration registers (struct psychoreg)
339 *
340 * XXX use the prom address for the psycho registers? we do so far.
341 */
342 reg = nexus_get_reg(dev);
343 nreg = nexus_get_nreg(dev);
344 /* Register layouts are different. stuupid. */
345 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) {
346 if (nreg <= 2)
347 panic("psycho_attach: %d not enough registers", nreg);
348 sc->sc_basepaddr = (vm_offset_t)UPA_REG_PHYS(®[2]);
349 mlen = UPA_REG_SIZE(®[2]);
350 pcictl_offs = UPA_REG_PHYS(®[0]);
351 } else {
352 if (nreg <= 0)
353 panic("psycho_attach: %d not enough registers", nreg);
354 sc->sc_basepaddr = (vm_offset_t)UPA_REG_PHYS(®[0]);
355 mlen = UPA_REG_SIZE(reg);
356 pcictl_offs = sc->sc_basepaddr + PSR_PCICTL0;
357 }
358
359 /*
360 * Match other psycho's that are already configured against
361 * the base physical address. This will be the same for a
362 * pair of devices that share register space.
363 */
364 for (n = 0; n < psycho_ndevs && n < sizeof(psycho_softcs) /
365 sizeof(psycho_softcs[0]); n++) {
366 asc = (struct psycho_softc *)psycho_softcs[n];
367
368 if (asc == NULL || asc == sc)
369 /* This entry is not there or it is me */
370 continue;
371
372 if (asc->sc_basepaddr != sc->sc_basepaddr)
373 /* This is an unrelated psycho */
374 continue;
375
376 /* Found partner */
377 osc = asc;
378 break;
379 }
380
381 if (osc == NULL) {
382 rid = 0;
383 sc->sc_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
384 sc->sc_basepaddr, sc->sc_basepaddr + mlen - 1, mlen,
385 RF_ACTIVE);
386 if (sc->sc_mem_res == NULL ||
387 rman_get_start(sc->sc_mem_res) != sc->sc_basepaddr)
388 panic("psycho_attach: can't allocate device memory");
389 sc->sc_bustag = rman_get_bustag(sc->sc_mem_res);
390 sc->sc_bushandle = rman_get_bushandle(sc->sc_mem_res);
391 } else {
392 /*
393 * There's another psycho using the same register space. Copy the
394 * relevant stuff.
395 */
396 sc->sc_mem_res = NULL;
397 sc->sc_bustag = osc->sc_bustag;
398 sc->sc_bushandle = osc->sc_bushandle;
399 }
400 if (pcictl_offs < sc->sc_basepaddr)
401 panic("psycho_attach: bogus pci control register location");
402 sc->sc_pcictl = pcictl_offs - sc->sc_basepaddr;
403 csr = PSYCHO_READ8(sc, PSR_CS);
404 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */
405 if (sc->sc_mode == PSYCHO_MODE_PSYCHO)
406 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6;
407
408 device_printf(dev, "%s: impl %d, version %d: ign %x ",
409 model, (int)PSYCHO_GCSR_IMPL(csr), (int)PSYCHO_GCSR_VERS(csr),
410 sc->sc_ign);
411
412 /*
413 * Setup the PCI control register
414 */
415 csr = PCICTL_READ8(sc, PCR_CS);
416 csr |= PCICTL_MRLM | PCICTL_ARB_PARK | PCICTL_ERRINTEN | PCICTL_4ENABLE;
417 csr &= ~(PCICTL_SERR | PCICTL_CPU_PRIO | PCICTL_ARB_PRIO |
418 PCICTL_RTRYWAIT);
419 PCICTL_WRITE8(sc, PCR_CS, csr);
420
|
419 /* grab the psycho ranges */
|
| 421 /* Grab the psycho ranges */ |
422 psycho_get_ranges(sc->sc_node, &sc->sc_range, &sc->sc_nrange);
423
|
422 /* get the bus-range for the psycho */
423 n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br));
424 if (n == -1)
425 panic("could not get psycho bus-range");
426 if (n != sizeof(psycho_br))
427 panic("broken psycho bus-range (%d)", n);
428
429 printf("bus range %u to %u; PCI bus %d\n", psycho_br[0], psycho_br[1],
430 psycho_br[0]);
431
432 sc->sc_busno = psycho_br[0];
433
|
424 /* Initialize memory and i/o rmans */
425 sc->sc_io_rman.rm_type = RMAN_ARRAY;
426 sc->sc_io_rman.rm_descr = "Psycho PCI I/O Ports";
427 if (rman_init(&sc->sc_io_rman) != 0 ||
428 rman_manage_region(&sc->sc_io_rman, 0, PSYCHO_IO_SIZE) != 0)
429 panic("psycho_probe: failed to set up i/o rman");
430 sc->sc_mem_rman.rm_type = RMAN_ARRAY;
431 sc->sc_mem_rman.rm_descr = "Psycho PCI Memory";
432 if (rman_init(&sc->sc_mem_rman) != 0 ||
433 rman_manage_region(&sc->sc_mem_rman, 0, PSYCHO_MEM_SIZE) != 0)
434 panic("psycho_probe: failed to set up memory rman");
435 /*
436 * Find the addresses of the various bus spaces.
437 * There should not be multiple ones of one kind.
438 * The physical start addresses of the ranges are the configuration,
439 * memory and IO handles.
440 */
441 for (n = 0; n < sc->sc_nrange; n++) {
442 i = UPA_RANGE_CS(&sc->sc_range[n]);
443 if (sc->sc_bh[i] != 0)
444 panic("psycho_attach: duplicate range for space %d", i);
445 sc->sc_bh[i] = UPA_RANGE_PHYS(&sc->sc_range[n]);
446 }
447 /*
448 * Check that all needed handles are present. The PCI_CS_MEM64 one is
449 * not currently used.
450 */
451 for (n = 0; n < 3; n++) {
452 if (sc->sc_bh[n] == 0)
453 panic("psycho_attach: range %d missing", n);
454 }
455
456 /* allocate our tags */
457 sc->sc_memt = psycho_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE);
458 sc->sc_iot = psycho_alloc_bus_tag(sc, PCI_IO_BUS_SPACE);
459 sc->sc_cfgt = psycho_alloc_bus_tag(sc, PCI_CONFIG_BUS_SPACE);
460 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL,
461 0x3ffffffff, 0xff, 0xffffffff, 0, &sc->sc_dmat) != 0)
462 panic("psycho_attach: bus_dma_tag_create failed");
463 /* Customize the tag */
464 sc->sc_dmat->cookie = sc;
465 sc->sc_dmat->dmamap_create = psycho_dmamap_create;
466 sc->sc_dmat->dmamap_destroy = psycho_dmamap_destroy;
467 sc->sc_dmat->dmamap_load = psycho_dmamap_load;
468 sc->sc_dmat->dmamap_unload = psycho_dmamap_unload;
469 sc->sc_dmat->dmamap_sync = psycho_dmamap_sync;
470 sc->sc_dmat->dmamem_alloc = psycho_dmamem_alloc;
471 sc->sc_dmat->dmamem_free = psycho_dmamem_free;
472 /* XXX: register as root dma tag (kluge). */
473 sparc64_root_dma_tag = sc->sc_dmat;
474
475 /* Register the softc, this is needed for paired psychos. */
476 if (psycho_ndevs < sizeof(psycho_softcs) / sizeof(psycho_softcs[0]))
477 psycho_softcs[psycho_ndevs] = sc;
478 else
479 device_printf(dev, "XXX: bump the number of psycho_softcs");
480 psycho_ndevs++;
481 /*
482 * And finally, if we're a sabre or the first of a pair of psycho's to
483 * arrive here, start up the IOMMU and get a config space tag.
484 */
485 if (osc == NULL) {
486 /*
487 * Establish handlers for interesting interrupts....
488 *
489 * XXX We need to remember these and remove this to support
490 * hotplug on the UPA/FHC bus.
491 *
492 * XXX Not all controllers have these, but installing them
493 * is better than trying to sort through this mess.
494 */
495 psycho_set_intr(sc, 0, dev, PSR_UE_INT_MAP, INTR_FAST,
496 psycho_ue);
497 psycho_set_intr(sc, 1, dev, PSR_CE_INT_MAP, 0, psycho_ce);
498 psycho_set_intr(sc, 2, dev, PSR_PCIAERR_INT_MAP, INTR_FAST,
499 psycho_bus_a);
500 psycho_set_intr(sc, 4, dev, PSR_POWER_INT_MAP, INTR_FAST,
501 psycho_powerfail);
502 /* Psycho-specific initialization. */
503 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) {
504 /*
505 * Sabres do not have the following two interrupts.
506 */
507 psycho_set_intr(sc, 3, dev, PSR_PCIBERR_INT_MAP,
508 INTR_FAST, psycho_bus_b);
509#ifdef PSYCHO_MAP_WAKEUP
510 /*
511 * psycho_wakeup() doesn't do anything useful right
512 * now.
513 */
514 psycho_set_intr(sc, 5, dev, PSR_PWRMGT_INT_MAP, 0,
515 psycho_wakeup);
516#endif /* PSYCHO_MAP_WAKEUP */
517
518 /* Initialize the counter-timer. */
519 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle,
520 PSR_TC0);
521 }
522
523 /*
524 * Setup IOMMU and PCI configuration if we're the first
525 * of a pair of psycho's to arrive here.
526 *
527 * We should calculate a TSB size based on amount of RAM
528 * and number of bus controllers and number an type of
529 * child devices.
530 *
531 * For the moment, 32KB should be more than enough.
532 */
533 sc->sc_is = malloc(sizeof(struct iommu_state), M_DEVBUF,
534 M_NOWAIT);
535 if (sc->sc_is == NULL)
536 panic("psycho_attach: malloc iommu_state failed");
537 sc->sc_is->is_sb[0] = 0;
538 sc->sc_is->is_sb[1] = 0;
539 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0)
540 sc->sc_is->is_sb[0] = sc->sc_pcictl + PCR_STRBUF;
541 psycho_iommu_init(sc, 2);
542 } else {
543 /* Just copy IOMMU state, config tag and address */
544 sc->sc_is = osc->sc_is;
545 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0)
546 sc->sc_is->is_sb[1] = sc->sc_pcictl + PCR_STRBUF;
547 iommu_reset(sc->sc_is);
548 }
549
550 /*
551 * Enable all interrupts, clear all interrupt states, and install an
552 * interrupt handler for OBIO interrupts, which can be ISA ones
553 * (to frob the interrupt clear registers).
554 * This aids the debugging of interrupt routing problems, and is needed
555 * for isa drivers that use isa_irq_pending (otherwise the registers
556 * will never be cleared).
557 */
558#if defined(PSYCHO_DEBUG) || defined(PSYCHO_STRAY)
559 for (map = PSR_PCIA0_INT_MAP, clr = PSR_PCIA0_INT_CLR, n = 0;
560 map <= PSR_PCIB3_INT_MAP; map += 8, clr += 32, n++) {
561 mr = PSYCHO_READ8(sc, map);
562#ifdef PSYCHO_DEBUG
563 device_printf(dev, "intr map (pci) %d: %#lx\n", n, (u_long)mr);
564#endif
565 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V);
566 for (i = 0; i < 4; i++)
567 PCICTL_WRITE8(sc, clr + i * 8, 0);
568 PSYCHO_WRITE8(sc, map, mr | INTMAP_V);
569 }
570 for (map = PSR_SCSI_INT_MAP, clr = PSR_SCSI_INT_CLR, n = 0;
571 map <= PSR_FFB1_INT_MAP; map += 8, clr += 8, n++) {
572 mr = PSYCHO_READ8(sc, map);
573#ifdef PSYCHO_DEBUG
574 device_printf(dev, "intr map (obio) %d: %#lx, clr: %#lx\n", n,
575 (u_long)mr, (u_long)clr);
576#endif
577 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V);
578 PSYCHO_WRITE8(sc, clr, 0);
579#ifdef PSYCHO_STRAY
580 /*
581 * This can cause interrupt storms, and is therefore disabled
582 * by default.
583 * XXX: use intr_setup() to not confuse higher level code
584 */
585 if (INTVEC(mr) != 0x7e6 && INTVEC(mr) != 0x7e7 &&
586 INTVEC(mr) != 0) {
587 sclr = malloc(sizeof(*sclr), M_DEVBUF, M_WAITOK);
588 sclr->psc_sc = sc;
589 sclr->psc_clr = clr;
590 intr_setup(PIL_LOW, intr_dequeue, INTVEC(mr),
591 psycho_intr_stray, sclr);
592 }
593#endif
594 PSYCHO_WRITE8(sc, map, mr | INTMAP_V);
595 }
596#endif
597
598 /*
|
599 * Get the bus range from the firmware; it is used solely for obtaining
600 * the inital bus number, and cannot be trusted on all machines.
601 */
602 n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br));
603 if (n == -1)
604 panic("could not get psycho bus-range");
605 if (n != sizeof(psycho_br))
606 panic("broken psycho bus-range (%d)", n);
607
608 sc->sc_busno = ofw_pci_alloc_busno(sc->sc_node);
609 obd.obd_bus = psycho_br[0];
610 obd.obd_secbus = obd.obd_subbus = sc->sc_busno;
611 obd.obd_slot = PCS_DEVICE;
612 obd.obd_func = PCS_FUNC;
613 obd.obd_init = psycho_binit;
614 obd.obd_super = NULL;
615 /* Initial setup. */
616 psycho_binit(dev, &obd);
617 /* Update the bus number to what was just programmed. */
618 obd.obd_bus = obd.obd_secbus;
619 /* |
620 * Initialize the interrupt registers of all devices hanging from
621 * the host bridge directly or indirectly via PCI-PCI bridges.
622 * The MI code (and the PCI spec) assume that this is done during
623 * system initialization, however the firmware does not do this
624 * at least on some models, and we probably shouldn't trust that
625 * the firmware uses the same model as this driver if it does.
|
| 626 * Additionally, set up the bus numbers and ranges. |
627 */
|
616 ofw_pci_init_intr(dev, sc->sc_node);
|
| 628 ofw_pci_init(dev, sc->sc_node, &obd); |
629
630 device_add_child(dev, "pci", device_get_unit(dev));
631 return (bus_generic_attach(dev));
632}
633
634static void
635psycho_set_intr(struct psycho_softc *sc, int index,
636 device_t dev, bus_addr_t map, int iflags, driver_intr_t handler)
637{
638 int rid, vec;
639 u_int64_t mr;
640
641 mr = PSYCHO_READ8(sc, map);
642 vec = INTVEC(mr);
643 sc->sc_irq_res[index] = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
644 vec, vec, 1, RF_ACTIVE);
645 if (sc->sc_irq_res[index] == NULL)
646 panic("psycho_set_intr: failed to get interrupt");
647 bus_setup_intr(dev, sc->sc_irq_res[index], INTR_TYPE_MISC | iflags,
648 handler, sc, &sc->sc_ihand[index]);
649 PSYCHO_WRITE8(sc, map, mr | INTMAP_V);
650}
651
652static int
653psycho_find_intrmap(struct psycho_softc *sc, int ino, bus_addr_t *intrmapptr,
654 bus_addr_t *intrclrptr, bus_addr_t *intrdiagptr)
655{
656 bus_addr_t intrmap, intrclr;
657 u_int64_t im;
658 u_long diag;
659 int found;
660
661 found = 0;
662 /* Hunt thru obio first */
663 diag = PSYCHO_READ8(sc, PSR_OBIO_INT_DIAG);
664 for (intrmap = PSR_SCSI_INT_MAP, intrclr = PSR_SCSI_INT_CLR;
665 intrmap <= PSR_FFB1_INT_MAP; intrmap += 8, intrclr += 8,
666 diag >>= 2) {
667 im = PSYCHO_READ8(sc, intrmap);
668 if (INTINO(im) == ino) {
669 diag &= 2;
670 found = 1;
671 break;
672 }
673 }
674
675 if (!found) {
676 diag = PSYCHO_READ8(sc, PSR_PCI_INT_DIAG);
677 /* Now do PCI interrupts */
678 for (intrmap = PSR_PCIA0_INT_MAP, intrclr = PSR_PCIA0_INT_CLR;
679 intrmap <= PSR_PCIB3_INT_MAP; intrmap += 8, intrclr += 32,
680 diag >>= 8) {
681 im = PSYCHO_READ8(sc, intrmap);
682 if (((im ^ ino) & 0x3c) == 0) {
683 intrclr += 8 * (ino & 3);
684 diag = (diag >> ((ino & 3) * 2)) & 2;
685 found = 1;
686 break;
687 }
688 }
689 }
690 if (intrmapptr != NULL)
691 *intrmapptr = intrmap;
692 if (intrclrptr != NULL)
693 *intrclrptr = intrclr;
694 if (intrdiagptr != NULL)
695 *intrdiagptr = diag;
696 return (found);
697}
698
699/* grovel the OBP for various psycho properties */
700static void
701psycho_get_ranges(phandle_t node, struct upa_ranges **rp, int *np)
702{
703
704 *np = OF_getprop_alloc(node, "ranges", sizeof(**rp), (void **)rp);
705 if (*np == -1)
706 panic("could not get psycho ranges");
707}
708
709/*
710 * Interrupt handlers.
711 */
712static void
713psycho_ue(void *arg)
714{
715 struct psycho_softc *sc = (struct psycho_softc *)arg;
716 u_int64_t afar, afsr;
717
718 afar = PSYCHO_READ8(sc, PSR_UE_AFA);
719 afsr = PSYCHO_READ8(sc, PSR_UE_AFS);
720 /*
721 * On the UltraSPARC-IIi/IIe, IOMMU misses/protection faults cause
722 * the AFAR to be set to the physical address of the TTE entry that
723 * was invalid/write protected. Call into the iommu code to have
724 * them decoded to virtual IO addresses.
725 */
726 if ((afsr & UEAFSR_P_DTE) != 0)
727 iommu_decode_fault(sc->sc_is, afar);
728 /* It's uncorrectable. Dump the regs and panic. */
729 panic("%s: uncorrectable DMA error AFAR %#lx AFSR %#lx\n",
730 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr);
731}
732
733static void
734psycho_ce(void *arg)
735{
736 struct psycho_softc *sc = (struct psycho_softc *)arg;
737 u_int64_t afar, afsr;
738
739 PSYCHO_WRITE8(sc, PSR_CE_INT_CLR, 0);
740 afar = PSYCHO_READ8(sc, PSR_CE_AFA);
741 afsr = PSYCHO_READ8(sc, PSR_CE_AFS);
742 /* It's correctable. Dump the regs and continue. */
743 printf("%s: correctable DMA error AFAR %#lx AFSR %#lx\n",
744 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr);
745}
746
747static void
748psycho_bus_a(void *arg)
749{
750 struct psycho_softc *sc = (struct psycho_softc *)arg;
751 u_int64_t afar, afsr;
752
753 afar = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFA);
754 afsr = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFS);
755 /* It's uncorrectable. Dump the regs and panic. */
756 panic("%s: PCI bus A error AFAR %#lx AFSR %#lx\n",
757 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr);
758}
759
760static void
761psycho_bus_b(void *arg)
762{
763 struct psycho_softc *sc = (struct psycho_softc *)arg;
764 u_int64_t afar, afsr;
765
766 afar = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFA);
767 afsr = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFS);
768 /* It's uncorrectable. Dump the regs and panic. */
769 panic("%s: PCI bus B error AFAR %#lx AFSR %#lx\n",
770 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr);
771}
772
773static void
774psycho_powerfail(void *arg)
775{
776
777 /* We lost power. Try to shut down NOW. */
778#ifdef DEBUGGER_ON_POWERFAIL
779 struct psycho_softc *sc = (struct psycho_softc *)arg;
780
781 Debugger("powerfail");
782 PSYCHO_WRITE8(sc, PSR_POWER_INT_CLR, 0);
783#else
784 printf("Power Failure Detected: Shutting down NOW.\n");
785 shutdown_nice(0);
786#endif
787}
788
789#ifdef PSYCHO_MAP_WAKEUP
790static void
791psycho_wakeup(void *arg)
792{
793 struct psycho_softc *sc = (struct psycho_softc *)arg;
794
795 PSYCHO_WRITE8(sc, PSR_PWRMGT_INT_CLR, 0);
796 /* Gee, we don't really have a framework to deal with this properly. */
797 printf("%s: power management wakeup\n", device_get_name(sc->sc_dev));
798}
799#endif /* PSYCHO_MAP_WAKEUP */
800
801/* initialise the IOMMU... */
802void
803psycho_iommu_init(struct psycho_softc *sc, int tsbsize)
804{
805 char *name;
806 struct iommu_state *is = sc->sc_is;
807 u_int32_t iobase = -1;
808 int *vdma = NULL;
809 int nitem;
810
811 /* punch in our copies */
812 is->is_bustag = sc->sc_bustag;
813 is->is_bushandle = sc->sc_bushandle;
814 is->is_iommu = PSR_IOMMU;
815 is->is_dtag = PSR_IOMMU_TLB_TAG_DIAG;
816 is->is_ddram = PSR_IOMMU_TLB_DATA_DIAG;
817 is->is_dqueue = PSR_IOMMU_QUEUE_DIAG;
818 is->is_dva = PSR_IOMMU_SVADIAG;
819 is->is_dtcmp = PSR_IOMMU_TLB_CMP_DIAG;
820
821 /*
822 * Separate the men from the boys. Get the `virtual-dma'
823 * property for sabre and use that to make sure the damn
824 * iommu works.
825 *
826 * We could query the `#virtual-dma-size-cells' and
827 * `#virtual-dma-addr-cells' and DTRT, but I'm lazy.
828 */
829 nitem = OF_getprop_alloc(sc->sc_node, "virtual-dma", sizeof(vdma),
830 (void **)&vdma);
831 if (nitem > 0) {
832 iobase = vdma[0];
833 tsbsize = ffs(vdma[1]);
834 if (tsbsize < 25 || tsbsize > 31 ||
835 (vdma[1] & ~(1 << (tsbsize - 1))) != 0) {
836 printf("bogus tsb size %x, using 7\n", vdma[1]);
837 tsbsize = 31;
838 }
839 tsbsize -= 24;
840 free(vdma, M_OFWPROP);
841 }
842
843 /* give us a nice name.. */
844 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT);
845 if (name == 0)
846 panic("couldn't malloc iommu name");
847 snprintf(name, 32, "%s dvma", device_get_name(sc->sc_dev));
848
849 iommu_init(name, is, tsbsize, iobase);
850}
851
|
852static void
853psycho_binit(device_t busdev, struct ofw_pci_bdesc *obd)
854{
855
856#ifdef PSYCHO_DEBUG
857 printf("psycho at %u/%u/%u: setting bus #s to %u/%u/%u\n",
858 obd->obd_bus, obd->obd_slot, obd->obd_func, obd->obd_bus,
859 obd->obd_secbus, obd->obd_subbus);
860#endif /* PSYCHO_DEBUG */
861 /*
862 * NOTE: this must be kept in this order, since the last write will
863 * change the config space address of the psycho.
864 */
865 PCIB_WRITE_CONFIG(busdev, obd->obd_bus, obd->obd_slot, obd->obd_func,
866 PCSR_SUBBUS, obd->obd_subbus, 1);
867 PCIB_WRITE_CONFIG(busdev, obd->obd_bus, obd->obd_slot, obd->obd_func,
868 PCSR_SECBUS, obd->obd_secbus, 1);
869}
870 |
871static int
872psycho_maxslots(device_t dev)
873{
874
875 /*
876 * XXX: is this correct? At any rate, a number that is too high
877 * shouldn't do any harm, if only because of the way things are
878 * handled in psycho_read_config.
879 */
880 return (31);
881}
882
883/*
884 * Keep a table of quirky PCI devices that need fixups before the MI PCI code
885 * creates the resource lists. This needs to be moved around once other bus
886 * drivers are added. Moving it to the MI code should maybe be reconsidered
887 * if one of these devices appear in non-sparc64 boxen. It's likely that not
888 * all BIOSes/firmwares can deal with them.
889 */
890struct psycho_dquirk {
891 u_int32_t dq_devid;
892 int dq_quirk;
893};
894
895/* Quirk types. May be or'ed together. */
896#define DQT_BAD_INTPIN 1 /* Intpin reg 0, but intpin used */
897
898static struct psycho_dquirk dquirks[] = {
899 { 0x1001108e, DQT_BAD_INTPIN }, /* Sun HME (PCIO func. 1) */
900 { 0x1101108e, DQT_BAD_INTPIN }, /* Sun GEM (PCIO2 func. 1) */
901 { 0x1102108e, DQT_BAD_INTPIN }, /* Sun FireWire ctl. (PCIO2 func. 2) */
902 { 0x1103108e, DQT_BAD_INTPIN }, /* Sun USB ctl. (PCIO2 func. 3) */
903};
904
905#define NDQUIRKS (sizeof(dquirks) / sizeof(dquirks[0]))
906
907static u_int32_t
908psycho_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
909 int width)
910{
911 struct psycho_softc *sc;
912 bus_space_handle_t bh;
913 u_long offset = 0;
914 u_int32_t r, devid;
915 int i;
916
917 /*
918 * The psycho bridge does not tolerate accesses to unconfigured PCI
919 * devices' or function's config space, so look up the device in the
920 * firmware device tree first, and if it is not present, return a value
921 * that will make the detection code think that there is no device here.
922 * This is ugly...
923 */
924 if (reg == 0 && ofw_pci_find_node(bus, slot, func) == 0)
925 return (0xffffffff);
926 sc = (struct psycho_softc *)device_get_softc(dev);
927 offset = PSYCHO_CONF_OFF(bus, slot, func, reg);
928 bh = sc->sc_bh[PCI_CS_CONFIG];
929 switch (width) {
930 case 1:
931 r = bus_space_read_1(sc->sc_cfgt, bh, offset);
932 break;
933 case 2:
934 r = bus_space_read_2(sc->sc_cfgt, bh, offset);
935 break;
936 case 4:
937 r = bus_space_read_4(sc->sc_cfgt, bh, offset);
938 break;
939 default:
940 panic("psycho_read_config: bad width");
941 }
942 if (reg == PCIR_INTPIN && r == 0) {
943 /* Check for DQT_BAD_INTPIN quirk. */
944 devid = psycho_read_config(dev, bus, slot, func,
945 PCIR_DEVVENDOR, 4);
946 for (i = 0; i < NDQUIRKS; i++) {
947 if (dquirks[i].dq_devid == devid) {
948 /*
949 * Need to set the intpin to a value != 0 so
950 * that the MI code will think that this device
951 * has an interrupt.
952 * Just use 1 (intpin a) for now. This is, of
953 * course, bogus, but since interrupts are
954 * routed in advance, this does not really
955 * matter.
956 */
957 if ((dquirks[i].dq_quirk & DQT_BAD_INTPIN) != 0)
958 r = 1;
959 break;
960 }
961 }
962 }
963 return (r);
964}
965
966static void
967psycho_write_config(device_t dev, u_int bus, u_int slot, u_int func,
968 u_int reg, u_int32_t val, int width)
969{
970 struct psycho_softc *sc;
971 bus_space_handle_t bh;
972 u_long offset = 0;
973
974 sc = (struct psycho_softc *)device_get_softc(dev);
975 offset = PSYCHO_CONF_OFF(bus, slot, func, reg);
976 bh = sc->sc_bh[PCI_CS_CONFIG];
977 switch (width) {
978 case 1:
979 bus_space_write_1(sc->sc_cfgt, bh, offset, val);
980 break;
981 case 2:
982 bus_space_write_2(sc->sc_cfgt, bh, offset, val);
983 break;
984 case 4:
985 bus_space_write_4(sc->sc_cfgt, bh, offset, val);
986 break;
987 default:
988 panic("psycho_write_config: bad width");
989 }
990}
991
992static int
993psycho_route_interrupt(device_t bus, device_t dev, int pin)
994{
|
964 int intline;
|
995
996 /*
997 * XXX: ugly loathsome hack:
998 * We can't use ofw_pci_route_intr() here; the device passed may be
999 * the one of a bridge, so the original device can't be recovered.
1000 *
1001 * We need to use the firmware to route interrupts, however it has
1002 * no interface which could be used to interpret intpins; instead,
1003 * all assignments are done by device.
1004 *
1005 * The MI pci code will try to reroute interrupts of 0, although they
1006 * are correct; all other interrupts are preinitialized, so if we
1007 * get here, the intline is either 0 (so return 0), or we hit a
1008 * device which was not preinitialized (e.g. hotplugged stuff), in
1009 * which case we are lost.
1010 */
1011 return (0);
1012}
1013
1014static int
1015psycho_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
1016{
1017 struct psycho_softc *sc;
1018
1019 sc = (struct psycho_softc *)device_get_softc(dev);
1020 switch (which) {
1021 case PCIB_IVAR_BUS:
1022 *result = sc->sc_busno;
1023 return (0);
1024 }
1025 return (ENOENT);
1026}
1027
1028/* Write to the correct clr register, and call the actual handler. */
1029static void
1030psycho_intr_stub(void *arg)
1031{
1032 struct psycho_clr *pc;
1033
1034 pc = (struct psycho_clr *)arg;
1035 pc->pci_handler(pc->pci_arg);
1036 PSYCHO_WRITE8(pc->pci_sc, pc->pci_clr, 0);
1037}
1038
1039#ifdef PSYCHO_STRAY
1040/*
1041 * Write to the correct clr register and return. arg is the address of the clear
1042 * register to be used.
1043 * XXX: print a message?
1044 */
1045static void
1046psycho_intr_stray(void *arg)
1047{
1048 struct psycho_strayclr *sclr = arg;
1049
1050 PSYCHO_WRITE8(sclr->psc_sc, sclr->psc_clr, 0);
1051}
1052#endif
1053
1054static int
1055psycho_setup_intr(device_t dev, device_t child,
1056 struct resource *ires, int flags, driver_intr_t *intr, void *arg,
1057 void **cookiep)
1058{
1059 struct psycho_softc *sc;
1060 struct psycho_clr *pc;
1061 bus_addr_t intrmapptr, intrclrptr;
1062 long vec = rman_get_start(ires);
1063 u_int64_t mr;
1064 int ino, error;
1065
1066 sc = (struct psycho_softc *)device_get_softc(dev);
1067 pc = (struct psycho_clr *)malloc(sizeof(*pc), M_DEVBUF, M_NOWAIT);
1068 if (pc == NULL)
1069 return (NULL);
1070
1071 /*
1072 * Hunt through all the interrupt mapping regs to look for our
1073 * interrupt vector.
1074 *
1075 * XXX We only compare INOs rather than IGNs since the firmware may
1076 * not provide the IGN and the IGN is constant for all device on that
1077 * PCI controller. This could cause problems for the FFB/external
1078 * interrupt which has a full vector that can be set arbitrarily.
1079 */
1080 ino = INTINO(vec);
1081
1082 if (!psycho_find_intrmap(sc, ino, &intrmapptr, &intrclrptr, NULL)) {
1083 printf("Cannot find interrupt vector %lx\n", vec);
1084 free(pc, M_DEVBUF);
1085 return (NULL);
1086 }
1087
1088#ifdef PSYCHO_DEBUG
1089 device_printf(dev, "psycho_setup_intr: INO %d, map %#lx, clr %#lx\n",
1090 ino, (u_long)intrmapptr, (u_long)intrclrptr);
1091#endif
1092 pc->pci_sc = sc;
1093 pc->pci_arg = arg;
1094 pc->pci_handler = intr;
1095 pc->pci_clr = intrclrptr;
1096 /* Disable the interrupt while we fiddle with it */
1097 mr = PSYCHO_READ8(sc, intrmapptr);
1098 PSYCHO_WRITE8(sc, intrmapptr, mr & ~INTMAP_V);
1099 error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags,
1100 psycho_intr_stub, pc, cookiep);
1101 if (error != 0) {
1102 free(pc, M_DEVBUF);
1103 return (error);
1104 }
1105 pc->pci_cookie = *cookiep;
1106 *cookiep = pc;
1107
1108 /*
1109 * Clear the interrupt, it might have been triggered before it was
1110 * set up.
1111 */
1112 PSYCHO_WRITE8(sc, intrclrptr, 0);
1113 /*
1114 * Enable the interrupt now we have the handler installed.
1115 * Read the current value as we can't change it besides the
1116 * valid bit so so make sure only this bit is changed.
1117 */
1118 PSYCHO_WRITE8(sc, intrmapptr, mr | INTMAP_V);
1119 return (error);
1120}
1121
1122static int
1123psycho_teardown_intr(device_t dev, device_t child,
1124 struct resource *vec, void *cookie)
1125{
1126 struct psycho_clr *pc;
1127 int error;
1128
1129 pc = (struct psycho_clr *)cookie;
1130 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec,
1131 pc->pci_cookie);
1132 /*
1133 * Don't disable the interrupt for now, so that stray interupts get
1134 * detected...
1135 */
1136 if (error != 0)
1137 free(pc, M_DEVBUF);
1138 return (error);
1139}
1140
1141static struct resource *
1142psycho_alloc_resource(device_t bus, device_t child, int type, int *rid,
1143 u_long start, u_long end, u_long count, u_int flags)
1144{
1145 struct psycho_softc *sc;
1146 struct resource *rv;
1147 struct rman *rm;
1148 bus_space_tag_t bt;
1149 bus_space_handle_t bh;
1150 int needactivate = flags & RF_ACTIVE;
1151
1152 flags &= ~RF_ACTIVE;
1153
1154 sc = (struct psycho_softc *)device_get_softc(bus);
1155 if (type == SYS_RES_IRQ) {
1156 /*
1157 * XXX: Don't accept blank ranges for now, only single
1158 * interrupts. The other case should not happen with the MI pci
1159 * code...
1160 * XXX: This may return a resource that is out of the range
1161 * that was specified. Is this correct...?
1162 */
1163 if (start != end)
1164 panic("psycho_alloc_resource: XXX: interrupt range");
1165 start = end |= sc->sc_ign;
1166 return (bus_alloc_resource(bus, type, rid, start, end,
1167 count, flags));
1168 }
1169 switch (type) {
1170 case SYS_RES_MEMORY:
1171 rm = &sc->sc_mem_rman;
1172 bt = sc->sc_memt;
1173 bh = sc->sc_bh[PCI_CS_MEM32];
1174 break;
1175 case SYS_RES_IOPORT:
1176 rm = &sc->sc_io_rman;
1177 bt = sc->sc_iot;
1178 /* XXX: probably should use ranges property here. */
1179 bh = sc->sc_bh[PCI_CS_IO];
1180 break;
1181 default:
1182 return (NULL);
1183 }
1184
1185 rv = rman_reserve_resource(rm, start, end, count, flags, child);
1186 if (rv == NULL)
1187 return (NULL);
1188
1189 bh += rman_get_start(rv);
1190 rman_set_bustag(rv, bt);
1191 rman_set_bushandle(rv, bh);
1192
1193 if (needactivate) {
1194 if (bus_activate_resource(child, type, *rid, rv)) {
1195 rman_release_resource(rv);
1196 return (NULL);
1197 }
1198 }
1199
1200 return (rv);
1201}
1202
1203static int
1204psycho_activate_resource(device_t bus, device_t child, int type, int rid,
1205 struct resource *r)
1206{
1207 void *p;
1208 int error;
1209
1210 if (type == SYS_RES_IRQ)
1211 return (bus_activate_resource(bus, type, rid, r));
1212 if (type == SYS_RES_MEMORY) {
1213 /*
1214 * Need to memory-map the device space, as some drivers depend
1215 * on the virtual address being set and useable.
1216 */
1217 error = sparc64_bus_mem_map(rman_get_bustag(r),
1218 rman_get_bushandle(r), rman_get_size(r), 0, NULL, &p);
1219 if (error != 0)
1220 return (error);
1221 rman_set_virtual(r, p);
1222 }
1223 return (rman_activate_resource(r));
1224}
1225
1226static int
1227psycho_deactivate_resource(device_t bus, device_t child, int type, int rid,
1228 struct resource *r)
1229{
1230
1231 if (type == SYS_RES_IRQ)
1232 return (bus_deactivate_resource(bus, type, rid, r));
1233 if (type == SYS_RES_MEMORY) {
1234 sparc64_bus_mem_unmap(rman_get_virtual(r), rman_get_size(r));
1235 rman_set_virtual(r, NULL);
1236 }
1237 return (rman_deactivate_resource(r));
1238}
1239
1240static int
1241psycho_release_resource(device_t bus, device_t child, int type, int rid,
1242 struct resource *r)
1243{
1244 int error;
1245
1246 if (type == SYS_RES_IRQ)
1247 return (bus_release_resource(bus, type, rid, r));
1248 if (rman_get_flags(r) & RF_ACTIVE) {
1249 error = bus_deactivate_resource(child, type, rid, r);
1250 if (error)
1251 return error;
1252 }
1253 return (rman_release_resource(r));
1254}
1255
1256static int
1257psycho_intr_pending(device_t dev, int intr)
1258{
1259 struct psycho_softc *sc;
1260 u_long diag;
1261
1262 sc = (struct psycho_softc *)device_get_softc(dev);
1263 if (!psycho_find_intrmap(sc, intr, NULL, NULL, &diag)) {
1264 printf("psycho_intr_pending: mapping not found for %d\n", intr);
1265 return (0);
1266 }
1267 return (diag != 0);
1268}
1269
1270static bus_space_handle_t
1271psycho_get_bus_handle(device_t dev, enum sbbt_id id,
1272 bus_space_handle_t childhdl, bus_space_tag_t *tag)
1273{
1274 struct psycho_softc *sc;
1275
1276 sc = (struct psycho_softc *)device_get_softc(dev);
1277 switch(id) {
1278 case SBBT_IO:
1279 *tag = sc->sc_iot;
1280 return (sc->sc_bh[PCI_CS_IO] + childhdl);
1281 case SBBT_MEM:
1282 *tag = sc->sc_memt;
1283 return (sc->sc_bh[PCI_CS_MEM32] + childhdl);
1284 default:
1285 panic("psycho_get_bus_handle: illegal space\n");
1286 }
1287}
1288
1289/*
1290 * below here is bus space and bus dma support
1291 */
1292static bus_space_tag_t
1293psycho_alloc_bus_tag(struct psycho_softc *sc, int type)
1294{
1295 bus_space_tag_t bt;
1296
1297 bt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF,
1298 M_NOWAIT | M_ZERO);
1299 if (bt == NULL)
1300 panic("psycho_alloc_bus_tag: out of memory");
1301
1302 bzero(bt, sizeof *bt);
1303 bt->cookie = sc;
1304 bt->parent = sc->sc_bustag;
1305 bt->type = type;
1306 return (bt);
1307}
1308
1309/*
1310 * hooks into the iommu dvma calls.
1311 */
1312static int
1313psycho_dmamem_alloc(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr,
1314 int flags, bus_dmamap_t *mapp)
1315{
1316 struct psycho_softc *sc;
1317
1318 sc = (struct psycho_softc *)pdmat->cookie;
1319 return (iommu_dvmamem_alloc(pdmat, ddmat, sc->sc_is, vaddr, flags,
1320 mapp));
1321}
1322
1323static void
1324psycho_dmamem_free(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr,
1325 bus_dmamap_t map)
1326{
1327 struct psycho_softc *sc;
1328
1329 sc = (struct psycho_softc *)pdmat->cookie;
1330 iommu_dvmamem_free(pdmat, ddmat, sc->sc_is, vaddr, map);
1331}
1332
1333static int
1334psycho_dmamap_create(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, int flags,
1335 bus_dmamap_t *mapp)
1336{
1337 struct psycho_softc *sc;
1338
1339 sc = (struct psycho_softc *)pdmat->cookie;
1340 return (iommu_dvmamap_create(pdmat, ddmat, sc->sc_is, flags, mapp));
1341
1342}
1343
1344static int
1345psycho_dmamap_destroy(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat,
1346 bus_dmamap_t map)
1347{
1348 struct psycho_softc *sc;
1349
1350 sc = (struct psycho_softc *)pdmat->cookie;
1351 return (iommu_dvmamap_destroy(pdmat, ddmat, sc->sc_is, map));
1352}
1353
1354static int
1355psycho_dmamap_load(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map,
1356 void *buf, bus_size_t buflen, bus_dmamap_callback_t *callback,
1357 void *callback_arg, int flags)
1358{
1359 struct psycho_softc *sc;
1360
1361 sc = (struct psycho_softc *)pdmat->cookie;
1362 return (iommu_dvmamap_load(pdmat, ddmat, sc->sc_is, map, buf, buflen,
1363 callback, callback_arg, flags));
1364}
1365
1366static void
1367psycho_dmamap_unload(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map)
1368{
1369 struct psycho_softc *sc;
1370
1371 sc = (struct psycho_softc *)pdmat->cookie;
1372 iommu_dvmamap_unload(pdmat, ddmat, sc->sc_is, map);
1373}
1374
1375static void
1376psycho_dmamap_sync(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map,
1377 bus_dmasync_op_t op)
1378{
1379 struct psycho_softc *sc;
1380
1381 sc = (struct psycho_softc *)pdmat->cookie;
1382 iommu_dvmamap_sync(pdmat, ddmat, sc->sc_is, map, op);
1383}
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