1/*-
2 * Copyright (c) 2003 by Thomas Moestl <tmm@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 7 unchanged lines hidden (view full) ---

16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
21 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
23 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * $FreeBSD: head/sys/sparc64/pci/ofw_pcib_subr.c 133589 2004-08-12 17:41:33Z marius $
26 */
27
28#include "opt_ofw_pci.h"
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33
34#include <dev/ofw/ofw_bus.h>
35#include <dev/ofw/ofw_pci.h>

--- 9 unchanged lines hidden (view full) ---

45#include "pcib_if.h"
46
47#include <sparc64/pci/ofw_pci.h>
48#include <sparc64/pci/ofw_pcib_subr.h>
49
50void
51ofw_pcib_gen_setup(device_t bridge)
52{
53 struct ofw_pcib_gen_softc *sc = device_get_softc(bridge);
54 u_int secbus;
55
56 sc->ops_pcib_sc.dev = bridge;
57 sc->ops_node = ofw_bus_get_node(bridge);
58 KASSERT(sc->ops_node != 0,
59 ("ofw_pcib_gen_setup: no ofw pci parent bus!"));
60
61 /*
62 * Setup the secondary bus number register, by allocating a new unique
63 * bus number for it; the firmware preset does not always seem to be

--- 9 unchanged lines hidden (view full) ---

73
74 ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo,
75 sizeof(ofw_pci_intr_t));
76}
77
78int
79ofw_pcib_gen_route_interrupt(device_t bridge, device_t dev, int intpin)
80{
81 struct ofw_pcib_gen_softc *sc = device_get_softc(bridge);
82 struct ofw_bus_iinfo *ii = &sc->ops_iinfo;
83 struct ofw_pci_register reg;
84 device_t pbridge = device_get_parent(device_get_parent(bridge));
85 phandle_t node = ofw_bus_get_node(dev);
86 ofw_pci_intr_t pintr, mintr;
87 u_int8_t maskbuf[sizeof(reg) + sizeof(pintr)];
88
89 if (ii->opi_imapsz > 0) {
90 pintr = intpin;
91 if (ofw_bus_lookup_imap(node, ii, &reg, sizeof(reg), &pintr,
92 sizeof(pintr), &mintr, sizeof(mintr), maskbuf)) {
93 /*
94 * If we've found a mapping, return it and don't map
95 * it again on higher levels - that causes problems
96 * in some cases, and never seems to be required.
97 */
98 return (mintr);
99 }
100 } else if (intpin >= 1 && intpin <= 4) {
101 /*
102 * When an interrupt map is missing, we need to do the
103 * standard PCI swizzle and continue mapping at the parent.
104 */
105 return (pcib_route_interrupt(bridge, dev, intpin));
106 }
107 /* Try at the parent. */
108 return (PCIB_ROUTE_INTERRUPT(pbridge, bridge, intpin));
109}
110
111phandle_t
112ofw_pcib_gen_get_node(device_t bridge, device_t dev)
113{
114 struct ofw_pcib_gen_softc *sc = device_get_softc(bridge);
115
116 return (sc->ops_node);
117}
118
119void
120ofw_pcib_gen_adjust_busrange(device_t bridge, u_int subbus)
121{
122 struct ofw_pcib_gen_softc *sc = device_get_softc(bridge);
123
124 if (subbus > sc->ops_pcib_sc.subbus) {
125#ifdef OFW_PCI_DEBUG
126 device_printf(bridge,
127 "adjusting secondary bus number from %d to %d\n",
128 sc->ops_pcib_sc.subbus, subbus);
129#endif
130 pci_write_config(bridge, PCIR_SUBBUS_1, subbus, 1);
131 sc->ops_pcib_sc.subbus = subbus;
132 /* Notify parent bridges. */
133 OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), subbus);
134 }
135}