Deleted Added
full compact
isa.c (117119) isa.c (119291)
1/*-
2 * Copyright (c) 1998 Doug Rabson
3 * Copyright (c) 2001 Thomas Moestl <tmm@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * from: FreeBSD: src/sys/alpha/isa/isa.c,v 1.26 2001/07/11
28 *
1/*-
2 * Copyright (c) 1998 Doug Rabson
3 * Copyright (c) 2001 Thomas Moestl <tmm@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * from: FreeBSD: src/sys/alpha/isa/isa.c,v 1.26 2001/07/11
28 *
29 * $FreeBSD: head/sys/sparc64/isa/isa.c 117119 2003-07-01 14:52:47Z tmm $
29 * $FreeBSD: head/sys/sparc64/isa/isa.c 119291 2003-08-22 07:39:05Z imp $
30 */
31
32#include "opt_ofw_pci.h"
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/kernel.h>
37#include <sys/module.h>
38#include <sys/bus.h>
39#include <machine/bus.h>
40#include <sys/malloc.h>
41#include <sys/proc.h>
42#include <sys/rman.h>
43#include <sys/interrupt.h>
44
45#include <isa/isareg.h>
46#include <isa/isavar.h>
47#include <isa/isa_common.h>
48
30 */
31
32#include "opt_ofw_pci.h"
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/kernel.h>
37#include <sys/module.h>
38#include <sys/bus.h>
39#include <machine/bus.h>
40#include <sys/malloc.h>
41#include <sys/proc.h>
42#include <sys/rman.h>
43#include <sys/interrupt.h>
44
45#include <isa/isareg.h>
46#include <isa/isavar.h>
47#include <isa/isa_common.h>
48
49#include
50#include
49#include <dev/pci/pcireg.h>
50#include <dev/pci/pcivar.h>
51
52#include <ofw/ofw_pci.h>
53#include <ofw/openfirm.h>
54
55#include <machine/intr_machdep.h>
56#include <machine/ofw_bus.h>
57#include <machine/resource.h>
58
59#include <sparc64/pci/ofw_pci.h>
60#include <sparc64/isa/ofw_isa.h>
61
62/* There can be only one ISA bus, so it is safe to use globals. */
63bus_space_tag_t isa_io_bt = NULL;
64bus_space_handle_t isa_io_hdl;
65bus_space_tag_t isa_mem_bt = NULL;
66bus_space_handle_t isa_mem_hdl;
67
68u_int64_t isa_io_base;
69u_int64_t isa_io_limit;
70u_int64_t isa_mem_base;
71u_int64_t isa_mem_limit;
72
73device_t isa_bus_device;
74
75static phandle_t isab_node;
76static ofw_pci_intr_t isa_ino[8];
77
78#ifdef OFW_NEWPCI
79struct ofw_bus_iinfo isa_iinfo;
80#endif
81
82/*
83 * XXX: This is really partly partly PCI-specific, but unfortunately is
84 * differently enough to have to duplicate it here...
85 */
86#define ISAB_RANGE_PHYS(r) \
87 (((u_int64_t)(r)->phys_mid << 32) | (u_int64_t)(r)->phys_lo)
88#define ISAB_RANGE_SPACE(r) (((r)->phys_hi >> 24) & 0x03)
89
90#define ISAR_SPACE_IO 0x01
91#define ISAR_SPACE_MEM 0x02
92
93#define INRANGE(x, start, end) ((x) >= (start) && (x) <= (end))
94
95static int isa_route_intr_res(device_t, u_long, u_long);
96
97intrmask_t
98isa_irq_pending(void)
99{
100 intrmask_t pending;
101 int i;
102
103 /* XXX: Is this correct? */
104 for (i = 7, pending = 0; i >= 0; i--) {
105 pending <<= 1;
106 if (isa_ino[i] != PCI_INVALID_IRQ) {
107 pending |= (OFW_PCI_INTR_PENDING(isa_bus_device,
108 isa_ino[i]) == 0) ? 0 : 1;
109 }
110 }
111 return (pending);
112}
113
114void
115isa_init(device_t dev)
116{
117 device_t bridge;
118 phandle_t node;
119 ofw_isa_intr_t ino;
120#ifndef OFW_NEWPCI
121 ofw_pci_intr_t rino;
122#endif
123 struct isa_ranges *br;
124 int nbr, i;
125
126 /* The parent of the bus must be a PCI-ISA bridge. */
127 bridge = device_get_parent(dev);
128#ifdef OFW_NEWPCI
129 isab_node = ofw_pci_get_node(bridge);
130#else
131 isab_node = ofw_pci_node(bridge);
132#endif
133 nbr = OF_getprop_alloc(isab_node, "ranges", sizeof(*br), (void **)&br);
134 if (nbr <= 0)
135 panic("isa_init: cannot get bridge range property");
136
137#ifdef OFW_NEWPCI
138 ofw_bus_setup_iinfo(isab_node, &isa_iinfo, sizeof(ofw_isa_intr_t));
139#endif
140
141 /*
142 * This is really a bad kludge; however, it is needed to provide
143 * isa_irq_pending(), which is unfortunately still used by some
144 * drivers.
145 */
146 for (i = 0; i < 8; i++)
147 isa_ino[i] = PCI_INVALID_IRQ;
148 for (node = OF_child(isab_node); node != 0; node = OF_peer(node)) {
149 if (OF_getprop(node, "interrupts", &ino, sizeof(ino)) == -1)
150 continue;
151 if (ino > 7)
152 panic("isa_init: XXX: ino too large");
153#ifdef OFW_NEWPCI
154 isa_ino[ino] = ofw_isa_route_intr(bridge, node, &isa_iinfo,
155 ino);
156#else
157 rino = ofw_bus_route_intr(node, ino, ofw_pci_orb_callback, dev);
158 isa_ino[ino] = rino == ORIR_NOTFOUND ? PCI_INVALID_IRQ : rino;
159#endif
160 }
161
162 for (nbr -= 1; nbr >= 0; nbr--) {
163 switch(ISAB_RANGE_SPACE(br + nbr)) {
164 case ISAR_SPACE_IO:
165 /* This is probably always 0. */
166 isa_io_base = ISAB_RANGE_PHYS(&br[nbr]);
167 isa_io_limit = br[nbr].size;
168 isa_io_hdl = OFW_PCI_GET_BUS_HANDLE(bridge,
169 SYS_RES_IOPORT, isa_io_base, &isa_io_bt);
170 break;
171 case ISAR_SPACE_MEM:
172 /* This is probably always 0. */
173 isa_mem_base = ISAB_RANGE_PHYS(&br[nbr]);
174 isa_mem_limit = br[nbr].size;
175 isa_mem_hdl = OFW_PCI_GET_BUS_HANDLE(bridge,
176 SYS_RES_MEMORY, isa_mem_base, &isa_mem_bt);
177 break;
178 }
179 }
180 free(br, M_OFWPROP);
181}
182
183static int
184isa_route_intr_res(device_t bus, u_long start, u_long end)
185{
186 int res;
187
188 if (start != end) {
189 panic("isa_route_intr_res: allocation of interrupt range not "
190 "supported (0x%lx - 0x%lx)", start, end);
191 }
192 if (start > 7)
193 panic("isa_route_intr_res: start out of isa range");
194 res = isa_ino[start];
195 if (res == PCI_INVALID_IRQ)
196 device_printf(bus, "could not map interrupt %d\n", res);
197 return (res);
198}
199
200struct resource *
201isa_alloc_resource(device_t bus, device_t child, int type, int *rid,
202 u_long start, u_long end, u_long count, u_int flags)
203{
204 /*
205 * Consider adding a resource definition. We allow rid 0-1 for
206 * irq and drq, 0-3 for memory and 0-7 for ports which is
207 * sufficient for isapnp.
208 */
209 int passthrough = (device_get_parent(child) != bus);
210 int isdefault = (start == 0UL && end == ~0UL);
211 struct isa_device* idev = DEVTOISA(child);
212 struct resource_list *rl = &idev->id_resources;
213 struct resource_list_entry *rle;
214 u_long base, limit;
215
216 if (!passthrough && !isdefault) {
217 rle = resource_list_find(rl, type, *rid);
218 if (!rle) {
219 if (*rid < 0)
220 return 0;
221 switch (type) {
222 case SYS_RES_IRQ:
223 if (*rid >= ISA_NIRQ)
224 return 0;
225 break;
226 case SYS_RES_DRQ:
227 if (*rid >= ISA_NDRQ)
228 return 0;
229 break;
230 case SYS_RES_MEMORY:
231 if (*rid >= ISA_NMEM)
232 return 0;
233 break;
234 case SYS_RES_IOPORT:
235 if (*rid >= ISA_NPORT)
236 return 0;
237 break;
238 default:
239 return 0;
240 }
241 resource_list_add(rl, type, *rid, start, end, count);
242 }
243 }
244
245 /*
246 * Add the base, change default allocations to be between base and
247 * limit, and reject allocations if a resource type is not enabled.
248 */
249 base = limit = 0;
250 switch(type) {
251 case SYS_RES_MEMORY:
252 if (isa_mem_bt == NULL)
253 return (NULL);
254 base = isa_mem_base;
255 limit = base + isa_mem_limit;
256 break;
257 case SYS_RES_IOPORT:
258 if (isa_io_bt == NULL)
259 return (NULL);
260 base = isa_io_base;
261 limit = base + isa_io_limit;
262 break;
263 case SYS_RES_IRQ:
264 if (isdefault && passthrough)
265 panic("isa_alloc_resource: cannot pass through default "
266 "irq allocation");
267 if (!isdefault) {
268 start = end = isa_route_intr_res(bus, start, end);
269 if (start == PCI_INVALID_IRQ)
270 return (NULL);
271 }
272 break;
273 default:
274 panic("isa_alloc_resource: unsupported resource type %d", type);
275 }
276 if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
277 start = ulmin(start + base, limit);
278 end = ulmin(end + base, limit);
279 }
280
281 /*
282 * This inlines a modified resource_list_alloc(); this is needed
283 * because the resources need to have offsets added to them, which
284 * cannot be done beforehand without patching the resource list entries
285 * (which is ugly).
286 */
287 if (passthrough) {
288 return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
289 type, rid, start, end, count, flags));
290 }
291
292 rle = resource_list_find(rl, type, *rid);
293 if (rle == NULL)
294 return (NULL); /* no resource of that type/rid */
295
296 if (rle->res != NULL)
297 panic("isa_alloc_resource: resource entry is busy");
298
299 if (isdefault) {
300 start = rle->start;
301 count = ulmax(count, rle->count);
302 end = ulmax(rle->end, start + count - 1);
303 switch (type) {
304 case SYS_RES_MEMORY:
305 case SYS_RES_IOPORT:
306 start += base;
307 end += base;
308 if (!INRANGE(start, base, limit) ||
309 !INRANGE(end, base, limit))
310 return (NULL);
311 break;
312 case SYS_RES_IRQ:
313 start = end = isa_route_intr_res(bus, start, end);
314 if (start == PCI_INVALID_IRQ)
315 return (NULL);
316 break;
317 }
318 }
319
320 rle->res = BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
321 type, rid, start, end, count, flags);
322
323 /*
324 * Record the new range.
325 */
326 if (rle->res != NULL) {
327 rle->start = rman_get_start(rle->res) - base;
328 rle->end = rman_get_end(rle->res) - base;
329 rle->count = count;
330 }
331
332 return (rle->res);
333}
334
335int
336isa_release_resource(device_t bus, device_t child, int type, int rid,
337 struct resource *res)
338{
339 struct isa_device* idev = DEVTOISA(child);
340 struct resource_list *rl = &idev->id_resources;
341
342 return (resource_list_release(rl, bus, child, type, rid, res));
343}
344
345int
346isa_setup_intr(device_t dev, device_t child,
347 struct resource *irq, int flags,
348 driver_intr_t *intr, void *arg, void **cookiep)
349{
350
351 /*
352 * Just pass through. This is going to be handled by either one of
353 * the parent PCI buses or the nexus device.
354 * The interrupt was routed at allocation time.
355 */
356 return (BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, intr,
357 arg, cookiep));
358}
359
360int
361isa_teardown_intr(device_t dev, device_t child,
362 struct resource *irq, void *cookie)
363{
364
365 return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie));
366}
51
52#include <ofw/ofw_pci.h>
53#include <ofw/openfirm.h>
54
55#include <machine/intr_machdep.h>
56#include <machine/ofw_bus.h>
57#include <machine/resource.h>
58
59#include <sparc64/pci/ofw_pci.h>
60#include <sparc64/isa/ofw_isa.h>
61
62/* There can be only one ISA bus, so it is safe to use globals. */
63bus_space_tag_t isa_io_bt = NULL;
64bus_space_handle_t isa_io_hdl;
65bus_space_tag_t isa_mem_bt = NULL;
66bus_space_handle_t isa_mem_hdl;
67
68u_int64_t isa_io_base;
69u_int64_t isa_io_limit;
70u_int64_t isa_mem_base;
71u_int64_t isa_mem_limit;
72
73device_t isa_bus_device;
74
75static phandle_t isab_node;
76static ofw_pci_intr_t isa_ino[8];
77
78#ifdef OFW_NEWPCI
79struct ofw_bus_iinfo isa_iinfo;
80#endif
81
82/*
83 * XXX: This is really partly partly PCI-specific, but unfortunately is
84 * differently enough to have to duplicate it here...
85 */
86#define ISAB_RANGE_PHYS(r) \
87 (((u_int64_t)(r)->phys_mid << 32) | (u_int64_t)(r)->phys_lo)
88#define ISAB_RANGE_SPACE(r) (((r)->phys_hi >> 24) & 0x03)
89
90#define ISAR_SPACE_IO 0x01
91#define ISAR_SPACE_MEM 0x02
92
93#define INRANGE(x, start, end) ((x) >= (start) && (x) <= (end))
94
95static int isa_route_intr_res(device_t, u_long, u_long);
96
97intrmask_t
98isa_irq_pending(void)
99{
100 intrmask_t pending;
101 int i;
102
103 /* XXX: Is this correct? */
104 for (i = 7, pending = 0; i >= 0; i--) {
105 pending <<= 1;
106 if (isa_ino[i] != PCI_INVALID_IRQ) {
107 pending |= (OFW_PCI_INTR_PENDING(isa_bus_device,
108 isa_ino[i]) == 0) ? 0 : 1;
109 }
110 }
111 return (pending);
112}
113
114void
115isa_init(device_t dev)
116{
117 device_t bridge;
118 phandle_t node;
119 ofw_isa_intr_t ino;
120#ifndef OFW_NEWPCI
121 ofw_pci_intr_t rino;
122#endif
123 struct isa_ranges *br;
124 int nbr, i;
125
126 /* The parent of the bus must be a PCI-ISA bridge. */
127 bridge = device_get_parent(dev);
128#ifdef OFW_NEWPCI
129 isab_node = ofw_pci_get_node(bridge);
130#else
131 isab_node = ofw_pci_node(bridge);
132#endif
133 nbr = OF_getprop_alloc(isab_node, "ranges", sizeof(*br), (void **)&br);
134 if (nbr <= 0)
135 panic("isa_init: cannot get bridge range property");
136
137#ifdef OFW_NEWPCI
138 ofw_bus_setup_iinfo(isab_node, &isa_iinfo, sizeof(ofw_isa_intr_t));
139#endif
140
141 /*
142 * This is really a bad kludge; however, it is needed to provide
143 * isa_irq_pending(), which is unfortunately still used by some
144 * drivers.
145 */
146 for (i = 0; i < 8; i++)
147 isa_ino[i] = PCI_INVALID_IRQ;
148 for (node = OF_child(isab_node); node != 0; node = OF_peer(node)) {
149 if (OF_getprop(node, "interrupts", &ino, sizeof(ino)) == -1)
150 continue;
151 if (ino > 7)
152 panic("isa_init: XXX: ino too large");
153#ifdef OFW_NEWPCI
154 isa_ino[ino] = ofw_isa_route_intr(bridge, node, &isa_iinfo,
155 ino);
156#else
157 rino = ofw_bus_route_intr(node, ino, ofw_pci_orb_callback, dev);
158 isa_ino[ino] = rino == ORIR_NOTFOUND ? PCI_INVALID_IRQ : rino;
159#endif
160 }
161
162 for (nbr -= 1; nbr >= 0; nbr--) {
163 switch(ISAB_RANGE_SPACE(br + nbr)) {
164 case ISAR_SPACE_IO:
165 /* This is probably always 0. */
166 isa_io_base = ISAB_RANGE_PHYS(&br[nbr]);
167 isa_io_limit = br[nbr].size;
168 isa_io_hdl = OFW_PCI_GET_BUS_HANDLE(bridge,
169 SYS_RES_IOPORT, isa_io_base, &isa_io_bt);
170 break;
171 case ISAR_SPACE_MEM:
172 /* This is probably always 0. */
173 isa_mem_base = ISAB_RANGE_PHYS(&br[nbr]);
174 isa_mem_limit = br[nbr].size;
175 isa_mem_hdl = OFW_PCI_GET_BUS_HANDLE(bridge,
176 SYS_RES_MEMORY, isa_mem_base, &isa_mem_bt);
177 break;
178 }
179 }
180 free(br, M_OFWPROP);
181}
182
183static int
184isa_route_intr_res(device_t bus, u_long start, u_long end)
185{
186 int res;
187
188 if (start != end) {
189 panic("isa_route_intr_res: allocation of interrupt range not "
190 "supported (0x%lx - 0x%lx)", start, end);
191 }
192 if (start > 7)
193 panic("isa_route_intr_res: start out of isa range");
194 res = isa_ino[start];
195 if (res == PCI_INVALID_IRQ)
196 device_printf(bus, "could not map interrupt %d\n", res);
197 return (res);
198}
199
200struct resource *
201isa_alloc_resource(device_t bus, device_t child, int type, int *rid,
202 u_long start, u_long end, u_long count, u_int flags)
203{
204 /*
205 * Consider adding a resource definition. We allow rid 0-1 for
206 * irq and drq, 0-3 for memory and 0-7 for ports which is
207 * sufficient for isapnp.
208 */
209 int passthrough = (device_get_parent(child) != bus);
210 int isdefault = (start == 0UL && end == ~0UL);
211 struct isa_device* idev = DEVTOISA(child);
212 struct resource_list *rl = &idev->id_resources;
213 struct resource_list_entry *rle;
214 u_long base, limit;
215
216 if (!passthrough && !isdefault) {
217 rle = resource_list_find(rl, type, *rid);
218 if (!rle) {
219 if (*rid < 0)
220 return 0;
221 switch (type) {
222 case SYS_RES_IRQ:
223 if (*rid >= ISA_NIRQ)
224 return 0;
225 break;
226 case SYS_RES_DRQ:
227 if (*rid >= ISA_NDRQ)
228 return 0;
229 break;
230 case SYS_RES_MEMORY:
231 if (*rid >= ISA_NMEM)
232 return 0;
233 break;
234 case SYS_RES_IOPORT:
235 if (*rid >= ISA_NPORT)
236 return 0;
237 break;
238 default:
239 return 0;
240 }
241 resource_list_add(rl, type, *rid, start, end, count);
242 }
243 }
244
245 /*
246 * Add the base, change default allocations to be between base and
247 * limit, and reject allocations if a resource type is not enabled.
248 */
249 base = limit = 0;
250 switch(type) {
251 case SYS_RES_MEMORY:
252 if (isa_mem_bt == NULL)
253 return (NULL);
254 base = isa_mem_base;
255 limit = base + isa_mem_limit;
256 break;
257 case SYS_RES_IOPORT:
258 if (isa_io_bt == NULL)
259 return (NULL);
260 base = isa_io_base;
261 limit = base + isa_io_limit;
262 break;
263 case SYS_RES_IRQ:
264 if (isdefault && passthrough)
265 panic("isa_alloc_resource: cannot pass through default "
266 "irq allocation");
267 if (!isdefault) {
268 start = end = isa_route_intr_res(bus, start, end);
269 if (start == PCI_INVALID_IRQ)
270 return (NULL);
271 }
272 break;
273 default:
274 panic("isa_alloc_resource: unsupported resource type %d", type);
275 }
276 if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
277 start = ulmin(start + base, limit);
278 end = ulmin(end + base, limit);
279 }
280
281 /*
282 * This inlines a modified resource_list_alloc(); this is needed
283 * because the resources need to have offsets added to them, which
284 * cannot be done beforehand without patching the resource list entries
285 * (which is ugly).
286 */
287 if (passthrough) {
288 return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
289 type, rid, start, end, count, flags));
290 }
291
292 rle = resource_list_find(rl, type, *rid);
293 if (rle == NULL)
294 return (NULL); /* no resource of that type/rid */
295
296 if (rle->res != NULL)
297 panic("isa_alloc_resource: resource entry is busy");
298
299 if (isdefault) {
300 start = rle->start;
301 count = ulmax(count, rle->count);
302 end = ulmax(rle->end, start + count - 1);
303 switch (type) {
304 case SYS_RES_MEMORY:
305 case SYS_RES_IOPORT:
306 start += base;
307 end += base;
308 if (!INRANGE(start, base, limit) ||
309 !INRANGE(end, base, limit))
310 return (NULL);
311 break;
312 case SYS_RES_IRQ:
313 start = end = isa_route_intr_res(bus, start, end);
314 if (start == PCI_INVALID_IRQ)
315 return (NULL);
316 break;
317 }
318 }
319
320 rle->res = BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
321 type, rid, start, end, count, flags);
322
323 /*
324 * Record the new range.
325 */
326 if (rle->res != NULL) {
327 rle->start = rman_get_start(rle->res) - base;
328 rle->end = rman_get_end(rle->res) - base;
329 rle->count = count;
330 }
331
332 return (rle->res);
333}
334
335int
336isa_release_resource(device_t bus, device_t child, int type, int rid,
337 struct resource *res)
338{
339 struct isa_device* idev = DEVTOISA(child);
340 struct resource_list *rl = &idev->id_resources;
341
342 return (resource_list_release(rl, bus, child, type, rid, res));
343}
344
345int
346isa_setup_intr(device_t dev, device_t child,
347 struct resource *irq, int flags,
348 driver_intr_t *intr, void *arg, void **cookiep)
349{
350
351 /*
352 * Just pass through. This is going to be handled by either one of
353 * the parent PCI buses or the nexus device.
354 * The interrupt was routed at allocation time.
355 */
356 return (BUS_SETUP_INTR(device_get_parent(dev), child, irq, flags, intr,
357 arg, cookiep));
358}
359
360int
361isa_teardown_intr(device_t dev, device_t child,
362 struct resource *irq, void *cookie)
363{
364
365 return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie));
366}