1/* $FreeBSD: head/sys/powerpc/aim/trap_subr.S 125441 2004-02-04 13:10:25Z grehan $ */
2/* $NetBSD: trap_subr.S,v 1.20 2002/04/22 23:20:08 kleink Exp $ */
3
4/*
5 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6 * Copyright (C) 1995, 1996 TooLs GmbH.
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
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35/*
36 * NOTICE: This is not a standalone file. to use it, #include it in
37 * your port's locore.S, like so:
38 *
39 * #include <powerpc/powerpc/trap_subr.S>
40 */
41
42/*
43 * Save/restore segment registers
44 */
45#define RESTORE_SRS(pmap,sr) mtsr 0,sr; \
46 lwz sr,1*4(pmap); mtsr 1,sr; \
47 lwz sr,2*4(pmap); mtsr 2,sr; \
48 lwz sr,3*4(pmap); mtsr 3,sr; \
49 lwz sr,4*4(pmap); mtsr 4,sr; \
50 lwz sr,5*4(pmap); mtsr 5,sr; \
51 lwz sr,6*4(pmap); mtsr 6,sr; \
52 lwz sr,7*4(pmap); mtsr 7,sr; \
53 lwz sr,8*4(pmap); mtsr 8,sr; \
54 lwz sr,9*4(pmap); mtsr 9,sr; \
55 lwz sr,10*4(pmap); mtsr 10,sr; \
56 lwz sr,11*4(pmap); mtsr 11,sr; \
57 lwz sr,12*4(pmap); mtsr 12,sr; \
58 lwz sr,13*4(pmap); mtsr 13,sr; \
59 lwz sr,14*4(pmap); mtsr 14,sr; \
60 lwz sr,15*4(pmap); mtsr 15,sr; isync;
61
62/*
63 * User SRs are loaded through a pointer to the current pmap.
64 */
65#define RESTORE_USER_SRS(pmap,sr) \
66 GET_CPUINFO(pmap); \
67 lwz pmap,PC_CURPMAP(pmap); \
68 lwzu sr,PM_SR(pmap); \
69 RESTORE_SRS(pmap,sr)
70
71/*
72 * Kernel SRs are loaded directly from kernel_pmap_
73 */
74#define RESTORE_KERN_SRS(pmap,sr) \
75 lis pmap,CNAME(kernel_pmap_store)@ha; \
76 lwzu sr,CNAME(kernel_pmap_store)+PM_SR@l(pmap); \
77 RESTORE_SRS(pmap,sr)
78
79/*
80 * FRAME_SETUP assumes:
81 * SPRG1 SP (1)
82 * savearea r28-r31,DAR,DSISR (DAR & DSISR only for DSI traps)
83 * r28 LR
84 * r29 CR
85 * r30 scratch
86 * r31 scratch
87 * r1 kernel stack
88 * LR trap type (from calling address, mask with 0xff00)
89 * SRR0/1 as at start of trap
90 */
91#define FRAME_SETUP(savearea) \
92/* Have to enable translation to allow access of kernel stack: */ \
93 GET_CPUINFO(%r31); \
94 mfsrr0 %r30; \
95 stw %r30,(savearea+CPUSAVE_SRR0)(%r31); /* save SRR0 */ \
96 mfsrr1 %r30; \
97 stw %r30,(savearea+CPUSAVE_SRR1)(%r31); /* save SRR1 */ \
98 mfmsr %r30; \
99 ori %r30,%r30,(PSL_DR|PSL_IR|PSL_RI)@l; /* relocation on */ \
100 mtmsr %r30; /* stack can now be accessed */ \
101 isync; \
102 mfsprg1 %r31; /* get saved SP */ \
103 stwu %r31,-FRAMELEN(%r1); /* save it in the callframe */ \
104 stw %r0, FRAME_0+8(%r1); /* save r0 in the trapframe */ \
105 stw %r31,FRAME_1+8(%r1); /* save SP " " */ \
106 stw %r2, FRAME_2+8(%r1); /* save r2 " " */ \
107 stw %r28,FRAME_LR+8(%r1); /* save LR " " */ \
108 stw %r29,FRAME_CR+8(%r1); /* save CR " " */ \
109 GET_CPUINFO(%r2); \
110 lwz %r28,(savearea+CPUSAVE_R28)(%r2); /* get saved r28 */ \
111 lwz %r29,(savearea+CPUSAVE_R29)(%r2); /* get saved r29 */ \
112 lwz %r30,(savearea+CPUSAVE_R30)(%r2); /* get saved r30 */ \
113 lwz %r31,(savearea+CPUSAVE_R31)(%r2); /* get saved r31 */ \
114 stw %r3, FRAME_3+8(%r1); /* save r3-r31 */ \
115 stw %r4, FRAME_4+8(%r1); \
116 stw %r5, FRAME_5+8(%r1); \
117 stw %r6, FRAME_6+8(%r1); \
118 stw %r7, FRAME_7+8(%r1); \
119 stw %r8, FRAME_8+8(%r1); \
120 stw %r9, FRAME_9+8(%r1); \
121 stw %r10, FRAME_10+8(%r1); \
122 stw %r11, FRAME_11+8(%r1); \
123 stw %r12, FRAME_12+8(%r1); \
124 stw %r13, FRAME_13+8(%r1); \
125 stw %r14, FRAME_14+8(%r1); \
126 stw %r15, FRAME_15+8(%r1); \
127 stw %r16, FRAME_16+8(%r1); \
128 stw %r17, FRAME_17+8(%r1); \
129 stw %r18, FRAME_18+8(%r1); \
130 stw %r19, FRAME_19+8(%r1); \
131 stw %r20, FRAME_20+8(%r1); \
132 stw %r21, FRAME_21+8(%r1); \
133 stw %r22, FRAME_22+8(%r1); \
134 stw %r23, FRAME_23+8(%r1); \
135 stw %r24, FRAME_24+8(%r1); \
136 stw %r25, FRAME_25+8(%r1); \
137 stw %r26, FRAME_26+8(%r1); \
138 stw %r27, FRAME_27+8(%r1); \
139 stw %r28, FRAME_28+8(%r1); \
140 stw %r29, FRAME_29+8(%r1); \
141 stw %r30, FRAME_30+8(%r1); \
142 stw %r31, FRAME_31+8(%r1); \
143 lwz %r28,(savearea+CPUSAVE_DAR)(%r2); /* saved DAR */ \
144 lwz %r29,(savearea+CPUSAVE_DSISR)(%r2);/* saved DSISR */ \
145 lwz %r30,(savearea+CPUSAVE_SRR0)(%r2); /* saved SRR0 */ \
146 lwz %r31,(savearea+CPUSAVE_SRR1)(%r2); /* saved SRR1 */ \
147 mfxer %r3; \
148 mfctr %r4; \
149 mflr %r5; \
150 andi. %r5,%r5,0xff00; /* convert LR to exc # */ \
151 stw %r3, FRAME_XER+8(1); /* save xer/ctr/exc */ \
152 stw %r4, FRAME_CTR+8(1); \
153 stw %r5, FRAME_EXC+8(1); \
154 stw %r28,FRAME_DAR+8(1); \
155 stw %r29,FRAME_DSISR+8(1); /* save dsisr/srr0/srr1 */ \
156 stw %r30,FRAME_SRR0+8(1); \
157 stw %r31,FRAME_SRR1+8(1)
158
159#define FRAME_LEAVE(savearea) \
160/* Now restore regs: */ \
161 lwz %r2,FRAME_SRR0+8(%r1); \
162 lwz %r3,FRAME_SRR1+8(%r1); \
163 lwz %r4,FRAME_CTR+8(%r1); \
164 lwz %r5,FRAME_XER+8(%r1); \
165 lwz %r6,FRAME_LR+8(%r1); \
166 GET_CPUINFO(%r7); \
167 stw %r2,(savearea+CPUSAVE_SRR0)(%r7); /* save SRR0 */ \
168 stw %r3,(savearea+CPUSAVE_SRR1)(%r7); /* save SRR1 */ \
169 lwz %r7,FRAME_CR+8(%r1); \
170 mtctr %r4; \
171 mtxer %r5; \
172 mtlr %r6; \
173 mtsprg1 %r7; /* save cr */ \
174 lwz %r31,FRAME_31+8(%r1); /* restore r0-31 */ \
175 lwz %r30,FRAME_30+8(%r1); \
176 lwz %r29,FRAME_29+8(%r1); \
177 lwz %r28,FRAME_28+8(%r1); \
178 lwz %r27,FRAME_27+8(%r1); \
179 lwz %r26,FRAME_26+8(%r1); \
180 lwz %r25,FRAME_25+8(%r1); \
181 lwz %r24,FRAME_24+8(%r1); \
182 lwz %r23,FRAME_23+8(%r1); \
183 lwz %r22,FRAME_22+8(%r1); \
184 lwz %r21,FRAME_21+8(%r1); \
185 lwz %r20,FRAME_20+8(%r1); \
186 lwz %r19,FRAME_19+8(%r1); \
187 lwz %r18,FRAME_18+8(%r1); \
188 lwz %r17,FRAME_17+8(%r1); \
189 lwz %r16,FRAME_16+8(%r1); \
190 lwz %r15,FRAME_15+8(%r1); \
191 lwz %r14,FRAME_14+8(%r1); \
192 lwz %r13,FRAME_13+8(%r1); \
193 lwz %r12,FRAME_12+8(%r1); \
194 lwz %r11,FRAME_11+8(%r1); \
195 lwz %r10,FRAME_10+8(%r1); \
196 lwz %r9, FRAME_9+8(%r1); \
197 lwz %r8, FRAME_8+8(%r1); \
198 lwz %r7, FRAME_7+8(%r1); \
199 lwz %r6, FRAME_6+8(%r1); \
200 lwz %r5, FRAME_5+8(%r1); \
201 lwz %r4, FRAME_4+8(%r1); \
202 lwz %r3, FRAME_3+8(%r1); \
203 lwz %r2, FRAME_2+8(%r1); \
204 lwz %r0, FRAME_0+8(%r1); \
205 lwz %r1, FRAME_1+8(%r1); \
206/* Can't touch %r1 from here on */ \
207 mtsprg2 %r2; /* save r2 & r3 */ \
208 mtsprg3 %r3; \
209/* Disable translation, machine check and recoverability: */ \
210 mfmsr %r2; \
211 andi. %r2,%r2,~(PSL_DR|PSL_IR|PSL_EE|PSL_ME|PSL_RI)@l; \
212 mtmsr %r2; \
213 isync; \
214/* Decide whether we return to user mode: */ \
215 GET_CPUINFO(%r2); \
216 lwz %r3,(savearea+CPUSAVE_SRR1)(%r2); \
217 mtcr %r3; \
218 bf 17,1f; /* branch if PSL_PR is false */ \
219/* Restore user SRs */ \
220 RESTORE_USER_SRS(%r2,%r3); \
2211: mfsprg1 %r2; /* restore cr */ \
222 mtcr %r2; \
223 GET_CPUINFO(%r2); \
224 lwz %r3,(savearea+CPUSAVE_SRR0)(%r2); /* restore srr0 */ \
225 mtsrr0 %r3; \
226 lwz %r3,(savearea+CPUSAVE_SRR1)(%r2); /* restore srr1 */ \
227 mtsrr1 %r3; \
228 mfsprg2 %r2; /* restore r2 & r3 */ \
229 mfsprg3 %r3
230
231/*
232 * This code gets copied to all the trap vectors
233 * (except ISI/DSI, ALI, and the interrupts)
234 */
235 .text
236 .globl CNAME(trapcode),CNAME(trapsize)
237CNAME(trapcode):
238 mtsprg1 %r1 /* save SP */
239 GET_CPUINFO(%r1)
240 stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) /* free r28-r31 */
241 stw %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
242 stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
243 stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
244 mfsprg1 %r1 /* restore SP, in case of branch */
245 mflr %r28 /* save LR */
246 mfcr %r29 /* save CR */
247/* Test whether we already had PR set */
248 mfsrr1 %r31
249 mtcr %r31
250 bla s_trap /* LR & 0xff00 is exception # */
251CNAME(trapsize) = .-CNAME(trapcode)
252
253/*
254 * For ALI: has to save DSISR and DAR
255 */
256 .globl CNAME(alitrap),CNAME(alisize)
257CNAME(alitrap):
258 mtsprg1 %r1 /* save SP */
259 GET_CPUINFO(%r1)
260 stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) /* free r28-r31 */
261 stw %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
262 stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
263 stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
264 mfdar %r30
265 mfdsisr %r31
266 stw %r30,(PC_TEMPSAVE+CPUSAVE_DAR)(%r1)
267 stw %r31,(PC_TEMPSAVE+CPUSAVE_DSISR)(%r1)
268 mfsprg1 %r1 /* restore SP, in case of branch */
269 mflr %r28 /* save LR */
270 mfcr %r29 /* save CR */
271/* Test whether we already had PR set */
272 mfsrr1 %r31
273 mtcr %r31
274 bla s_trap /* LR & 0xff00 is exception # */
275CNAME(alisize) = .-CNAME(alitrap)
276
277/*
278 * Similar to the above for DSI
279 * Has to handle BAT spills
280 * and standard pagetable spills
281 */
282 .globl CNAME(dsitrap),CNAME(dsisize)
283CNAME(dsitrap):
284 mtsprg1 %r1 /* save SP */
285 GET_CPUINFO(%r1)
286 stw %r28,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* free r28-r31 */
287 stw %r29,(PC_DISISAVE+CPUSAVE_R29)(%r1)
288 stw %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1)
289 stw %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1)
290 mfsprg1 %r1 /* restore SP */
291 mfcr %r29 /* save CR */
292 mfxer %r30 /* save XER */
293 mtsprg2 %r30 /* in SPRG2 */
294 mfsrr1 %r31 /* test kernel mode */
295 mtcr %r31
296 bt 17,1f /* branch if PSL_PR is set */
297 mfdar %r31 /* get fault address */
298 rlwinm %r31,%r31,7,25,28 /* get segment * 8 */
299
300 /* get batu */
301 addis %r31,%r31,CNAME(battable)@ha
302 lwz %r30,CNAME(battable)@l(31)
303 mtcr %r30
304 bf 30,1f /* branch if supervisor valid is
305 false */
306 /* get batl */
307 lwz %r31,CNAME(battable)+4@l(31)
308/* We randomly use the highest two bat registers here */
309 mftb %r28
310 andi. %r28,%r28,1
311 bne 2f
312 mtdbatu 2,%r30
313 mtdbatl 2,%r31
314 b 3f
3152:
316 mtdbatu 3,%r30
317 mtdbatl 3,%r31
3183:
319 mfsprg2 %r30 /* restore XER */
320 mtxer %r30
321 mtcr %r29 /* restore CR */
322 mtsprg1 %r1
323 GET_CPUINFO(%r1)
324 lwz %r28,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* restore r28-r31 */
325 lwz %r29,(PC_DISISAVE+CPUSAVE_R29)(%r1)
326 lwz %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1)
327 lwz %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1)
328 mfsprg1 %r1
329 rfi /* return to trapped code */
3301:
331 mflr %r28 /* save LR (SP already saved) */
332 bla disitrap
333CNAME(dsisize) = .-CNAME(dsitrap)
334
335/*
336 * Preamble code for DSI/ISI traps
337 */
338disitrap:
339 GET_CPUINFO(%r1)
340 lwz %r30,(PC_DISISAVE+CPUSAVE_R28)(%r1)
341 stw %r30,(PC_TEMPSAVE+CPUSAVE_R28)(%r1)
342 lwz %r31,(PC_DISISAVE+CPUSAVE_R29)(%r1)
343 stw %r31,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
344 lwz %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1)
345 stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
346 lwz %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1)
347 stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
348 mfdar %r30
349 mfdsisr %r31
350 stw %r30,(PC_TEMPSAVE+CPUSAVE_DAR)(%r1)
351 stw %r31,(PC_TEMPSAVE+CPUSAVE_DSISR)(%r1)
352
353 /* XXX need stack probe here */
354realtrap:
355/* Test whether we already had PR set */
356 mfsrr1 %r1
357 mtcr %r1
358 mfsprg1 %r1 /* restore SP (might have been
359 overwritten) */
360s_trap:
361 bf 17,k_trap /* branch if PSL_PR is false */
362 GET_CPUINFO(%r1)
363u_trap:
364 lwz %r1,PC_CURPCB(%r1)
365 RESTORE_KERN_SRS(%r30,%r31) /* enable kernel mapping */
366
367/*
368 * Now the common trap catching code.
369 */
370k_trap:
371 FRAME_SETUP(PC_TEMPSAVE)
372/* Call C interrupt dispatcher: */
373trapagain:
374 addi %r3,%r1,8
375 bl CNAME(powerpc_interrupt)
376 .globl CNAME(trapexit)
377CNAME(trapexit):
378
379/* Disable interrupts: */
380 mfmsr %r3
381 andi. %r3,%r3,~PSL_EE@l
382 mtmsr %r3
383/* Test AST pending: */
384 lwz %r5,FRAME_SRR1+8(%r1)
385 mtcr %r5
386 bf 17,1f /* branch if PSL_PR is false */
387
388 GET_CPUINFO(%r3) /* get per-CPU pointer */
389 lwz %r4, PC_CURTHREAD(%r3) /* deref to get curthread */
390 lwz %r4, TD_FLAGS(%r4) /* get thread flags value */
391 lis %r5, (TDF_ASTPENDING|TDF_NEEDRESCHED)@h
392 ori %r5,%r5, (TDF_ASTPENDING|TDF_NEEDRESCHED)@l
393 and. %r4,%r4,%r5
394 beq 1f
395 mfmsr %r3 /* re-enable interrupts */
396 ori %r3,%r3,PSL_EE@l
397 mtmsr %r3
398 isync
399 addi %r3,%r1,8
400 bl CNAME(ast)
401 b trapexit /* test ast ret value ? */
4021:
403 FRAME_LEAVE(PC_TEMPSAVE)
404 rfi
405
406#if defined(DDB)
407/*
408 * Deliberate entry to ddbtrap
409 */
410 .globl CNAME(ddb_trap)
411CNAME(ddb_trap):
412 mtsprg1 %r1
413 mfmsr %r3
414 mtsrr1 %r3
415 andi. %r3,%r3,~(PSL_EE|PSL_ME)@l
416 mtmsr %r3 /* disable interrupts */
417 isync
418 GET_CPUINFO(%r3)
419 stw %r28,(PC_DDBSAVE+CPUSAVE_R28)(%r3)
420 stw %r29,(PC_DDBSAVE+CPUSAVE_R29)(%r3)
421 stw %r30,(PC_DDBSAVE+CPUSAVE_R30)(%r3)
422 stw %r31,(PC_DDBSAVE+CPUSAVE_R31)(%r3)
423 mflr %r28
424 li %r29,EXC_BPT
425 mtlr %r29
426 mfcr %r29
427 mtsrr0 %r28
428#endif /* DDB */
429
430#if defined(DDB) || defined(KGDB)
431/*
432 * Now the ddb trap catching code.
433 */
434ddbtrap:
435 FRAME_SETUP(PC_DDBSAVE)
436/* Call C trap code: */
437 addi %r3,%r1,8
438 bl CNAME(ddb_trap_glue)
439 or. %r3,%r3,%r3
440 bne ddbleave
441/* This wasn't for DDB, so switch to real trap: */
442 lwz %r3,FRAME_EXC+8(%r1) /* save exception */
443 GET_CPUINFO(%r4)
444 stw %r3,(PC_DDBSAVE+CPUSAVE_R31)(%r4)
445 FRAME_LEAVE(PC_DDBSAVE)
446 mtsprg1 %r1 /* prepare for entrance to realtrap */
447 GET_CPUINFO(%r1)
448 stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1)
449 stw %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
450 stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
451 stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
452 mflr %r28
453 mfcr %r29
454 lwz %r31,(PC_DDBSAVE+CPUSAVE_R31)(%r1)
455 mtlr %r31
456 mfsprg1 %r1
457 b realtrap
458ddbleave:
459 FRAME_LEAVE(PC_DDBSAVE)
460 rfi
461
462/*
463 * In case of DDB we want a separate trap catcher for it
464 */
465 .local ddbstk
466 .comm ddbstk,INTSTK,8 /* ddb stack */
467
468 .globl CNAME(ddblow),CNAME(ddbsize)
469CNAME(ddblow):
470 mtsprg1 %r1 /* save SP */
471 mtsprg2 %r29 /* save r29 */
472 mfcr %r29 /* save CR in r29 */
473 mfsrr1 %r1
474 mtcr %r1
475 GET_CPUINFO(%r1)
476 bf 17,1f /* branch if privileged */
477 stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) /* free r28 */
478 mfsprg2 %r28 /* r29 holds cr ... */
479 stw %r28,(PC_TEMPSAVE+CPUSAVE_R29)(%r1) /* free r29 */
480 stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1) /* free r30 */
481 stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1) /* free r31 */
482 mflr %r28 /* save LR */
483 bla u_trap
4841:
485 stw %r28,(PC_DDBSAVE+CPUSAVE_R28)(%r1) /* free r28 */
486 mfsprg2 %r28 /* r29 holds cr... */
487 stw %r28,(PC_DDBSAVE+CPUSAVE_R29)(%r1) /* free r29 */
488 stw %r30,(PC_DDBSAVE+CPUSAVE_R30)(%r1) /* free r30 */
489 stw %r31,(PC_DDBSAVE+CPUSAVE_R31)(%r1) /* free r31 */
490 mflr %r28 /* save LR */
491 lis %r1,ddbstk+INTSTK@ha /* get new SP */
492 addi %r1,%r1,ddbstk+INTSTK@l
493 bla ddbtrap
494CNAME(ddbsize) = .-CNAME(ddblow)
495#endif /* DDB || KGDB */
2/* $NetBSD: trap_subr.S,v 1.20 2002/04/22 23:20:08 kleink Exp $ */
3
4/*
5 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6 * Copyright (C) 1995, 1996 TooLs GmbH.
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
--- 25 unchanged lines hidden (view full) ---
35/*
36 * NOTICE: This is not a standalone file. to use it, #include it in
37 * your port's locore.S, like so:
38 *
39 * #include <powerpc/powerpc/trap_subr.S>
40 */
41
42/*
43 * Save/restore segment registers
44 */
45#define RESTORE_SRS(pmap,sr) mtsr 0,sr; \
46 lwz sr,1*4(pmap); mtsr 1,sr; \
47 lwz sr,2*4(pmap); mtsr 2,sr; \
48 lwz sr,3*4(pmap); mtsr 3,sr; \
49 lwz sr,4*4(pmap); mtsr 4,sr; \
50 lwz sr,5*4(pmap); mtsr 5,sr; \
51 lwz sr,6*4(pmap); mtsr 6,sr; \
52 lwz sr,7*4(pmap); mtsr 7,sr; \
53 lwz sr,8*4(pmap); mtsr 8,sr; \
54 lwz sr,9*4(pmap); mtsr 9,sr; \
55 lwz sr,10*4(pmap); mtsr 10,sr; \
56 lwz sr,11*4(pmap); mtsr 11,sr; \
57 lwz sr,12*4(pmap); mtsr 12,sr; \
58 lwz sr,13*4(pmap); mtsr 13,sr; \
59 lwz sr,14*4(pmap); mtsr 14,sr; \
60 lwz sr,15*4(pmap); mtsr 15,sr; isync;
61
62/*
63 * User SRs are loaded through a pointer to the current pmap.
64 */
65#define RESTORE_USER_SRS(pmap,sr) \
66 GET_CPUINFO(pmap); \
67 lwz pmap,PC_CURPMAP(pmap); \
68 lwzu sr,PM_SR(pmap); \
69 RESTORE_SRS(pmap,sr)
70
71/*
72 * Kernel SRs are loaded directly from kernel_pmap_
73 */
74#define RESTORE_KERN_SRS(pmap,sr) \
75 lis pmap,CNAME(kernel_pmap_store)@ha; \
76 lwzu sr,CNAME(kernel_pmap_store)+PM_SR@l(pmap); \
77 RESTORE_SRS(pmap,sr)
78
79/*
80 * FRAME_SETUP assumes:
81 * SPRG1 SP (1)
82 * savearea r28-r31,DAR,DSISR (DAR & DSISR only for DSI traps)
83 * r28 LR
84 * r29 CR
85 * r30 scratch
86 * r31 scratch
87 * r1 kernel stack
88 * LR trap type (from calling address, mask with 0xff00)
89 * SRR0/1 as at start of trap
90 */
91#define FRAME_SETUP(savearea) \
92/* Have to enable translation to allow access of kernel stack: */ \
93 GET_CPUINFO(%r31); \
94 mfsrr0 %r30; \
95 stw %r30,(savearea+CPUSAVE_SRR0)(%r31); /* save SRR0 */ \
96 mfsrr1 %r30; \
97 stw %r30,(savearea+CPUSAVE_SRR1)(%r31); /* save SRR1 */ \
98 mfmsr %r30; \
99 ori %r30,%r30,(PSL_DR|PSL_IR|PSL_RI)@l; /* relocation on */ \
100 mtmsr %r30; /* stack can now be accessed */ \
101 isync; \
102 mfsprg1 %r31; /* get saved SP */ \
103 stwu %r31,-FRAMELEN(%r1); /* save it in the callframe */ \
104 stw %r0, FRAME_0+8(%r1); /* save r0 in the trapframe */ \
105 stw %r31,FRAME_1+8(%r1); /* save SP " " */ \
106 stw %r2, FRAME_2+8(%r1); /* save r2 " " */ \
107 stw %r28,FRAME_LR+8(%r1); /* save LR " " */ \
108 stw %r29,FRAME_CR+8(%r1); /* save CR " " */ \
109 GET_CPUINFO(%r2); \
110 lwz %r28,(savearea+CPUSAVE_R28)(%r2); /* get saved r28 */ \
111 lwz %r29,(savearea+CPUSAVE_R29)(%r2); /* get saved r29 */ \
112 lwz %r30,(savearea+CPUSAVE_R30)(%r2); /* get saved r30 */ \
113 lwz %r31,(savearea+CPUSAVE_R31)(%r2); /* get saved r31 */ \
114 stw %r3, FRAME_3+8(%r1); /* save r3-r31 */ \
115 stw %r4, FRAME_4+8(%r1); \
116 stw %r5, FRAME_5+8(%r1); \
117 stw %r6, FRAME_6+8(%r1); \
118 stw %r7, FRAME_7+8(%r1); \
119 stw %r8, FRAME_8+8(%r1); \
120 stw %r9, FRAME_9+8(%r1); \
121 stw %r10, FRAME_10+8(%r1); \
122 stw %r11, FRAME_11+8(%r1); \
123 stw %r12, FRAME_12+8(%r1); \
124 stw %r13, FRAME_13+8(%r1); \
125 stw %r14, FRAME_14+8(%r1); \
126 stw %r15, FRAME_15+8(%r1); \
127 stw %r16, FRAME_16+8(%r1); \
128 stw %r17, FRAME_17+8(%r1); \
129 stw %r18, FRAME_18+8(%r1); \
130 stw %r19, FRAME_19+8(%r1); \
131 stw %r20, FRAME_20+8(%r1); \
132 stw %r21, FRAME_21+8(%r1); \
133 stw %r22, FRAME_22+8(%r1); \
134 stw %r23, FRAME_23+8(%r1); \
135 stw %r24, FRAME_24+8(%r1); \
136 stw %r25, FRAME_25+8(%r1); \
137 stw %r26, FRAME_26+8(%r1); \
138 stw %r27, FRAME_27+8(%r1); \
139 stw %r28, FRAME_28+8(%r1); \
140 stw %r29, FRAME_29+8(%r1); \
141 stw %r30, FRAME_30+8(%r1); \
142 stw %r31, FRAME_31+8(%r1); \
143 lwz %r28,(savearea+CPUSAVE_DAR)(%r2); /* saved DAR */ \
144 lwz %r29,(savearea+CPUSAVE_DSISR)(%r2);/* saved DSISR */ \
145 lwz %r30,(savearea+CPUSAVE_SRR0)(%r2); /* saved SRR0 */ \
146 lwz %r31,(savearea+CPUSAVE_SRR1)(%r2); /* saved SRR1 */ \
147 mfxer %r3; \
148 mfctr %r4; \
149 mflr %r5; \
150 andi. %r5,%r5,0xff00; /* convert LR to exc # */ \
151 stw %r3, FRAME_XER+8(1); /* save xer/ctr/exc */ \
152 stw %r4, FRAME_CTR+8(1); \
153 stw %r5, FRAME_EXC+8(1); \
154 stw %r28,FRAME_DAR+8(1); \
155 stw %r29,FRAME_DSISR+8(1); /* save dsisr/srr0/srr1 */ \
156 stw %r30,FRAME_SRR0+8(1); \
157 stw %r31,FRAME_SRR1+8(1)
158
159#define FRAME_LEAVE(savearea) \
160/* Now restore regs: */ \
161 lwz %r2,FRAME_SRR0+8(%r1); \
162 lwz %r3,FRAME_SRR1+8(%r1); \
163 lwz %r4,FRAME_CTR+8(%r1); \
164 lwz %r5,FRAME_XER+8(%r1); \
165 lwz %r6,FRAME_LR+8(%r1); \
166 GET_CPUINFO(%r7); \
167 stw %r2,(savearea+CPUSAVE_SRR0)(%r7); /* save SRR0 */ \
168 stw %r3,(savearea+CPUSAVE_SRR1)(%r7); /* save SRR1 */ \
169 lwz %r7,FRAME_CR+8(%r1); \
170 mtctr %r4; \
171 mtxer %r5; \
172 mtlr %r6; \
173 mtsprg1 %r7; /* save cr */ \
174 lwz %r31,FRAME_31+8(%r1); /* restore r0-31 */ \
175 lwz %r30,FRAME_30+8(%r1); \
176 lwz %r29,FRAME_29+8(%r1); \
177 lwz %r28,FRAME_28+8(%r1); \
178 lwz %r27,FRAME_27+8(%r1); \
179 lwz %r26,FRAME_26+8(%r1); \
180 lwz %r25,FRAME_25+8(%r1); \
181 lwz %r24,FRAME_24+8(%r1); \
182 lwz %r23,FRAME_23+8(%r1); \
183 lwz %r22,FRAME_22+8(%r1); \
184 lwz %r21,FRAME_21+8(%r1); \
185 lwz %r20,FRAME_20+8(%r1); \
186 lwz %r19,FRAME_19+8(%r1); \
187 lwz %r18,FRAME_18+8(%r1); \
188 lwz %r17,FRAME_17+8(%r1); \
189 lwz %r16,FRAME_16+8(%r1); \
190 lwz %r15,FRAME_15+8(%r1); \
191 lwz %r14,FRAME_14+8(%r1); \
192 lwz %r13,FRAME_13+8(%r1); \
193 lwz %r12,FRAME_12+8(%r1); \
194 lwz %r11,FRAME_11+8(%r1); \
195 lwz %r10,FRAME_10+8(%r1); \
196 lwz %r9, FRAME_9+8(%r1); \
197 lwz %r8, FRAME_8+8(%r1); \
198 lwz %r7, FRAME_7+8(%r1); \
199 lwz %r6, FRAME_6+8(%r1); \
200 lwz %r5, FRAME_5+8(%r1); \
201 lwz %r4, FRAME_4+8(%r1); \
202 lwz %r3, FRAME_3+8(%r1); \
203 lwz %r2, FRAME_2+8(%r1); \
204 lwz %r0, FRAME_0+8(%r1); \
205 lwz %r1, FRAME_1+8(%r1); \
206/* Can't touch %r1 from here on */ \
207 mtsprg2 %r2; /* save r2 & r3 */ \
208 mtsprg3 %r3; \
209/* Disable translation, machine check and recoverability: */ \
210 mfmsr %r2; \
211 andi. %r2,%r2,~(PSL_DR|PSL_IR|PSL_EE|PSL_ME|PSL_RI)@l; \
212 mtmsr %r2; \
213 isync; \
214/* Decide whether we return to user mode: */ \
215 GET_CPUINFO(%r2); \
216 lwz %r3,(savearea+CPUSAVE_SRR1)(%r2); \
217 mtcr %r3; \
218 bf 17,1f; /* branch if PSL_PR is false */ \
219/* Restore user SRs */ \
220 RESTORE_USER_SRS(%r2,%r3); \
2211: mfsprg1 %r2; /* restore cr */ \
222 mtcr %r2; \
223 GET_CPUINFO(%r2); \
224 lwz %r3,(savearea+CPUSAVE_SRR0)(%r2); /* restore srr0 */ \
225 mtsrr0 %r3; \
226 lwz %r3,(savearea+CPUSAVE_SRR1)(%r2); /* restore srr1 */ \
227 mtsrr1 %r3; \
228 mfsprg2 %r2; /* restore r2 & r3 */ \
229 mfsprg3 %r3
230
231/*
232 * This code gets copied to all the trap vectors
233 * (except ISI/DSI, ALI, and the interrupts)
234 */
235 .text
236 .globl CNAME(trapcode),CNAME(trapsize)
237CNAME(trapcode):
238 mtsprg1 %r1 /* save SP */
239 GET_CPUINFO(%r1)
240 stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) /* free r28-r31 */
241 stw %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
242 stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
243 stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
244 mfsprg1 %r1 /* restore SP, in case of branch */
245 mflr %r28 /* save LR */
246 mfcr %r29 /* save CR */
247/* Test whether we already had PR set */
248 mfsrr1 %r31
249 mtcr %r31
250 bla s_trap /* LR & 0xff00 is exception # */
251CNAME(trapsize) = .-CNAME(trapcode)
252
253/*
254 * For ALI: has to save DSISR and DAR
255 */
256 .globl CNAME(alitrap),CNAME(alisize)
257CNAME(alitrap):
258 mtsprg1 %r1 /* save SP */
259 GET_CPUINFO(%r1)
260 stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) /* free r28-r31 */
261 stw %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
262 stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
263 stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
264 mfdar %r30
265 mfdsisr %r31
266 stw %r30,(PC_TEMPSAVE+CPUSAVE_DAR)(%r1)
267 stw %r31,(PC_TEMPSAVE+CPUSAVE_DSISR)(%r1)
268 mfsprg1 %r1 /* restore SP, in case of branch */
269 mflr %r28 /* save LR */
270 mfcr %r29 /* save CR */
271/* Test whether we already had PR set */
272 mfsrr1 %r31
273 mtcr %r31
274 bla s_trap /* LR & 0xff00 is exception # */
275CNAME(alisize) = .-CNAME(alitrap)
276
277/*
278 * Similar to the above for DSI
279 * Has to handle BAT spills
280 * and standard pagetable spills
281 */
282 .globl CNAME(dsitrap),CNAME(dsisize)
283CNAME(dsitrap):
284 mtsprg1 %r1 /* save SP */
285 GET_CPUINFO(%r1)
286 stw %r28,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* free r28-r31 */
287 stw %r29,(PC_DISISAVE+CPUSAVE_R29)(%r1)
288 stw %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1)
289 stw %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1)
290 mfsprg1 %r1 /* restore SP */
291 mfcr %r29 /* save CR */
292 mfxer %r30 /* save XER */
293 mtsprg2 %r30 /* in SPRG2 */
294 mfsrr1 %r31 /* test kernel mode */
295 mtcr %r31
296 bt 17,1f /* branch if PSL_PR is set */
297 mfdar %r31 /* get fault address */
298 rlwinm %r31,%r31,7,25,28 /* get segment * 8 */
299
300 /* get batu */
301 addis %r31,%r31,CNAME(battable)@ha
302 lwz %r30,CNAME(battable)@l(31)
303 mtcr %r30
304 bf 30,1f /* branch if supervisor valid is
305 false */
306 /* get batl */
307 lwz %r31,CNAME(battable)+4@l(31)
308/* We randomly use the highest two bat registers here */
309 mftb %r28
310 andi. %r28,%r28,1
311 bne 2f
312 mtdbatu 2,%r30
313 mtdbatl 2,%r31
314 b 3f
3152:
316 mtdbatu 3,%r30
317 mtdbatl 3,%r31
3183:
319 mfsprg2 %r30 /* restore XER */
320 mtxer %r30
321 mtcr %r29 /* restore CR */
322 mtsprg1 %r1
323 GET_CPUINFO(%r1)
324 lwz %r28,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* restore r28-r31 */
325 lwz %r29,(PC_DISISAVE+CPUSAVE_R29)(%r1)
326 lwz %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1)
327 lwz %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1)
328 mfsprg1 %r1
329 rfi /* return to trapped code */
3301:
331 mflr %r28 /* save LR (SP already saved) */
332 bla disitrap
333CNAME(dsisize) = .-CNAME(dsitrap)
334
335/*
336 * Preamble code for DSI/ISI traps
337 */
338disitrap:
339 GET_CPUINFO(%r1)
340 lwz %r30,(PC_DISISAVE+CPUSAVE_R28)(%r1)
341 stw %r30,(PC_TEMPSAVE+CPUSAVE_R28)(%r1)
342 lwz %r31,(PC_DISISAVE+CPUSAVE_R29)(%r1)
343 stw %r31,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
344 lwz %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1)
345 stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
346 lwz %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1)
347 stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
348 mfdar %r30
349 mfdsisr %r31
350 stw %r30,(PC_TEMPSAVE+CPUSAVE_DAR)(%r1)
351 stw %r31,(PC_TEMPSAVE+CPUSAVE_DSISR)(%r1)
352
353 /* XXX need stack probe here */
354realtrap:
355/* Test whether we already had PR set */
356 mfsrr1 %r1
357 mtcr %r1
358 mfsprg1 %r1 /* restore SP (might have been
359 overwritten) */
360s_trap:
361 bf 17,k_trap /* branch if PSL_PR is false */
362 GET_CPUINFO(%r1)
363u_trap:
364 lwz %r1,PC_CURPCB(%r1)
365 RESTORE_KERN_SRS(%r30,%r31) /* enable kernel mapping */
366
367/*
368 * Now the common trap catching code.
369 */
370k_trap:
371 FRAME_SETUP(PC_TEMPSAVE)
372/* Call C interrupt dispatcher: */
373trapagain:
374 addi %r3,%r1,8
375 bl CNAME(powerpc_interrupt)
376 .globl CNAME(trapexit)
377CNAME(trapexit):
378
379/* Disable interrupts: */
380 mfmsr %r3
381 andi. %r3,%r3,~PSL_EE@l
382 mtmsr %r3
383/* Test AST pending: */
384 lwz %r5,FRAME_SRR1+8(%r1)
385 mtcr %r5
386 bf 17,1f /* branch if PSL_PR is false */
387
388 GET_CPUINFO(%r3) /* get per-CPU pointer */
389 lwz %r4, PC_CURTHREAD(%r3) /* deref to get curthread */
390 lwz %r4, TD_FLAGS(%r4) /* get thread flags value */
391 lis %r5, (TDF_ASTPENDING|TDF_NEEDRESCHED)@h
392 ori %r5,%r5, (TDF_ASTPENDING|TDF_NEEDRESCHED)@l
393 and. %r4,%r4,%r5
394 beq 1f
395 mfmsr %r3 /* re-enable interrupts */
396 ori %r3,%r3,PSL_EE@l
397 mtmsr %r3
398 isync
399 addi %r3,%r1,8
400 bl CNAME(ast)
401 b trapexit /* test ast ret value ? */
4021:
403 FRAME_LEAVE(PC_TEMPSAVE)
404 rfi
405
406#if defined(DDB)
407/*
408 * Deliberate entry to ddbtrap
409 */
410 .globl CNAME(ddb_trap)
411CNAME(ddb_trap):
412 mtsprg1 %r1
413 mfmsr %r3
414 mtsrr1 %r3
415 andi. %r3,%r3,~(PSL_EE|PSL_ME)@l
416 mtmsr %r3 /* disable interrupts */
417 isync
418 GET_CPUINFO(%r3)
419 stw %r28,(PC_DDBSAVE+CPUSAVE_R28)(%r3)
420 stw %r29,(PC_DDBSAVE+CPUSAVE_R29)(%r3)
421 stw %r30,(PC_DDBSAVE+CPUSAVE_R30)(%r3)
422 stw %r31,(PC_DDBSAVE+CPUSAVE_R31)(%r3)
423 mflr %r28
424 li %r29,EXC_BPT
425 mtlr %r29
426 mfcr %r29
427 mtsrr0 %r28
428#endif /* DDB */
429
430#if defined(DDB) || defined(KGDB)
431/*
432 * Now the ddb trap catching code.
433 */
434ddbtrap:
435 FRAME_SETUP(PC_DDBSAVE)
436/* Call C trap code: */
437 addi %r3,%r1,8
438 bl CNAME(ddb_trap_glue)
439 or. %r3,%r3,%r3
440 bne ddbleave
441/* This wasn't for DDB, so switch to real trap: */
442 lwz %r3,FRAME_EXC+8(%r1) /* save exception */
443 GET_CPUINFO(%r4)
444 stw %r3,(PC_DDBSAVE+CPUSAVE_R31)(%r4)
445 FRAME_LEAVE(PC_DDBSAVE)
446 mtsprg1 %r1 /* prepare for entrance to realtrap */
447 GET_CPUINFO(%r1)
448 stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1)
449 stw %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
450 stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
451 stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
452 mflr %r28
453 mfcr %r29
454 lwz %r31,(PC_DDBSAVE+CPUSAVE_R31)(%r1)
455 mtlr %r31
456 mfsprg1 %r1
457 b realtrap
458ddbleave:
459 FRAME_LEAVE(PC_DDBSAVE)
460 rfi
461
462/*
463 * In case of DDB we want a separate trap catcher for it
464 */
465 .local ddbstk
466 .comm ddbstk,INTSTK,8 /* ddb stack */
467
468 .globl CNAME(ddblow),CNAME(ddbsize)
469CNAME(ddblow):
470 mtsprg1 %r1 /* save SP */
471 mtsprg2 %r29 /* save r29 */
472 mfcr %r29 /* save CR in r29 */
473 mfsrr1 %r1
474 mtcr %r1
475 GET_CPUINFO(%r1)
476 bf 17,1f /* branch if privileged */
477 stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) /* free r28 */
478 mfsprg2 %r28 /* r29 holds cr ... */
479 stw %r28,(PC_TEMPSAVE+CPUSAVE_R29)(%r1) /* free r29 */
480 stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1) /* free r30 */
481 stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1) /* free r31 */
482 mflr %r28 /* save LR */
483 bla u_trap
4841:
485 stw %r28,(PC_DDBSAVE+CPUSAVE_R28)(%r1) /* free r28 */
486 mfsprg2 %r28 /* r29 holds cr... */
487 stw %r28,(PC_DDBSAVE+CPUSAVE_R29)(%r1) /* free r29 */
488 stw %r30,(PC_DDBSAVE+CPUSAVE_R30)(%r1) /* free r30 */
489 stw %r31,(PC_DDBSAVE+CPUSAVE_R31)(%r1) /* free r31 */
490 mflr %r28 /* save LR */
491 lis %r1,ddbstk+INTSTK@ha /* get new SP */
492 addi %r1,%r1,ddbstk+INTSTK@l
493 bla ddbtrap
494CNAME(ddbsize) = .-CNAME(ddblow)
495#endif /* DDB || KGDB */