Deleted Added
full compact
cbus_dma.c (146049) cbus_dma.c (146214)
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
33 */
34
35#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
33 */
34
35#include <sys/cdefs.h>
36__FBSDID("$FreeBSD: head/sys/pc98/cbus/cbus_dma.c 146049 2005-05-10 12:02:18Z nyan $");
36__FBSDID("$FreeBSD: head/sys/pc98/cbus/cbus_dma.c 146214 2005-05-14 10:14:56Z nyan $");
37
38/*
39 * code to manage AT bus
40 *
41 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
42 * Fixed uninitialized variable problem and added code to deal
43 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
44 * mode DMA count compution and reorganized DMA setup code in
45 * isa_dmastart()
46 */
47
48#include "opt_pc98.h"
49
50#include <sys/param.h>
51#include <sys/systm.h>
52#include <sys/bus.h>
53#include <sys/kernel.h>
54#include <sys/malloc.h>
55#include <sys/lock.h>
56#include <sys/proc.h>
57#include <sys/mutex.h>
58#include <sys/module.h>
59#include <machine/md_var.h>
60#include <vm/vm.h>
61#include <vm/vm_param.h>
62#include <vm/pmap.h>
37
38/*
39 * code to manage AT bus
40 *
41 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
42 * Fixed uninitialized variable problem and added code to deal
43 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
44 * mode DMA count compution and reorganized DMA setup code in
45 * isa_dmastart()
46 */
47
48#include "opt_pc98.h"
49
50#include <sys/param.h>
51#include <sys/systm.h>
52#include <sys/bus.h>
53#include <sys/kernel.h>
54#include <sys/malloc.h>
55#include <sys/lock.h>
56#include <sys/proc.h>
57#include <sys/mutex.h>
58#include <sys/module.h>
59#include <machine/md_var.h>
60#include <vm/vm.h>
61#include <vm/vm_param.h>
62#include <vm/pmap.h>
63#include <dev/ic/i8237.h>
64#include <isa/isavar.h>
65#include <pc98/cbus/cbus.h>
63#include <isa/isavar.h>
64#include <pc98/cbus/cbus.h>
65#include <pc98/cbus/cbus_dmareg.h>
66
66
67/*
68** Register definitions for DMA controller 1 (channels 0..3):
69*/
70#define DMA1_CHN(c) (IO_DMA + (4*(c))) /* addr reg for channel c */
71#define DMA1_STATUS (IO_DMA + 0x10) /* status register */
72#define DMA1_SMSK (IO_DMA + 0x14) /* single mask register */
73#define DMA1_MODE (IO_DMA + 0x16) /* mode register */
74#define DMA1_FFC (IO_DMA + 0x18) /* clear first/last FF */
75
76static int isa_dmarangecheck(caddr_t va, u_int length, int chan);
77
78static caddr_t dma_bouncebuf[4];
79static u_int dma_bouncebufsize[4];
80static u_int8_t dma_bounced = 0;
81static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
82static u_int8_t dma_inuse = 0; /* User for acquire/release */
83static u_int8_t dma_auto_mode = 0;
84
85#define VALID_DMA_MASK (3)
86
87/* high byte of address is stored in this port for i-th dma channel */
88static int dmapageport[4] = { 0x27, 0x21, 0x23, 0x25 };
89
90/*
91 * Setup a DMA channel's bounce buffer.
92 */
93int
94isa_dma_init(int chan, u_int bouncebufsize, int flag)
95{
96 void *buf;
97
98#ifdef DIAGNOSTIC
99 if (chan & ~VALID_DMA_MASK)
100 panic("isa_dma_init: channel out of range");
101 if (dma_bouncebuf[chan] != NULL)
102 panic("isa_dma_init: impossible request");
103#endif
104
105 dma_bouncebufsize[chan] = bouncebufsize;
106
107 /* Try malloc() first. It works better if it works. */
108 buf = malloc(bouncebufsize, M_DEVBUF, flag);
109 if (buf != NULL) {
110 if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) {
111 dma_bouncebuf[chan] = buf;
112 return (0);
113 }
114 free(buf, M_DEVBUF);
115 }
116 buf = contigmalloc(bouncebufsize, M_DEVBUF, flag, 0ul, 0xfffffful,
117 1ul, chan & 4 ? 0x20000ul : 0x10000ul);
118 if (buf == NULL)
119 return (ENOMEM);
120 dma_bouncebuf[chan] = buf;
121 return (0);
122}
123
124/*
125 * Register a DMA channel's usage. Usually called from a device driver
126 * in open() or during its initialization.
127 */
128int
129isa_dma_acquire(chan)
130 int chan;
131{
132#ifdef DIAGNOSTIC
133 if (chan & ~VALID_DMA_MASK)
134 panic("isa_dma_acquire: channel out of range");
135#endif
136
137 if (dma_inuse & (1 << chan)) {
138 printf("isa_dma_acquire: channel %d already in use\n", chan);
139 return (EBUSY);
140 }
141 dma_inuse |= (1 << chan);
142 dma_auto_mode &= ~(1 << chan);
143
144 return (0);
145}
146
147/*
148 * Unregister a DMA channel's usage. Usually called from a device driver
149 * during close() or during its shutdown.
150 */
151void
152isa_dma_release(chan)
153 int chan;
154{
155#ifdef DIAGNOSTIC
156 if (chan & ~VALID_DMA_MASK)
157 panic("isa_dma_release: channel out of range");
158
159 if ((dma_inuse & (1 << chan)) == 0)
160 printf("isa_dma_release: channel %d not in use\n", chan);
161#endif
162
163 if (dma_busy & (1 << chan)) {
164 dma_busy &= ~(1 << chan);
165 /*
166 * XXX We should also do "dma_bounced &= (1 << chan);"
167 * because we are acting on behalf of isa_dmadone() which
168 * was not called to end the last DMA operation. This does
169 * not matter now, but it may in the future.
170 */
171 }
172
173 dma_inuse &= ~(1 << chan);
174 dma_auto_mode &= ~(1 << chan);
175}
176
177/*
178 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
179 * problems by using a bounce buffer.
180 */
181void
182isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
183{
184 vm_paddr_t phys;
185 int waport;
186 caddr_t newaddr;
187
188 GIANT_REQUIRED;
189
190#ifdef DIAGNOSTIC
191 if (chan & ~VALID_DMA_MASK)
192 panic("isa_dmastart: channel out of range");
193
194 if ((chan < 4 && nbytes > (1<<16))
195 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
196 panic("isa_dmastart: impossible request");
197
198 if ((dma_inuse & (1 << chan)) == 0)
199 printf("isa_dmastart: channel %d not acquired\n", chan);
200#endif
201
202#if 0
203 /*
204 * XXX This should be checked, but drivers like ad1848 only call
205 * isa_dmastart() once because they use Auto DMA mode. If we
206 * leave this in, drivers that do this will print this continuously.
207 */
208 if (dma_busy & (1 << chan))
209 printf("isa_dmastart: channel %d busy\n", chan);
210#endif
211
212 dma_busy |= (1 << chan);
213
214 if (isa_dmarangecheck(addr, nbytes, chan)) {
215 if (dma_bouncebuf[chan] == NULL
216 || dma_bouncebufsize[chan] < nbytes)
217 panic("isa_dmastart: bad bounce buffer");
218 dma_bounced |= (1 << chan);
219 newaddr = dma_bouncebuf[chan];
220
221 /* copy bounce buffer on write */
222 if (!(flags & ISADMA_READ))
223 bcopy(addr, newaddr, nbytes);
224 addr = newaddr;
225 }
226
227 /* translate to physical */
228 phys = pmap_extract(kernel_pmap, (vm_offset_t)addr);
229
230 if (flags & ISADMA_RAW) {
231 dma_auto_mode |= (1 << chan);
232 } else {
233 dma_auto_mode &= ~(1 << chan);
234 }
235
236 if (need_pre_dma_flush)
237 wbinvd(); /* wbinvd (WB cache flush) */
238
239 /* set dma channel mode, and reset address ff */
240
241 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
242 if (flags & ISADMA_RAW) {
243 if (flags & ISADMA_READ)
244 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
245 else
246 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
247 } else {
248 if (flags & ISADMA_READ)
249 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
250 else
251 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
252 }
253 outb(DMA1_FFC, 0);
254
255 /* send start address */
256 waport = DMA1_CHN(chan);
257 outb(waport, phys);
258 outb(waport, phys>>8);
259 outb(dmapageport[chan], phys>>16);
260
261 /* send count */
262 outb(waport + 2, --nbytes);
263 outb(waport + 2, nbytes>>8);
264
265 /* unmask channel */
266 outb(DMA1_SMSK, chan);
267}
268
269void
270isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
271{
272
273 if (flags & ISADMA_READ) {
274 /* cache flush only after reading 92/12/9 by A.Kojima */
275 if (need_post_dma_flush)
276 invd();
277 }
278
279#ifdef DIAGNOSTIC
280 if (chan & ~VALID_DMA_MASK)
281 panic("isa_dmadone: channel out of range");
282
283 if ((dma_inuse & (1 << chan)) == 0)
284 printf("isa_dmadone: channel %d not acquired\n", chan);
285#endif
286
287 if (((dma_busy & (1 << chan)) == 0) &&
288 (dma_auto_mode & (1 << chan)) == 0 )
289 printf("isa_dmadone: channel %d not busy\n", chan);
290
291 if ((dma_auto_mode & (1 << chan)) == 0)
292 outb(DMA1_SMSK, (chan & 3) | 4);
293
294 if (dma_bounced & (1 << chan)) {
295 /* copy bounce buffer on read */
296 if (flags & ISADMA_READ)
297 bcopy(dma_bouncebuf[chan], addr, nbytes);
298
299 dma_bounced &= ~(1 << chan);
300 }
301 dma_busy &= ~(1 << chan);
302}
303
304/*
305 * Check for problems with the address range of a DMA transfer
306 * (non-contiguous physical pages, outside of bus address space,
307 * crossing DMA page boundaries).
308 * Return true if special handling needed.
309 */
310
311static int
312isa_dmarangecheck(caddr_t va, u_int length, int chan)
313{
314 vm_paddr_t phys, priorpage = 0;
315 vm_offset_t endva;
316 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
317
318 GIANT_REQUIRED;
319
320 endva = (vm_offset_t)round_page((vm_offset_t)va + length);
321 for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
322 phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va));
323#ifdef EPSON_BOUNCEDMA
324#define ISARAM_END 0xf00000
325#else
326#define ISARAM_END RAM_END
327#endif
328 if (phys == 0)
329 panic("isa_dmacheck: no physical page present");
330 if (phys >= ISARAM_END)
331 return (1);
332 if (priorpage) {
333 if (priorpage + PAGE_SIZE != phys)
334 return (1);
335 /* check if crossing a DMA page boundary */
336 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
337 return (1);
338 }
339 priorpage = phys;
340 }
341 return (0);
342}
343
344/*
345 * Query the progress of a transfer on a DMA channel.
346 *
347 * To avoid having to interrupt a transfer in progress, we sample
348 * each of the high and low databytes twice, and apply the following
349 * logic to determine the correct count.
350 *
351 * Reads are performed with interrupts disabled, thus it is to be
352 * expected that the time between reads is very small. At most
353 * one rollover in the low count byte can be expected within the
354 * four reads that are performed.
355 *
356 * There are three gaps in which a rollover can occur :
357 *
358 * - read low1
359 * gap1
360 * - read high1
361 * gap2
362 * - read low2
363 * gap3
364 * - read high2
365 *
366 * If a rollover occurs in gap1 or gap2, the low2 value will be
367 * greater than the low1 value. In this case, low2 and high2 are a
368 * corresponding pair.
369 *
370 * In any other case, low1 and high1 can be considered to be correct.
371 *
372 * The function returns the number of bytes remaining in the transfer,
373 * or -1 if the channel requested is not active.
374 *
375 */
376int
377isa_dmastatus(int chan)
378{
379 u_long cnt = 0;
380 int ffport, waport;
381 u_long low1, high1, low2, high2;
382
383 /* channel active? */
384 if ((dma_inuse & (1 << chan)) == 0) {
385 printf("isa_dmastatus: channel %d not active\n", chan);
386 return(-1);
387 }
388 /* channel busy? */
389
390 if (((dma_busy & (1 << chan)) == 0) &&
391 (dma_auto_mode & (1 << chan)) == 0 ) {
392 printf("chan %d not busy\n", chan);
393 return -2 ;
394 }
395 ffport = DMA1_FFC;
396 waport = DMA1_CHN(chan) + 2;
397
398 disable_intr(); /* no interrupts Mr Jones! */
399 outb(ffport, 0); /* clear register LSB flipflop */
400 low1 = inb(waport);
401 high1 = inb(waport);
402 outb(ffport, 0); /* clear again */
403 low2 = inb(waport);
404 high2 = inb(waport);
405 enable_intr(); /* enable interrupts again */
406
407 /*
408 * Now decide if a wrap has tried to skew our results.
409 * Note that after TC, the count will read 0xffff, while we want
410 * to return zero, so we add and then mask to compensate.
411 */
412 if (low1 >= low2) {
413 cnt = (low1 + (high1 << 8) + 1) & 0xffff;
414 } else {
415 cnt = (low2 + (high2 << 8) + 1) & 0xffff;
416 }
417
418 if (chan >= 4) /* high channels move words */
419 cnt *= 2;
420 return(cnt);
421}
422
423/*
424 * Reached terminal count yet ?
425 */
426int
427isa_dmatc(int chan)
428{
429
430 return(inb(DMA1_STATUS) & (1 << chan));
431}
432
433/*
434 * Stop a DMA transfer currently in progress.
435 */
436int
437isa_dmastop(int chan)
438{
439 if ((dma_inuse & (1 << chan)) == 0)
440 printf("isa_dmastop: channel %d not acquired\n", chan);
441
442 if (((dma_busy & (1 << chan)) == 0) &&
443 ((dma_auto_mode & (1 << chan)) == 0)) {
444 printf("chan %d not busy\n", chan);
445 return -2 ;
446 }
447
448 if ((chan & 4) == 0)
449 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
450
451 return(isa_dmastatus(chan));
452}
453
454/*
455 * Attach to the ISA PnP descriptor for the AT DMA controller
456 */
457static struct isa_pnp_id atdma_ids[] = {
458 { 0x0002d041 /* PNP0200 */, "AT DMA controller" },
459 { 0 }
460};
461
462static int
463atdma_probe(device_t dev)
464{
465 int result;
466
467 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0)
468 device_quiet(dev);
469 return(result);
470}
471
472static int
473atdma_attach(device_t dev)
474{
475 return(0);
476}
477
478static device_method_t atdma_methods[] = {
479 /* Device interface */
480 DEVMETHOD(device_probe, atdma_probe),
481 DEVMETHOD(device_attach, atdma_attach),
482 DEVMETHOD(device_detach, bus_generic_detach),
483 DEVMETHOD(device_shutdown, bus_generic_shutdown),
484 DEVMETHOD(device_suspend, bus_generic_suspend),
485 DEVMETHOD(device_resume, bus_generic_resume),
486 { 0, 0 }
487};
488
489static driver_t atdma_driver = {
490 "atdma",
491 atdma_methods,
492 1, /* no softc */
493};
494
495static devclass_t atdma_devclass;
496
497DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
67static int isa_dmarangecheck(caddr_t va, u_int length, int chan);
68
69static caddr_t dma_bouncebuf[4];
70static u_int dma_bouncebufsize[4];
71static u_int8_t dma_bounced = 0;
72static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
73static u_int8_t dma_inuse = 0; /* User for acquire/release */
74static u_int8_t dma_auto_mode = 0;
75
76#define VALID_DMA_MASK (3)
77
78/* high byte of address is stored in this port for i-th dma channel */
79static int dmapageport[4] = { 0x27, 0x21, 0x23, 0x25 };
80
81/*
82 * Setup a DMA channel's bounce buffer.
83 */
84int
85isa_dma_init(int chan, u_int bouncebufsize, int flag)
86{
87 void *buf;
88
89#ifdef DIAGNOSTIC
90 if (chan & ~VALID_DMA_MASK)
91 panic("isa_dma_init: channel out of range");
92 if (dma_bouncebuf[chan] != NULL)
93 panic("isa_dma_init: impossible request");
94#endif
95
96 dma_bouncebufsize[chan] = bouncebufsize;
97
98 /* Try malloc() first. It works better if it works. */
99 buf = malloc(bouncebufsize, M_DEVBUF, flag);
100 if (buf != NULL) {
101 if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) {
102 dma_bouncebuf[chan] = buf;
103 return (0);
104 }
105 free(buf, M_DEVBUF);
106 }
107 buf = contigmalloc(bouncebufsize, M_DEVBUF, flag, 0ul, 0xfffffful,
108 1ul, chan & 4 ? 0x20000ul : 0x10000ul);
109 if (buf == NULL)
110 return (ENOMEM);
111 dma_bouncebuf[chan] = buf;
112 return (0);
113}
114
115/*
116 * Register a DMA channel's usage. Usually called from a device driver
117 * in open() or during its initialization.
118 */
119int
120isa_dma_acquire(chan)
121 int chan;
122{
123#ifdef DIAGNOSTIC
124 if (chan & ~VALID_DMA_MASK)
125 panic("isa_dma_acquire: channel out of range");
126#endif
127
128 if (dma_inuse & (1 << chan)) {
129 printf("isa_dma_acquire: channel %d already in use\n", chan);
130 return (EBUSY);
131 }
132 dma_inuse |= (1 << chan);
133 dma_auto_mode &= ~(1 << chan);
134
135 return (0);
136}
137
138/*
139 * Unregister a DMA channel's usage. Usually called from a device driver
140 * during close() or during its shutdown.
141 */
142void
143isa_dma_release(chan)
144 int chan;
145{
146#ifdef DIAGNOSTIC
147 if (chan & ~VALID_DMA_MASK)
148 panic("isa_dma_release: channel out of range");
149
150 if ((dma_inuse & (1 << chan)) == 0)
151 printf("isa_dma_release: channel %d not in use\n", chan);
152#endif
153
154 if (dma_busy & (1 << chan)) {
155 dma_busy &= ~(1 << chan);
156 /*
157 * XXX We should also do "dma_bounced &= (1 << chan);"
158 * because we are acting on behalf of isa_dmadone() which
159 * was not called to end the last DMA operation. This does
160 * not matter now, but it may in the future.
161 */
162 }
163
164 dma_inuse &= ~(1 << chan);
165 dma_auto_mode &= ~(1 << chan);
166}
167
168/*
169 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
170 * problems by using a bounce buffer.
171 */
172void
173isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
174{
175 vm_paddr_t phys;
176 int waport;
177 caddr_t newaddr;
178
179 GIANT_REQUIRED;
180
181#ifdef DIAGNOSTIC
182 if (chan & ~VALID_DMA_MASK)
183 panic("isa_dmastart: channel out of range");
184
185 if ((chan < 4 && nbytes > (1<<16))
186 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
187 panic("isa_dmastart: impossible request");
188
189 if ((dma_inuse & (1 << chan)) == 0)
190 printf("isa_dmastart: channel %d not acquired\n", chan);
191#endif
192
193#if 0
194 /*
195 * XXX This should be checked, but drivers like ad1848 only call
196 * isa_dmastart() once because they use Auto DMA mode. If we
197 * leave this in, drivers that do this will print this continuously.
198 */
199 if (dma_busy & (1 << chan))
200 printf("isa_dmastart: channel %d busy\n", chan);
201#endif
202
203 dma_busy |= (1 << chan);
204
205 if (isa_dmarangecheck(addr, nbytes, chan)) {
206 if (dma_bouncebuf[chan] == NULL
207 || dma_bouncebufsize[chan] < nbytes)
208 panic("isa_dmastart: bad bounce buffer");
209 dma_bounced |= (1 << chan);
210 newaddr = dma_bouncebuf[chan];
211
212 /* copy bounce buffer on write */
213 if (!(flags & ISADMA_READ))
214 bcopy(addr, newaddr, nbytes);
215 addr = newaddr;
216 }
217
218 /* translate to physical */
219 phys = pmap_extract(kernel_pmap, (vm_offset_t)addr);
220
221 if (flags & ISADMA_RAW) {
222 dma_auto_mode |= (1 << chan);
223 } else {
224 dma_auto_mode &= ~(1 << chan);
225 }
226
227 if (need_pre_dma_flush)
228 wbinvd(); /* wbinvd (WB cache flush) */
229
230 /* set dma channel mode, and reset address ff */
231
232 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
233 if (flags & ISADMA_RAW) {
234 if (flags & ISADMA_READ)
235 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
236 else
237 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
238 } else {
239 if (flags & ISADMA_READ)
240 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
241 else
242 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
243 }
244 outb(DMA1_FFC, 0);
245
246 /* send start address */
247 waport = DMA1_CHN(chan);
248 outb(waport, phys);
249 outb(waport, phys>>8);
250 outb(dmapageport[chan], phys>>16);
251
252 /* send count */
253 outb(waport + 2, --nbytes);
254 outb(waport + 2, nbytes>>8);
255
256 /* unmask channel */
257 outb(DMA1_SMSK, chan);
258}
259
260void
261isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
262{
263
264 if (flags & ISADMA_READ) {
265 /* cache flush only after reading 92/12/9 by A.Kojima */
266 if (need_post_dma_flush)
267 invd();
268 }
269
270#ifdef DIAGNOSTIC
271 if (chan & ~VALID_DMA_MASK)
272 panic("isa_dmadone: channel out of range");
273
274 if ((dma_inuse & (1 << chan)) == 0)
275 printf("isa_dmadone: channel %d not acquired\n", chan);
276#endif
277
278 if (((dma_busy & (1 << chan)) == 0) &&
279 (dma_auto_mode & (1 << chan)) == 0 )
280 printf("isa_dmadone: channel %d not busy\n", chan);
281
282 if ((dma_auto_mode & (1 << chan)) == 0)
283 outb(DMA1_SMSK, (chan & 3) | 4);
284
285 if (dma_bounced & (1 << chan)) {
286 /* copy bounce buffer on read */
287 if (flags & ISADMA_READ)
288 bcopy(dma_bouncebuf[chan], addr, nbytes);
289
290 dma_bounced &= ~(1 << chan);
291 }
292 dma_busy &= ~(1 << chan);
293}
294
295/*
296 * Check for problems with the address range of a DMA transfer
297 * (non-contiguous physical pages, outside of bus address space,
298 * crossing DMA page boundaries).
299 * Return true if special handling needed.
300 */
301
302static int
303isa_dmarangecheck(caddr_t va, u_int length, int chan)
304{
305 vm_paddr_t phys, priorpage = 0;
306 vm_offset_t endva;
307 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
308
309 GIANT_REQUIRED;
310
311 endva = (vm_offset_t)round_page((vm_offset_t)va + length);
312 for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
313 phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va));
314#ifdef EPSON_BOUNCEDMA
315#define ISARAM_END 0xf00000
316#else
317#define ISARAM_END RAM_END
318#endif
319 if (phys == 0)
320 panic("isa_dmacheck: no physical page present");
321 if (phys >= ISARAM_END)
322 return (1);
323 if (priorpage) {
324 if (priorpage + PAGE_SIZE != phys)
325 return (1);
326 /* check if crossing a DMA page boundary */
327 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
328 return (1);
329 }
330 priorpage = phys;
331 }
332 return (0);
333}
334
335/*
336 * Query the progress of a transfer on a DMA channel.
337 *
338 * To avoid having to interrupt a transfer in progress, we sample
339 * each of the high and low databytes twice, and apply the following
340 * logic to determine the correct count.
341 *
342 * Reads are performed with interrupts disabled, thus it is to be
343 * expected that the time between reads is very small. At most
344 * one rollover in the low count byte can be expected within the
345 * four reads that are performed.
346 *
347 * There are three gaps in which a rollover can occur :
348 *
349 * - read low1
350 * gap1
351 * - read high1
352 * gap2
353 * - read low2
354 * gap3
355 * - read high2
356 *
357 * If a rollover occurs in gap1 or gap2, the low2 value will be
358 * greater than the low1 value. In this case, low2 and high2 are a
359 * corresponding pair.
360 *
361 * In any other case, low1 and high1 can be considered to be correct.
362 *
363 * The function returns the number of bytes remaining in the transfer,
364 * or -1 if the channel requested is not active.
365 *
366 */
367int
368isa_dmastatus(int chan)
369{
370 u_long cnt = 0;
371 int ffport, waport;
372 u_long low1, high1, low2, high2;
373
374 /* channel active? */
375 if ((dma_inuse & (1 << chan)) == 0) {
376 printf("isa_dmastatus: channel %d not active\n", chan);
377 return(-1);
378 }
379 /* channel busy? */
380
381 if (((dma_busy & (1 << chan)) == 0) &&
382 (dma_auto_mode & (1 << chan)) == 0 ) {
383 printf("chan %d not busy\n", chan);
384 return -2 ;
385 }
386 ffport = DMA1_FFC;
387 waport = DMA1_CHN(chan) + 2;
388
389 disable_intr(); /* no interrupts Mr Jones! */
390 outb(ffport, 0); /* clear register LSB flipflop */
391 low1 = inb(waport);
392 high1 = inb(waport);
393 outb(ffport, 0); /* clear again */
394 low2 = inb(waport);
395 high2 = inb(waport);
396 enable_intr(); /* enable interrupts again */
397
398 /*
399 * Now decide if a wrap has tried to skew our results.
400 * Note that after TC, the count will read 0xffff, while we want
401 * to return zero, so we add and then mask to compensate.
402 */
403 if (low1 >= low2) {
404 cnt = (low1 + (high1 << 8) + 1) & 0xffff;
405 } else {
406 cnt = (low2 + (high2 << 8) + 1) & 0xffff;
407 }
408
409 if (chan >= 4) /* high channels move words */
410 cnt *= 2;
411 return(cnt);
412}
413
414/*
415 * Reached terminal count yet ?
416 */
417int
418isa_dmatc(int chan)
419{
420
421 return(inb(DMA1_STATUS) & (1 << chan));
422}
423
424/*
425 * Stop a DMA transfer currently in progress.
426 */
427int
428isa_dmastop(int chan)
429{
430 if ((dma_inuse & (1 << chan)) == 0)
431 printf("isa_dmastop: channel %d not acquired\n", chan);
432
433 if (((dma_busy & (1 << chan)) == 0) &&
434 ((dma_auto_mode & (1 << chan)) == 0)) {
435 printf("chan %d not busy\n", chan);
436 return -2 ;
437 }
438
439 if ((chan & 4) == 0)
440 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
441
442 return(isa_dmastatus(chan));
443}
444
445/*
446 * Attach to the ISA PnP descriptor for the AT DMA controller
447 */
448static struct isa_pnp_id atdma_ids[] = {
449 { 0x0002d041 /* PNP0200 */, "AT DMA controller" },
450 { 0 }
451};
452
453static int
454atdma_probe(device_t dev)
455{
456 int result;
457
458 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0)
459 device_quiet(dev);
460 return(result);
461}
462
463static int
464atdma_attach(device_t dev)
465{
466 return(0);
467}
468
469static device_method_t atdma_methods[] = {
470 /* Device interface */
471 DEVMETHOD(device_probe, atdma_probe),
472 DEVMETHOD(device_attach, atdma_attach),
473 DEVMETHOD(device_detach, bus_generic_detach),
474 DEVMETHOD(device_shutdown, bus_generic_shutdown),
475 DEVMETHOD(device_suspend, bus_generic_suspend),
476 DEVMETHOD(device_resume, bus_generic_resume),
477 { 0, 0 }
478};
479
480static driver_t atdma_driver = {
481 "atdma",
482 atdma_methods,
483 1, /* no softc */
484};
485
486static devclass_t atdma_devclass;
487
488DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);