| malta_machdep.c (182901) | malta_machdep.c (202035) |
|---|---|
| 1/*- 2 * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/mips/malta/malta_machdep.c 182901 2008-09-10 03:49:08Z gonzo $ | 26 * $FreeBSD: head/sys/mips/malta/malta_machdep.c 202035 2010-01-10 20:06:14Z imp $ |
| 27 */ 28#include <sys/cdefs.h> | 27 */ 28#include <sys/cdefs.h> |
| 29__FBSDID("$FreeBSD: head/sys/mips/malta/malta_machdep.c 182901 2008-09-10 03:49:08Z gonzo $"); | 29__FBSDID("$FreeBSD: head/sys/mips/malta/malta_machdep.c 202035 2010-01-10 20:06:14Z imp $"); |
| 30 31#include "opt_ddb.h" 32 33#include <sys/param.h> 34#include <sys/conf.h> 35#include <sys/kernel.h> 36#include <sys/systm.h> 37#include <sys/imgact.h> --- 54 unchanged lines hidden (view full) --- 92 MALTA_ASCIIPOS2, 93 MALTA_ASCIIPOS3, 94 MALTA_ASCIIPOS4, 95 MALTA_ASCIIPOS5, 96 MALTA_ASCIIPOS6, 97 MALTA_ASCIIPOS7 98}; 99 | 30 31#include "opt_ddb.h" 32 33#include <sys/param.h> 34#include <sys/conf.h> 35#include <sys/kernel.h> 36#include <sys/systm.h> 37#include <sys/imgact.h> --- 54 unchanged lines hidden (view full) --- 92 MALTA_ASCIIPOS2, 93 MALTA_ASCIIPOS3, 94 MALTA_ASCIIPOS4, 95 MALTA_ASCIIPOS5, 96 MALTA_ASCIIPOS6, 97 MALTA_ASCIIPOS7 98}; 99 |
| 100void 101platform_cpu_init() 102{ 103 /* Nothing special */ 104} 105 |
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| 100/* 101 * Put character to Malta LCD at given position. 102 */ 103static void 104malta_lcd_putc(int pos, char c) 105{ 106 void *addr; 107 char *ch; --- 113 unchanged lines hidden (view full) --- 221} 222 223void 224platform_trap_exit(void) 225{ 226 227} 228 | 106/* 107 * Put character to Malta LCD at given position. 108 */ 109static void 110malta_lcd_putc(int pos, char c) 111{ 112 void *addr; 113 char *ch; --- 113 unchanged lines hidden (view full) --- 227} 228 229void 230platform_trap_exit(void) 231{ 232 233} 234 |
| 235static uint64_t 236malta_cpu_freq(void) 237{ 238 uint64_t platform_counter_freq = 0; 239 240#if defined(TICK_USE_YAMON_FREQ) 241 /* 242 * If we are running on a board which uses YAMON firmware, 243 * then query CPU pipeline clock from the syscon object. 244 * If unsuccessful, use hard-coded default. 245 */ 246 platform_counter_freq = yamon_getcpufreq(); 247 248#elif defined(TICK_USE_MALTA_RTC) 249 /* 250 * If we are running on a board with the MC146818 RTC, 251 * use it to determine CPU pipeline clock frequency. 252 */ 253 u_int64_t counterval[2]; 254 255 /* Set RTC to binary mode. */ 256 writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD)); 257 258 /* Busy-wait for falling edge of RTC update. */ 259 while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) 260 ; 261 while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) 262 ; 263 counterval[0] = mips_rd_count(); 264 265 /* Busy-wait for falling edge of RTC update. */ 266 while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) 267 ; 268 while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) 269 ; 270 counterval[1] = mips_rd_count(); 271 272 platform_counter_freq = counterval[1] - counterval[0]; 273#endif 274 275 if (platform_counter_freq == 0) 276 platform_counter_freq = MIPS_DEFAULT_HZ; 277 278 return (platform_counter_freq); 279} 280 |
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| 229void 230platform_start(__register_t a0, __register_t a1, __register_t a2, 231 __register_t a3) 232{ 233 vm_offset_t kernend; 234 uint64_t platform_counter_freq; 235 int argc = a0; 236 char **argv = (char **)a1; 237 char **envp = (char **)a2; 238 unsigned int memsize = a3; 239 int i; 240 241 /* clear the BSS and SBSS segments */ 242 kernend = round_page((vm_offset_t)&end); 243 memset(&edata, 0, kernend - (vm_offset_t)(&edata)); 244 | 281void 282platform_start(__register_t a0, __register_t a1, __register_t a2, 283 __register_t a3) 284{ 285 vm_offset_t kernend; 286 uint64_t platform_counter_freq; 287 int argc = a0; 288 char **argv = (char **)a1; 289 char **envp = (char **)a2; 290 unsigned int memsize = a3; 291 int i; 292 293 /* clear the BSS and SBSS segments */ 294 kernend = round_page((vm_offset_t)&end); 295 memset(&edata, 0, kernend - (vm_offset_t)(&edata)); 296 |
| 297 mips_pcpu0_init(); 298 platform_counter_freq = malta_cpu_freq(); 299 mips_timer_early_init(platform_counter_freq); 300 |
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| 245 cninit(); 246 printf("entry: platform_start()\n"); 247 248 bootverbose = 1; 249 if (bootverbose) { 250 printf("cmd line: "); 251 for (i = 0; i < argc; i++) 252 printf("%s ", argv[i]); --- 4 unchanged lines hidden (view full) --- 257 printf("\t%s = %s\n", envp[i], envp[i+1]); 258 259 printf("memsize = %08x\n", memsize); 260 } 261 262 realmem = btoc(memsize); 263 mips_init(); 264 | 301 cninit(); 302 printf("entry: platform_start()\n"); 303 304 bootverbose = 1; 305 if (bootverbose) { 306 printf("cmd line: "); 307 for (i = 0; i < argc; i++) 308 printf("%s ", argv[i]); --- 4 unchanged lines hidden (view full) --- 313 printf("\t%s = %s\n", envp[i], envp[i+1]); 314 315 printf("memsize = %08x\n", memsize); 316 } 317 318 realmem = btoc(memsize); 319 mips_init(); 320 |
| 265 do { 266#if defined(TICK_USE_YAMON_FREQ) 267 /* 268 * If we are running on a board which uses YAMON firmware, 269 * then query CPU pipeline clock from the syscon object. 270 * If unsuccessful, use hard-coded default. 271 */ 272 platform_counter_freq = yamon_getcpufreq(); 273 if (platform_counter_freq == 0) 274 platform_counter_freq = MIPS_DEFAULT_HZ; 275 276#elif defined(TICK_USE_MALTA_RTC) 277 /* 278 * If we are running on a board with the MC146818 RTC, 279 * use it to determine CPU pipeline clock frequency. 280 */ 281 u_int64_t counterval[2]; 282 283 /* Set RTC to binary mode. */ 284 writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD)); 285 286 /* Busy-wait for falling edge of RTC update. */ 287 while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) 288 ; 289 while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) 290 ; 291 counterval[0] = mips_rd_count(); 292 293 /* Busy-wait for falling edge of RTC update. */ 294 while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) 295 ; 296 while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) 297 ; 298 counterval[1] = mips_rd_count(); 299 300 platform_counter_freq = counterval[1] - counterval[0]; 301#endif 302 } while(0); 303 | |
| 304 mips_timer_init_params(platform_counter_freq, 0); 305} | 321 mips_timer_init_params(platform_counter_freq, 0); 322} |