| ar71xxreg.h (211510) | ar71xxreg.h (213239) |
|---|---|
| 1/*- 2 * Copyright (c) 2009 Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 | 1/*- 2 * Copyright (c) 2009 Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 |
| 27/* $FreeBSD: head/sys/mips/atheros/ar71xxreg.h 211510 2010-08-19 16:25:15Z adrian $ */ | 27/* $FreeBSD: head/sys/mips/atheros/ar71xxreg.h 213239 2010-09-28 03:31:34Z gonzo $ */ |
| 28 29#ifndef _AR71XX_REG_H_ 30#define _AR71XX_REG_H_ 31 32/* PCI region */ 33#define AR71XX_PCI_MEM_BASE 0x10000000 34/* 35 * PCI mem windows is 0x08000000 bytes long but we exclude control --- 119 unchanged lines hidden (view full) --- 155 /* CS2 is shared with GPIO_1 */ 156#define GPIO_FUNC_SPI_CS1_EN (1 << 14) 157 /* CS1 is shared with GPIO_0 */ 158#define GPIO_FUNC_SPI_EN (1 << 13) 159#define GPIO_FUNC_UART_EN (1 << 8) 160#define GPIO_FUNC_USB_OC_EN (1 << 4) 161#define GPIO_FUNC_USB_CLK_EN (0) 162 | 28 29#ifndef _AR71XX_REG_H_ 30#define _AR71XX_REG_H_ 31 32/* PCI region */ 33#define AR71XX_PCI_MEM_BASE 0x10000000 34/* 35 * PCI mem windows is 0x08000000 bytes long but we exclude control --- 119 unchanged lines hidden (view full) --- 155 /* CS2 is shared with GPIO_1 */ 156#define GPIO_FUNC_SPI_CS1_EN (1 << 14) 157 /* CS1 is shared with GPIO_0 */ 158#define GPIO_FUNC_SPI_EN (1 << 13) 159#define GPIO_FUNC_UART_EN (1 << 8) 160#define GPIO_FUNC_USB_OC_EN (1 << 4) 161#define GPIO_FUNC_USB_CLK_EN (0) 162 |
| 163#define AR71XX_GPIO_BASE 0x18040000 164#define AR71XX_GPIO_OE 0x00 165#define AR71XX_GPIO_IN 0x04 166#define AR71XX_GPIO_OUT 0x08 167#define AR71XX_GPIO_SET 0x0c 168#define AR71XX_GPIO_CLEAR 0x10 169#define AR71XX_GPIO_INT 0x14 170#define AR71XX_GPIO_INT_TYPE 0x18 171#define AR71XX_GPIO_INT_POLARITY 0x1c 172#define AR71XX_GPIO_INT_PENDING 0x20 173#define AR71XX_GPIO_INT_MASK 0x24 174#define AR71XX_GPIO_FUNCTION 0x28 175#define GPIO_SPI_CS2_EN (1 << 13) 176#define GPIO_SPI_CS1_EN (1 << 12) 177 |
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| 163#define AR71XX_BASE_FREQ 40000000 164#define AR71XX_PLL_CPU_BASE 0x18050000 165#define AR71XX_PLL_CPU_CONFIG 0x18050000 166#define PLL_SW_UPDATE (1 << 31) 167#define PLL_LOCKED (1 << 30) 168#define PLL_AHB_DIV_SHIFT 20 169#define PLL_AHB_DIV_MASK 7 170#define PLL_DDR_DIV_SEL_SHIFT 18 --- 359 unchanged lines hidden --- | 178#define AR71XX_BASE_FREQ 40000000 179#define AR71XX_PLL_CPU_BASE 0x18050000 180#define AR71XX_PLL_CPU_CONFIG 0x18050000 181#define PLL_SW_UPDATE (1 << 31) 182#define PLL_LOCKED (1 << 30) 183#define PLL_AHB_DIV_SHIFT 20 184#define PLL_AHB_DIV_MASK 7 185#define PLL_DDR_DIV_SEL_SHIFT 18 --- 359 unchanged lines hidden --- |