1/*
2 * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include "imx6q.dtsi"
| 1/*
2 * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include "imx6q.dtsi"
|
| 13#include "imx6qdl-phytec-pfla02.dtsi"
|
13
14/ {
| 14
15/ {
|
15 model = "Phytec phyFLEX-i.MX6 Ouad";
| 16 model = "Phytec phyFLEX-i.MX6 Quad";
|
16 compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
17
18 memory {
19 reg = <0x10000000 0x80000000>;
20 };
21};
| 17 compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
18
19 memory {
20 reg = <0x10000000 0x80000000>;
21 };
22};
|
22
23&ecspi3 {
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_ecspi3_1>;
26 status = "okay";
27 fsl,spi-num-chipselects = <1>;
28 cs-gpios = <&gpio4 24 0>;
29
30 flash@0 {
31 compatible = "m25p80";
32 spi-max-frequency = <20000000>;
33 reg = <0>;
34 };
35};
36
37&i2c1 {
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_i2c1_1>;
40 status = "okay";
41
42 eeprom@50 {
43 compatible = "atmel,24c32";
44 reg = <0x50>;
45 };
46
47 pmic@58 {
48 compatible = "dialog,da9063";
49 reg = <0x58>;
50 interrupt-parent = <&gpio4>;
51 interrupts = <17 0x8>; /* active-low GPIO4_17 */
52
53 regulators {
54 vddcore_reg: bcore1 {
55 regulator-min-microvolt = <730000>;
56 regulator-max-microvolt = <1380000>;
57 regulator-always-on;
58 };
59
60 vddsoc_reg: bcore2 {
61 regulator-min-microvolt = <730000>;
62 regulator-max-microvolt = <1380000>;
63 regulator-always-on;
64 };
65
66 vdd_ddr3_reg: bpro {
67 regulator-min-microvolt = <1500000>;
68 regulator-max-microvolt = <1500000>;
69 regulator-always-on;
70 };
71
72 vdd_3v3_reg: bperi {
73 regulator-min-microvolt = <3300000>;
74 regulator-max-microvolt = <3300000>;
75 regulator-always-on;
76 };
77
78 vdd_buckmem_reg: bmem {
79 regulator-min-microvolt = <3300000>;
80 regulator-max-microvolt = <3300000>;
81 regulator-always-on;
82 };
83
84 vdd_eth_reg: bio {
85 regulator-min-microvolt = <1200000>;
86 regulator-max-microvolt = <1200000>;
87 regulator-always-on;
88 };
89
90 vdd_eth_io_reg: ldo4 {
91 regulator-min-microvolt = <2500000>;
92 regulator-max-microvolt = <2500000>;
93 regulator-always-on;
94 };
95
96 vdd_mx6_snvs_reg: ldo5 {
97 regulator-min-microvolt = <3000000>;
98 regulator-max-microvolt = <3000000>;
99 regulator-always-on;
100 };
101
102 vdd_3v3_pmic_io_reg: ldo6 {
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
105 regulator-always-on;
106 };
107
108 vdd_sd0_reg: ldo9 {
109 regulator-min-microvolt = <3300000>;
110 regulator-max-microvolt = <3300000>;
111 };
112
113 vdd_sd1_reg: ldo10 {
114 regulator-min-microvolt = <3300000>;
115 regulator-max-microvolt = <3300000>;
116 };
117
118 vdd_mx6_high_reg: ldo11 {
119 regulator-min-microvolt = <3000000>;
120 regulator-max-microvolt = <3000000>;
121 regulator-always-on;
122 };
123 };
124 };
125};
126
127&iomuxc {
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_hog>;
130
131 hog {
132 pinctrl_hog: hoggrp {
133 fsl,pins = <
134 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
135 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
136 MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000 /* PMIC interrupt */
137 >;
138 };
139 };
140
141 pfla02 {
142 pinctrl_usdhc3_pfla02: usdhc3grp-pfla02 {
143 fsl,pins = <
144 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
145 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
146 >;
147 };
148 };
149};
150
151&fec {
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_enet_3>;
154 phy-mode = "rgmii";
155 phy-reset-gpios = <&gpio3 23 0>;
156 status = "disabled";
157};
158
159&uart4 {
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_uart4_1>;
162 status = "disabled";
163};
164
165&usdhc2 {
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_usdhc2_2>;
168 cd-gpios = <&gpio1 4 0>;
169 wp-gpios = <&gpio1 2 0>;
170 status = "disabled";
171};
172
173&usdhc3 {
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_usdhc3_2
176 &pinctrl_usdhc3_pfla02>;
177 cd-gpios = <&gpio1 27 0>;
178 wp-gpios = <&gpio1 29 0>;
179 status = "disabled";
180};
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