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at91sam9x5_macb1.dtsi (262573) at91sam9x5_macb1.dtsi (270864)
1/*
2 * at91sam9x5_macb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 2
3 * Ethernet interfaces.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */

--- 17 unchanged lines hidden (view full) ---

26 AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
27 AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
28 AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
29 AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
30 };
31 };
32 };
33
1/*
2 * at91sam9x5_macb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 2
3 * Ethernet interfaces.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */

--- 17 unchanged lines hidden (view full) ---

26 AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
27 AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
28 AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
29 AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
30 };
31 };
32 };
33
34 pmc: pmc@fffffc00 {
35 periphck {
36 macb1_clk: macb1_clk {
37 #clock-cells = <0>;
38 reg = <27>;
39 };
40 };
41 };
42
34 macb1: ethernet@f8030000 {
35 compatible = "cdns,at32ap7000-macb", "cdns,macb";
36 reg = <0xf8030000 0x100>;
37 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_macb1_rmii>;
43 macb1: ethernet@f8030000 {
44 compatible = "cdns,at32ap7000-macb", "cdns,macb";
45 reg = <0xf8030000 0x100>;
46 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_macb1_rmii>;
49 clocks = <&macb1_clk>, <&macb1_clk>;
50 clock-names = "hclk", "pclk";
40 status = "disabled";
41 };
42 };
43 };
44};
51 status = "disabled";
52 };
53 };
54 };
55};