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at91sam9x5_macb0.dtsi (262573) at91sam9x5_macb0.dtsi (270864)
1/*
2 * at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
3 * Ethernet interface.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */

--- 29 unchanged lines hidden (view full) ---

38 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
39 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
40 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
41 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
42 };
43 };
44 };
45
1/*
2 * at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
3 * Ethernet interface.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */

--- 29 unchanged lines hidden (view full) ---

38 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
39 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
40 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
41 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
42 };
43 };
44 };
45
46 pmc: pmc@fffffc00 {
47 periphck {
48 macb0_clk: macb0_clk {
49 #clock-cells = <0>;
50 reg = <24>;
51 };
52 };
53 };
54
46 macb0: ethernet@f802c000 {
47 compatible = "cdns,at32ap7000-macb", "cdns,macb";
48 reg = <0xf802c000 0x100>;
49 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_macb0_rmii>;
55 macb0: ethernet@f802c000 {
56 compatible = "cdns,at32ap7000-macb", "cdns,macb";
57 reg = <0xf802c000 0x100>;
58 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_macb0_rmii>;
61 clocks = <&macb0_clk>, <&macb0_clk>;
62 clock-names = "hclk", "pclk";
52 status = "disabled";
53 };
54 };
55 };
56};
63 status = "disabled";
64 };
65 };
66 };
67};