1/*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12#include "skeleton.dtsi"
13#include <dt-bindings/dma/at91.h>
14#include <dt-bindings/pinctrl/at91.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16#include <dt-bindings/gpio/gpio.h>
17
18/ {
19 model = "Atmel AT91SAM9x5 family SoC";
20 compatible = "atmel,at91sam9x5";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
--- 21 unchanged lines hidden (view full) ---
46 device_type = "cpu";
47 };
48 };
49
50 memory {
51 reg = <0x20000000 0x10000000>;
52 };
53
54 ahb {
55 compatible = "simple-bus";
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 apb {
61 compatible = "simple-bus";
--- 10 unchanged lines hidden (view full) ---
72 };
73
74 ramc0: ramc@ffffe800 {
75 compatible = "atmel,at91sam9g45-ddramc";
76 reg = <0xffffe800 0x200>;
77 };
78
79 pmc: pmc@fffffc00 {
80 compatible = "atmel,at91rm9200-pmc";
81 reg = <0xfffffc00 0x100>;
82 };
83
84 rstc@fffffe00 {
85 compatible = "atmel,at91sam9g45-rstc";
86 reg = <0xfffffe00 0x10>;
87 };
88
89 shdwc@fffffe10 {
90 compatible = "atmel,at91sam9x5-shdwc";
91 reg = <0xfffffe10 0x10>;
92 };
93
94 pit: timer@fffffe30 {
95 compatible = "atmel,at91sam9260-pit";
96 reg = <0xfffffe30 0xf>;
97 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
98 };
99
100 tcb0: timer@f8008000 {
101 compatible = "atmel,at91sam9x5-tcb";
102 reg = <0xf8008000 0x100>;
103 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
104 };
105
106 tcb1: timer@f800c000 {
107 compatible = "atmel,at91sam9x5-tcb";
108 reg = <0xf800c000 0x100>;
109 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
110 };
111
112 dma0: dma-controller@ffffec00 {
113 compatible = "atmel,at91sam9g45-dma";
114 reg = <0xffffec00 0x200>;
115 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
116 #dma-cells = <2>;
117 };
118
119 dma1: dma-controller@ffffee00 {
120 compatible = "atmel,at91sam9g45-dma";
121 reg = <0xffffee00 0x200>;
122 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
123 #dma-cells = <2>;
124 };
125
126 pinctrl@fffff400 {
127 #address-cells = <1>;
128 #size-cells = <1>;
129 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
130 ranges = <0xfffff400 0xfffff400 0x800>;
131
--- 316 unchanged lines hidden (view full) ---
448 pioA: gpio@fffff400 {
449 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
450 reg = <0xfffff400 0x200>;
451 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
452 #gpio-cells = <2>;
453 gpio-controller;
454 interrupt-controller;
455 #interrupt-cells = <2>;
456 };
457
458 pioB: gpio@fffff600 {
459 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
460 reg = <0xfffff600 0x200>;
461 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
462 #gpio-cells = <2>;
463 gpio-controller;
464 #gpio-lines = <19>;
465 interrupt-controller;
466 #interrupt-cells = <2>;
467 };
468
469 pioC: gpio@fffff800 {
470 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
471 reg = <0xfffff800 0x200>;
472 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
473 #gpio-cells = <2>;
474 gpio-controller;
475 interrupt-controller;
476 #interrupt-cells = <2>;
477 };
478
479 pioD: gpio@fffffa00 {
480 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
481 reg = <0xfffffa00 0x200>;
482 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
483 #gpio-cells = <2>;
484 gpio-controller;
485 #gpio-lines = <22>;
486 interrupt-controller;
487 #interrupt-cells = <2>;
488 };
489 };
490
491 ssc0: ssc@f0010000 {
492 compatible = "atmel,at91sam9g45-ssc";
493 reg = <0xf0010000 0x4000>;
494 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
495 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
496 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
497 dma-names = "tx", "rx";
498 pinctrl-names = "default";
499 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
500 status = "disabled";
501 };
502
503 mmc0: mmc@f0008000 {
504 compatible = "atmel,hsmci";
505 reg = <0xf0008000 0x600>;
506 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
507 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
508 dma-names = "rxtx";
509 pinctrl-names = "default";
510 #address-cells = <1>;
511 #size-cells = <0>;
512 status = "disabled";
513 };
514
515 mmc1: mmc@f000c000 {
516 compatible = "atmel,hsmci";
517 reg = <0xf000c000 0x600>;
518 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
519 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
520 dma-names = "rxtx";
521 pinctrl-names = "default";
522 #address-cells = <1>;
523 #size-cells = <0>;
524 status = "disabled";
525 };
526
527 dbgu: serial@fffff200 {
528 compatible = "atmel,at91sam9260-usart";
529 reg = <0xfffff200 0x200>;
530 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
531 pinctrl-names = "default";
532 pinctrl-0 = <&pinctrl_dbgu>;
533 status = "disabled";
534 };
535
536 usart0: serial@f801c000 {
537 compatible = "atmel,at91sam9260-usart";
538 reg = <0xf801c000 0x200>;
539 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
540 pinctrl-names = "default";
541 pinctrl-0 = <&pinctrl_usart0>;
542 status = "disabled";
543 };
544
545 usart1: serial@f8020000 {
546 compatible = "atmel,at91sam9260-usart";
547 reg = <0xf8020000 0x200>;
548 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
549 pinctrl-names = "default";
550 pinctrl-0 = <&pinctrl_usart1>;
551 status = "disabled";
552 };
553
554 usart2: serial@f8024000 {
555 compatible = "atmel,at91sam9260-usart";
556 reg = <0xf8024000 0x200>;
557 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_usart2>;
560 status = "disabled";
561 };
562
563 i2c0: i2c@f8010000 {
564 compatible = "atmel,at91sam9x5-i2c";
565 reg = <0xf8010000 0x100>;
566 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
567 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
568 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
569 dma-names = "tx", "rx";
570 #address-cells = <1>;
571 #size-cells = <0>;
572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_i2c0>;
574 status = "disabled";
575 };
576
577 i2c1: i2c@f8014000 {
578 compatible = "atmel,at91sam9x5-i2c";
579 reg = <0xf8014000 0x100>;
580 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
581 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
582 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
583 dma-names = "tx", "rx";
584 #address-cells = <1>;
585 #size-cells = <0>;
586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_i2c1>;
588 status = "disabled";
589 };
590
591 i2c2: i2c@f8018000 {
592 compatible = "atmel,at91sam9x5-i2c";
593 reg = <0xf8018000 0x100>;
594 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
595 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
596 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
597 dma-names = "tx", "rx";
598 #address-cells = <1>;
599 #size-cells = <0>;
600 pinctrl-names = "default";
601 pinctrl-0 = <&pinctrl_i2c2>;
602 status = "disabled";
603 };
604
605 uart0: serial@f8040000 {
606 compatible = "atmel,at91sam9260-usart";
607 reg = <0xf8040000 0x200>;
608 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
609 pinctrl-names = "default";
610 pinctrl-0 = <&pinctrl_uart0>;
611 status = "disabled";
612 };
613
614 uart1: serial@f8044000 {
615 compatible = "atmel,at91sam9260-usart";
616 reg = <0xf8044000 0x200>;
617 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
618 pinctrl-names = "default";
619 pinctrl-0 = <&pinctrl_uart1>;
620 status = "disabled";
621 };
622
623 adc0: adc@f804c000 {
624 compatible = "atmel,at91sam9260-adc";
625 reg = <0xf804c000 0x100>;
626 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
627 atmel,adc-use-external;
628 atmel,adc-channels-used = <0xffff>;
629 atmel,adc-vref = <3300>;
630 atmel,adc-num-channels = <12>;
631 atmel,adc-startup-time = <40>;
632 atmel,adc-channel-base = <0x50>;
633 atmel,adc-drdy-mask = <0x1000000>;
634 atmel,adc-status-register = <0x30>;
635 atmel,adc-trigger-register = <0xc0>;
636 atmel,adc-res = <8 10>;
637 atmel,adc-res-names = "lowres", "highres";
638 atmel,adc-use-res = "highres";
639
640 trigger@0 {
641 trigger-name = "external-rising";
642 trigger-value = <0x1>;
643 trigger-external;
644 };
645
646 trigger@1 {
647 trigger-name = "external-falling";
648 trigger-value = <0x2>;
649 trigger-external;
650 };
651
652 trigger@2 {
653 trigger-name = "external-any";
654 trigger-value = <0x3>;
655 trigger-external;
656 };
657
658 trigger@3 {
659 trigger-name = "continuous";
660 trigger-value = <0x6>;
661 };
662 };
663
664 spi0: spi@f0000000 {
665 #address-cells = <1>;
666 #size-cells = <0>;
667 compatible = "atmel,at91rm9200-spi";
668 reg = <0xf0000000 0x100>;
669 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
670 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
671 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
672 dma-names = "tx", "rx";
673 pinctrl-names = "default";
674 pinctrl-0 = <&pinctrl_spi0>;
675 status = "disabled";
676 };
677
678 spi1: spi@f0004000 {
679 #address-cells = <1>;
680 #size-cells = <0>;
681 compatible = "atmel,at91rm9200-spi";
682 reg = <0xf0004000 0x100>;
683 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
684 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
685 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
686 dma-names = "tx", "rx";
687 pinctrl-names = "default";
688 pinctrl-0 = <&pinctrl_spi1>;
689 status = "disabled";
690 };
691
692 usb2: gadget@f803c000 {
693 #address-cells = <1>;
694 #size-cells = <0>;
695 compatible = "atmel,at91sam9rl-udc";
696 reg = <0x00500000 0x80000
697 0xf803c000 0x400>;
698 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
699 status = "disabled";
700
701 ep0 {
702 reg = <0>;
703 atmel,fifo-size = <64>;
704 atmel,nb-banks = <1>;
705 };
706
--- 61 unchanged lines hidden (view full) ---
768 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
769 status = "disabled";
770 };
771
772 pwm0: pwm@f8034000 {
773 compatible = "atmel,at91sam9rl-pwm";
774 reg = <0xf8034000 0x300>;
775 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
776 #pwm-cells = <3>;
777 status = "disabled";
778 };
779 };
780
781 nand0: nand@40000000 {
782 compatible = "atmel,at91rm9200-nand";
783 #address-cells = <1>;
784 #size-cells = <1>;
785 reg = <0x40000000 0x10000000
786 0xffffe000 0x600 /* PMECC Registers */
787 0xffffe600 0x200 /* PMECC Error Location Registers */
788 0x00108000 0x18000 /* PMECC looup table in ROM code */
789 >;
790 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
791 atmel,nand-addr-offset = <21>;
792 atmel,nand-cmd-offset = <22>;
793 pinctrl-names = "default";
794 pinctrl-0 = <&pinctrl_nand>;
795 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
796 &pioD 4 GPIO_ACTIVE_HIGH
797 0
798 >;
799 status = "disabled";
800 };
801
802 usb0: ohci@00600000 {
803 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
804 reg = <0x00600000 0x100000>;
805 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
806 status = "disabled";
807 };
808
809 usb1: ehci@00700000 {
810 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
811 reg = <0x00700000 0x100000>;
812 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
813 status = "disabled";
814 };
815 };
816
817 i2c@0 {
818 compatible = "i2c-gpio";
819 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
820 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
--- 41 unchanged lines hidden ---
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12#include "skeleton.dtsi"
13#include <dt-bindings/dma/at91.h>
14#include <dt-bindings/pinctrl/at91.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16#include <dt-bindings/gpio/gpio.h>
17
18/ {
19 model = "Atmel AT91SAM9x5 family SoC";
20 compatible = "atmel,at91sam9x5";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
--- 21 unchanged lines hidden (view full) ---
46 device_type = "cpu";
47 };
48 };
49
50 memory {
51 reg = <0x20000000 0x10000000>;
52 };
53
54 ahb {
55 compatible = "simple-bus";
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 apb {
61 compatible = "simple-bus";
--- 10 unchanged lines hidden (view full) ---
72 };
73
74 ramc0: ramc@ffffe800 {
75 compatible = "atmel,at91sam9g45-ddramc";
76 reg = <0xffffe800 0x200>;
77 };
78
79 pmc: pmc@fffffc00 {
80 compatible = "atmel,at91rm9200-pmc";
81 reg = <0xfffffc00 0x100>;
82 };
83
84 rstc@fffffe00 {
85 compatible = "atmel,at91sam9g45-rstc";
86 reg = <0xfffffe00 0x10>;
87 };
88
89 shdwc@fffffe10 {
90 compatible = "atmel,at91sam9x5-shdwc";
91 reg = <0xfffffe10 0x10>;
92 };
93
94 pit: timer@fffffe30 {
95 compatible = "atmel,at91sam9260-pit";
96 reg = <0xfffffe30 0xf>;
97 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
98 };
99
100 tcb0: timer@f8008000 {
101 compatible = "atmel,at91sam9x5-tcb";
102 reg = <0xf8008000 0x100>;
103 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
104 };
105
106 tcb1: timer@f800c000 {
107 compatible = "atmel,at91sam9x5-tcb";
108 reg = <0xf800c000 0x100>;
109 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
110 };
111
112 dma0: dma-controller@ffffec00 {
113 compatible = "atmel,at91sam9g45-dma";
114 reg = <0xffffec00 0x200>;
115 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
116 #dma-cells = <2>;
117 };
118
119 dma1: dma-controller@ffffee00 {
120 compatible = "atmel,at91sam9g45-dma";
121 reg = <0xffffee00 0x200>;
122 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
123 #dma-cells = <2>;
124 };
125
126 pinctrl@fffff400 {
127 #address-cells = <1>;
128 #size-cells = <1>;
129 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
130 ranges = <0xfffff400 0xfffff400 0x800>;
131
--- 316 unchanged lines hidden (view full) ---
448 pioA: gpio@fffff400 {
449 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
450 reg = <0xfffff400 0x200>;
451 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
452 #gpio-cells = <2>;
453 gpio-controller;
454 interrupt-controller;
455 #interrupt-cells = <2>;
456 };
457
458 pioB: gpio@fffff600 {
459 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
460 reg = <0xfffff600 0x200>;
461 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
462 #gpio-cells = <2>;
463 gpio-controller;
464 #gpio-lines = <19>;
465 interrupt-controller;
466 #interrupt-cells = <2>;
467 };
468
469 pioC: gpio@fffff800 {
470 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
471 reg = <0xfffff800 0x200>;
472 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
473 #gpio-cells = <2>;
474 gpio-controller;
475 interrupt-controller;
476 #interrupt-cells = <2>;
477 };
478
479 pioD: gpio@fffffa00 {
480 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
481 reg = <0xfffffa00 0x200>;
482 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
483 #gpio-cells = <2>;
484 gpio-controller;
485 #gpio-lines = <22>;
486 interrupt-controller;
487 #interrupt-cells = <2>;
488 };
489 };
490
491 ssc0: ssc@f0010000 {
492 compatible = "atmel,at91sam9g45-ssc";
493 reg = <0xf0010000 0x4000>;
494 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
495 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
496 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
497 dma-names = "tx", "rx";
498 pinctrl-names = "default";
499 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
500 status = "disabled";
501 };
502
503 mmc0: mmc@f0008000 {
504 compatible = "atmel,hsmci";
505 reg = <0xf0008000 0x600>;
506 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
507 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
508 dma-names = "rxtx";
509 pinctrl-names = "default";
510 #address-cells = <1>;
511 #size-cells = <0>;
512 status = "disabled";
513 };
514
515 mmc1: mmc@f000c000 {
516 compatible = "atmel,hsmci";
517 reg = <0xf000c000 0x600>;
518 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
519 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
520 dma-names = "rxtx";
521 pinctrl-names = "default";
522 #address-cells = <1>;
523 #size-cells = <0>;
524 status = "disabled";
525 };
526
527 dbgu: serial@fffff200 {
528 compatible = "atmel,at91sam9260-usart";
529 reg = <0xfffff200 0x200>;
530 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
531 pinctrl-names = "default";
532 pinctrl-0 = <&pinctrl_dbgu>;
533 status = "disabled";
534 };
535
536 usart0: serial@f801c000 {
537 compatible = "atmel,at91sam9260-usart";
538 reg = <0xf801c000 0x200>;
539 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
540 pinctrl-names = "default";
541 pinctrl-0 = <&pinctrl_usart0>;
542 status = "disabled";
543 };
544
545 usart1: serial@f8020000 {
546 compatible = "atmel,at91sam9260-usart";
547 reg = <0xf8020000 0x200>;
548 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
549 pinctrl-names = "default";
550 pinctrl-0 = <&pinctrl_usart1>;
551 status = "disabled";
552 };
553
554 usart2: serial@f8024000 {
555 compatible = "atmel,at91sam9260-usart";
556 reg = <0xf8024000 0x200>;
557 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_usart2>;
560 status = "disabled";
561 };
562
563 i2c0: i2c@f8010000 {
564 compatible = "atmel,at91sam9x5-i2c";
565 reg = <0xf8010000 0x100>;
566 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
567 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
568 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
569 dma-names = "tx", "rx";
570 #address-cells = <1>;
571 #size-cells = <0>;
572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_i2c0>;
574 status = "disabled";
575 };
576
577 i2c1: i2c@f8014000 {
578 compatible = "atmel,at91sam9x5-i2c";
579 reg = <0xf8014000 0x100>;
580 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
581 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
582 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
583 dma-names = "tx", "rx";
584 #address-cells = <1>;
585 #size-cells = <0>;
586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_i2c1>;
588 status = "disabled";
589 };
590
591 i2c2: i2c@f8018000 {
592 compatible = "atmel,at91sam9x5-i2c";
593 reg = <0xf8018000 0x100>;
594 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
595 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
596 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
597 dma-names = "tx", "rx";
598 #address-cells = <1>;
599 #size-cells = <0>;
600 pinctrl-names = "default";
601 pinctrl-0 = <&pinctrl_i2c2>;
602 status = "disabled";
603 };
604
605 uart0: serial@f8040000 {
606 compatible = "atmel,at91sam9260-usart";
607 reg = <0xf8040000 0x200>;
608 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
609 pinctrl-names = "default";
610 pinctrl-0 = <&pinctrl_uart0>;
611 status = "disabled";
612 };
613
614 uart1: serial@f8044000 {
615 compatible = "atmel,at91sam9260-usart";
616 reg = <0xf8044000 0x200>;
617 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
618 pinctrl-names = "default";
619 pinctrl-0 = <&pinctrl_uart1>;
620 status = "disabled";
621 };
622
623 adc0: adc@f804c000 {
624 compatible = "atmel,at91sam9260-adc";
625 reg = <0xf804c000 0x100>;
626 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
627 atmel,adc-use-external;
628 atmel,adc-channels-used = <0xffff>;
629 atmel,adc-vref = <3300>;
630 atmel,adc-num-channels = <12>;
631 atmel,adc-startup-time = <40>;
632 atmel,adc-channel-base = <0x50>;
633 atmel,adc-drdy-mask = <0x1000000>;
634 atmel,adc-status-register = <0x30>;
635 atmel,adc-trigger-register = <0xc0>;
636 atmel,adc-res = <8 10>;
637 atmel,adc-res-names = "lowres", "highres";
638 atmel,adc-use-res = "highres";
639
640 trigger@0 {
641 trigger-name = "external-rising";
642 trigger-value = <0x1>;
643 trigger-external;
644 };
645
646 trigger@1 {
647 trigger-name = "external-falling";
648 trigger-value = <0x2>;
649 trigger-external;
650 };
651
652 trigger@2 {
653 trigger-name = "external-any";
654 trigger-value = <0x3>;
655 trigger-external;
656 };
657
658 trigger@3 {
659 trigger-name = "continuous";
660 trigger-value = <0x6>;
661 };
662 };
663
664 spi0: spi@f0000000 {
665 #address-cells = <1>;
666 #size-cells = <0>;
667 compatible = "atmel,at91rm9200-spi";
668 reg = <0xf0000000 0x100>;
669 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
670 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
671 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
672 dma-names = "tx", "rx";
673 pinctrl-names = "default";
674 pinctrl-0 = <&pinctrl_spi0>;
675 status = "disabled";
676 };
677
678 spi1: spi@f0004000 {
679 #address-cells = <1>;
680 #size-cells = <0>;
681 compatible = "atmel,at91rm9200-spi";
682 reg = <0xf0004000 0x100>;
683 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
684 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
685 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
686 dma-names = "tx", "rx";
687 pinctrl-names = "default";
688 pinctrl-0 = <&pinctrl_spi1>;
689 status = "disabled";
690 };
691
692 usb2: gadget@f803c000 {
693 #address-cells = <1>;
694 #size-cells = <0>;
695 compatible = "atmel,at91sam9rl-udc";
696 reg = <0x00500000 0x80000
697 0xf803c000 0x400>;
698 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
699 status = "disabled";
700
701 ep0 {
702 reg = <0>;
703 atmel,fifo-size = <64>;
704 atmel,nb-banks = <1>;
705 };
706
--- 61 unchanged lines hidden (view full) ---
768 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
769 status = "disabled";
770 };
771
772 pwm0: pwm@f8034000 {
773 compatible = "atmel,at91sam9rl-pwm";
774 reg = <0xf8034000 0x300>;
775 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
776 #pwm-cells = <3>;
777 status = "disabled";
778 };
779 };
780
781 nand0: nand@40000000 {
782 compatible = "atmel,at91rm9200-nand";
783 #address-cells = <1>;
784 #size-cells = <1>;
785 reg = <0x40000000 0x10000000
786 0xffffe000 0x600 /* PMECC Registers */
787 0xffffe600 0x200 /* PMECC Error Location Registers */
788 0x00108000 0x18000 /* PMECC looup table in ROM code */
789 >;
790 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
791 atmel,nand-addr-offset = <21>;
792 atmel,nand-cmd-offset = <22>;
793 pinctrl-names = "default";
794 pinctrl-0 = <&pinctrl_nand>;
795 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
796 &pioD 4 GPIO_ACTIVE_HIGH
797 0
798 >;
799 status = "disabled";
800 };
801
802 usb0: ohci@00600000 {
803 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
804 reg = <0x00600000 0x100000>;
805 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
806 status = "disabled";
807 };
808
809 usb1: ehci@00700000 {
810 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
811 reg = <0x00700000 0x100000>;
812 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
813 status = "disabled";
814 };
815 };
816
817 i2c@0 {
818 compatible = "i2c-gpio";
819 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
820 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
--- 41 unchanged lines hidden ---