1/*
2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Hong Xu <hong.xu@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10#include "skeleton.dtsi"
11#include <dt-bindings/dma/at91.h>
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
15
16/ {
17 model = "Atmel AT91SAM9N12 SoC";
18 compatible = "atmel,at91sam9n12";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
--- 21 unchanged lines hidden (view full) ---
44 device_type = "cpu";
45 };
46 };
47
48 memory {
49 reg = <0x20000000 0x10000000>;
50 };
51
52 ahb {
53 compatible = "simple-bus";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges;
57
58 apb {
59 compatible = "simple-bus";
--- 10 unchanged lines hidden (view full) ---
70 };
71
72 ramc0: ramc@ffffe800 {
73 compatible = "atmel,at91sam9g45-ddramc";
74 reg = <0xffffe800 0x200>;
75 };
76
77 pmc: pmc@fffffc00 {
78 compatible = "atmel,at91rm9200-pmc";
79 reg = <0xfffffc00 0x100>;
80 };
81
82 rstc@fffffe00 {
83 compatible = "atmel,at91sam9g45-rstc";
84 reg = <0xfffffe00 0x10>;
85 };
86
87 pit: timer@fffffe30 {
88 compatible = "atmel,at91sam9260-pit";
89 reg = <0xfffffe30 0xf>;
90 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
91 };
92
93 shdwc@fffffe10 {
94 compatible = "atmel,at91sam9x5-shdwc";
95 reg = <0xfffffe10 0x10>;
96 };
97
98 mmc0: mmc@f0008000 {
99 compatible = "atmel,hsmci";
100 reg = <0xf0008000 0x600>;
101 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
102 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
103 dma-names = "rxtx";
104 #address-cells = <1>;
105 #size-cells = <0>;
106 status = "disabled";
107 };
108
109 tcb0: timer@f8008000 {
110 compatible = "atmel,at91sam9x5-tcb";
111 reg = <0xf8008000 0x100>;
112 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
113 };
114
115 tcb1: timer@f800c000 {
116 compatible = "atmel,at91sam9x5-tcb";
117 reg = <0xf800c000 0x100>;
118 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
119 };
120
121 dma: dma-controller@ffffec00 {
122 compatible = "atmel,at91sam9g45-dma";
123 reg = <0xffffec00 0x200>;
124 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
125 #dma-cells = <2>;
126 };
127
128 pinctrl@fffff400 {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
132 ranges = <0xfffff400 0xfffff400 0x800>;
133
--- 253 unchanged lines hidden (view full) ---
387 pioA: gpio@fffff400 {
388 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
389 reg = <0xfffff400 0x200>;
390 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
391 #gpio-cells = <2>;
392 gpio-controller;
393 interrupt-controller;
394 #interrupt-cells = <2>;
395 };
396
397 pioB: gpio@fffff600 {
398 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
399 reg = <0xfffff600 0x200>;
400 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
401 #gpio-cells = <2>;
402 gpio-controller;
403 interrupt-controller;
404 #interrupt-cells = <2>;
405 };
406
407 pioC: gpio@fffff800 {
408 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
409 reg = <0xfffff800 0x200>;
410 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
411 #gpio-cells = <2>;
412 gpio-controller;
413 interrupt-controller;
414 #interrupt-cells = <2>;
415 };
416
417 pioD: gpio@fffffa00 {
418 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
419 reg = <0xfffffa00 0x200>;
420 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
421 #gpio-cells = <2>;
422 gpio-controller;
423 interrupt-controller;
424 #interrupt-cells = <2>;
425 };
426 };
427
428 dbgu: serial@fffff200 {
429 compatible = "atmel,at91sam9260-usart";
430 reg = <0xfffff200 0x200>;
431 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
432 pinctrl-names = "default";
433 pinctrl-0 = <&pinctrl_dbgu>;
434 status = "disabled";
435 };
436
437 ssc0: ssc@f0010000 {
438 compatible = "atmel,at91sam9g45-ssc";
439 reg = <0xf0010000 0x4000>;
440 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
441 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
442 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
443 dma-names = "tx", "rx";
444 pinctrl-names = "default";
445 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
446 status = "disabled";
447 };
448
449 usart0: serial@f801c000 {
450 compatible = "atmel,at91sam9260-usart";
451 reg = <0xf801c000 0x4000>;
452 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_usart0>;
455 status = "disabled";
456 };
457
458 usart1: serial@f8020000 {
459 compatible = "atmel,at91sam9260-usart";
460 reg = <0xf8020000 0x4000>;
461 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
462 pinctrl-names = "default";
463 pinctrl-0 = <&pinctrl_usart1>;
464 status = "disabled";
465 };
466
467 usart2: serial@f8024000 {
468 compatible = "atmel,at91sam9260-usart";
469 reg = <0xf8024000 0x4000>;
470 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
471 pinctrl-names = "default";
472 pinctrl-0 = <&pinctrl_usart2>;
473 status = "disabled";
474 };
475
476 usart3: serial@f8028000 {
477 compatible = "atmel,at91sam9260-usart";
478 reg = <0xf8028000 0x4000>;
479 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
480 pinctrl-names = "default";
481 pinctrl-0 = <&pinctrl_usart3>;
482 status = "disabled";
483 };
484
485 i2c0: i2c@f8010000 {
486 compatible = "atmel,at91sam9x5-i2c";
487 reg = <0xf8010000 0x100>;
488 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
489 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
490 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
491 dma-names = "tx", "rx";
492 #address-cells = <1>;
493 #size-cells = <0>;
494 pinctrl-names = "default";
495 pinctrl-0 = <&pinctrl_i2c0>;
496 status = "disabled";
497 };
498
499 i2c1: i2c@f8014000 {
500 compatible = "atmel,at91sam9x5-i2c";
501 reg = <0xf8014000 0x100>;
502 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
503 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
504 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
505 dma-names = "tx", "rx";
506 #address-cells = <1>;
507 #size-cells = <0>;
508 pinctrl-names = "default";
509 pinctrl-0 = <&pinctrl_i2c1>;
510 status = "disabled";
511 };
512
513 spi0: spi@f0000000 {
514 #address-cells = <1>;
515 #size-cells = <0>;
516 compatible = "atmel,at91rm9200-spi";
517 reg = <0xf0000000 0x100>;
518 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
519 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
520 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
521 dma-names = "tx", "rx";
522 pinctrl-names = "default";
523 pinctrl-0 = <&pinctrl_spi0>;
524 status = "disabled";
525 };
526
527 spi1: spi@f0004000 {
528 #address-cells = <1>;
529 #size-cells = <0>;
530 compatible = "atmel,at91rm9200-spi";
531 reg = <0xf0004000 0x100>;
532 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
533 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
534 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
535 dma-names = "tx", "rx";
536 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_spi1>;
538 status = "disabled";
539 };
540
541 watchdog@fffffe40 {
542 compatible = "atmel,at91sam9260-wdt";
543 reg = <0xfffffe40 0x10>;
544 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
545 atmel,watchdog-type = "hardware";
546 atmel,reset-type = "all";
547 atmel,dbg-halt;
548 atmel,idle-halt;
549 status = "disabled";
550 };
551
552 pwm0: pwm@f8034000 {
553 compatible = "atmel,at91sam9rl-pwm";
554 reg = <0xf8034000 0x300>;
555 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
556 #pwm-cells = <3>;
557 status = "disabled";
558 };
559 };
560
561 nand0: nand@40000000 {
562 compatible = "atmel,at91rm9200-nand";
563 #address-cells = <1>;
564 #size-cells = <1>;
565 reg = < 0x40000000 0x10000000
566 0xffffe000 0x00000600
567 0xffffe600 0x00000200
568 0x00108000 0x00018000
569 >;
570 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
571 atmel,nand-addr-offset = <21>;
572 atmel,nand-cmd-offset = <22>;
573 pinctrl-names = "default";
574 pinctrl-0 = <&pinctrl_nand>;
575 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
576 &pioD 4 GPIO_ACTIVE_HIGH
577 0
578 >;
579 status = "disabled";
580 };
581
582 usb0: ohci@00500000 {
583 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
584 reg = <0x00500000 0x00100000>;
585 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
586 status = "disabled";
587 };
588 };
589
590 i2c@0 {
591 compatible = "i2c-gpio";
592 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
593 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
594 >;
595 i2c-gpio,sda-open-drain;
596 i2c-gpio,scl-open-drain;
597 i2c-gpio,delay-us = <2>; /* ~100 kHz */
598 #address-cells = <1>;
599 #size-cells = <0>;
600 status = "disabled";
601 };
602};
2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Hong Xu <hong.xu@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10#include "skeleton.dtsi"
11#include <dt-bindings/dma/at91.h>
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
15
16/ {
17 model = "Atmel AT91SAM9N12 SoC";
18 compatible = "atmel,at91sam9n12";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
--- 21 unchanged lines hidden (view full) ---
44 device_type = "cpu";
45 };
46 };
47
48 memory {
49 reg = <0x20000000 0x10000000>;
50 };
51
52 ahb {
53 compatible = "simple-bus";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges;
57
58 apb {
59 compatible = "simple-bus";
--- 10 unchanged lines hidden (view full) ---
70 };
71
72 ramc0: ramc@ffffe800 {
73 compatible = "atmel,at91sam9g45-ddramc";
74 reg = <0xffffe800 0x200>;
75 };
76
77 pmc: pmc@fffffc00 {
78 compatible = "atmel,at91rm9200-pmc";
79 reg = <0xfffffc00 0x100>;
80 };
81
82 rstc@fffffe00 {
83 compatible = "atmel,at91sam9g45-rstc";
84 reg = <0xfffffe00 0x10>;
85 };
86
87 pit: timer@fffffe30 {
88 compatible = "atmel,at91sam9260-pit";
89 reg = <0xfffffe30 0xf>;
90 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
91 };
92
93 shdwc@fffffe10 {
94 compatible = "atmel,at91sam9x5-shdwc";
95 reg = <0xfffffe10 0x10>;
96 };
97
98 mmc0: mmc@f0008000 {
99 compatible = "atmel,hsmci";
100 reg = <0xf0008000 0x600>;
101 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
102 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
103 dma-names = "rxtx";
104 #address-cells = <1>;
105 #size-cells = <0>;
106 status = "disabled";
107 };
108
109 tcb0: timer@f8008000 {
110 compatible = "atmel,at91sam9x5-tcb";
111 reg = <0xf8008000 0x100>;
112 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
113 };
114
115 tcb1: timer@f800c000 {
116 compatible = "atmel,at91sam9x5-tcb";
117 reg = <0xf800c000 0x100>;
118 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
119 };
120
121 dma: dma-controller@ffffec00 {
122 compatible = "atmel,at91sam9g45-dma";
123 reg = <0xffffec00 0x200>;
124 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
125 #dma-cells = <2>;
126 };
127
128 pinctrl@fffff400 {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
132 ranges = <0xfffff400 0xfffff400 0x800>;
133
--- 253 unchanged lines hidden (view full) ---
387 pioA: gpio@fffff400 {
388 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
389 reg = <0xfffff400 0x200>;
390 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
391 #gpio-cells = <2>;
392 gpio-controller;
393 interrupt-controller;
394 #interrupt-cells = <2>;
395 };
396
397 pioB: gpio@fffff600 {
398 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
399 reg = <0xfffff600 0x200>;
400 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
401 #gpio-cells = <2>;
402 gpio-controller;
403 interrupt-controller;
404 #interrupt-cells = <2>;
405 };
406
407 pioC: gpio@fffff800 {
408 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
409 reg = <0xfffff800 0x200>;
410 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
411 #gpio-cells = <2>;
412 gpio-controller;
413 interrupt-controller;
414 #interrupt-cells = <2>;
415 };
416
417 pioD: gpio@fffffa00 {
418 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
419 reg = <0xfffffa00 0x200>;
420 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
421 #gpio-cells = <2>;
422 gpio-controller;
423 interrupt-controller;
424 #interrupt-cells = <2>;
425 };
426 };
427
428 dbgu: serial@fffff200 {
429 compatible = "atmel,at91sam9260-usart";
430 reg = <0xfffff200 0x200>;
431 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
432 pinctrl-names = "default";
433 pinctrl-0 = <&pinctrl_dbgu>;
434 status = "disabled";
435 };
436
437 ssc0: ssc@f0010000 {
438 compatible = "atmel,at91sam9g45-ssc";
439 reg = <0xf0010000 0x4000>;
440 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
441 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
442 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
443 dma-names = "tx", "rx";
444 pinctrl-names = "default";
445 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
446 status = "disabled";
447 };
448
449 usart0: serial@f801c000 {
450 compatible = "atmel,at91sam9260-usart";
451 reg = <0xf801c000 0x4000>;
452 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_usart0>;
455 status = "disabled";
456 };
457
458 usart1: serial@f8020000 {
459 compatible = "atmel,at91sam9260-usart";
460 reg = <0xf8020000 0x4000>;
461 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
462 pinctrl-names = "default";
463 pinctrl-0 = <&pinctrl_usart1>;
464 status = "disabled";
465 };
466
467 usart2: serial@f8024000 {
468 compatible = "atmel,at91sam9260-usart";
469 reg = <0xf8024000 0x4000>;
470 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
471 pinctrl-names = "default";
472 pinctrl-0 = <&pinctrl_usart2>;
473 status = "disabled";
474 };
475
476 usart3: serial@f8028000 {
477 compatible = "atmel,at91sam9260-usart";
478 reg = <0xf8028000 0x4000>;
479 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
480 pinctrl-names = "default";
481 pinctrl-0 = <&pinctrl_usart3>;
482 status = "disabled";
483 };
484
485 i2c0: i2c@f8010000 {
486 compatible = "atmel,at91sam9x5-i2c";
487 reg = <0xf8010000 0x100>;
488 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
489 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
490 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
491 dma-names = "tx", "rx";
492 #address-cells = <1>;
493 #size-cells = <0>;
494 pinctrl-names = "default";
495 pinctrl-0 = <&pinctrl_i2c0>;
496 status = "disabled";
497 };
498
499 i2c1: i2c@f8014000 {
500 compatible = "atmel,at91sam9x5-i2c";
501 reg = <0xf8014000 0x100>;
502 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
503 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
504 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
505 dma-names = "tx", "rx";
506 #address-cells = <1>;
507 #size-cells = <0>;
508 pinctrl-names = "default";
509 pinctrl-0 = <&pinctrl_i2c1>;
510 status = "disabled";
511 };
512
513 spi0: spi@f0000000 {
514 #address-cells = <1>;
515 #size-cells = <0>;
516 compatible = "atmel,at91rm9200-spi";
517 reg = <0xf0000000 0x100>;
518 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
519 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
520 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
521 dma-names = "tx", "rx";
522 pinctrl-names = "default";
523 pinctrl-0 = <&pinctrl_spi0>;
524 status = "disabled";
525 };
526
527 spi1: spi@f0004000 {
528 #address-cells = <1>;
529 #size-cells = <0>;
530 compatible = "atmel,at91rm9200-spi";
531 reg = <0xf0004000 0x100>;
532 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
533 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
534 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
535 dma-names = "tx", "rx";
536 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_spi1>;
538 status = "disabled";
539 };
540
541 watchdog@fffffe40 {
542 compatible = "atmel,at91sam9260-wdt";
543 reg = <0xfffffe40 0x10>;
544 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
545 atmel,watchdog-type = "hardware";
546 atmel,reset-type = "all";
547 atmel,dbg-halt;
548 atmel,idle-halt;
549 status = "disabled";
550 };
551
552 pwm0: pwm@f8034000 {
553 compatible = "atmel,at91sam9rl-pwm";
554 reg = <0xf8034000 0x300>;
555 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
556 #pwm-cells = <3>;
557 status = "disabled";
558 };
559 };
560
561 nand0: nand@40000000 {
562 compatible = "atmel,at91rm9200-nand";
563 #address-cells = <1>;
564 #size-cells = <1>;
565 reg = < 0x40000000 0x10000000
566 0xffffe000 0x00000600
567 0xffffe600 0x00000200
568 0x00108000 0x00018000
569 >;
570 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
571 atmel,nand-addr-offset = <21>;
572 atmel,nand-cmd-offset = <22>;
573 pinctrl-names = "default";
574 pinctrl-0 = <&pinctrl_nand>;
575 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
576 &pioD 4 GPIO_ACTIVE_HIGH
577 0
578 >;
579 status = "disabled";
580 };
581
582 usb0: ohci@00500000 {
583 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
584 reg = <0x00500000 0x00100000>;
585 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
586 status = "disabled";
587 };
588 };
589
590 i2c@0 {
591 compatible = "i2c-gpio";
592 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
593 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
594 >;
595 i2c-gpio,sda-open-drain;
596 i2c-gpio,scl-open-drain;
597 i2c-gpio,delay-us = <2>; /* ~100 kHz */
598 #address-cells = <1>;
599 #size-cells = <0>;
600 status = "disabled";
601 };
602};