1/*
2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Hong Xu <hong.xu@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10#include "skeleton.dtsi"
11#include <dt-bindings/dma/at91.h>
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/clock/at91.h>
16
17/ {
18 model = "Atmel AT91SAM9N12 SoC";
19 compatible = "atmel,at91sam9n12";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
--- 21 unchanged lines hidden (view full) ---
45 device_type = "cpu";
46 };
47 };
48
49 memory {
50 reg = <0x20000000 0x10000000>;
51 };
52
53 clocks {
54 slow_xtal: slow_xtal {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <0>;
58 };
59
60 main_xtal: main_xtal {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <0>;
64 };
65 };
66
67 ahb {
68 compatible = "simple-bus";
69 #address-cells = <1>;
70 #size-cells = <1>;
71 ranges;
72
73 apb {
74 compatible = "simple-bus";
--- 10 unchanged lines hidden (view full) ---
85 };
86
87 ramc0: ramc@ffffe800 {
88 compatible = "atmel,at91sam9g45-ddramc";
89 reg = <0xffffe800 0x200>;
90 };
91
92 pmc: pmc@fffffc00 {
93 compatible = "atmel,at91sam9n12-pmc";
94 reg = <0xfffffc00 0x200>;
95 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
96 interrupt-controller;
97 #address-cells = <1>;
98 #size-cells = <0>;
99 #interrupt-cells = <1>;
100
101 main_rc_osc: main_rc_osc {
102 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
103 #clock-cells = <0>;
104 interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
105 clock-frequency = <12000000>;
106 clock-accuracy = <50000000>;
107 };
108
109 main_osc: main_osc {
110 compatible = "atmel,at91rm9200-clk-main-osc";
111 #clock-cells = <0>;
112 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
113 clocks = <&main_xtal>;
114 };
115
116 main: mainck {
117 compatible = "atmel,at91sam9x5-clk-main";
118 #clock-cells = <0>;
119 interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
120 clocks = <&main_rc_osc>, <&main_osc>;
121 };
122
123 plla: pllack {
124 compatible = "atmel,at91rm9200-clk-pll";
125 #clock-cells = <0>;
126 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
127 clocks = <&main>;
128 reg = <0>;
129 atmel,clk-input-range = <2000000 32000000>;
130 #atmel,pll-clk-output-range-cells = <4>;
131 atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
132 <695000000 750000000 1 0>,
133 <645000000 700000000 2 0>,
134 <595000000 650000000 3 0>,
135 <545000000 600000000 0 1>,
136 <495000000 555000000 1 1>,
137 <445000000 500000000 2 1>,
138 <400000000 450000000 3 1>;
139 };
140
141 plladiv: plladivck {
142 compatible = "atmel,at91sam9x5-clk-plldiv";
143 #clock-cells = <0>;
144 clocks = <&plla>;
145 };
146
147 pllb: pllbck {
148 compatible = "atmel,at91rm9200-clk-pll";
149 #clock-cells = <0>;
150 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
151 clocks = <&main>;
152 reg = <1>;
153 atmel,clk-input-range = <2000000 32000000>;
154 #atmel,pll-clk-output-range-cells = <3>;
155 atmel,pll-clk-output-ranges = <30000000 100000000 0>;
156 };
157
158 mck: masterck {
159 compatible = "atmel,at91sam9x5-clk-master";
160 #clock-cells = <0>;
161 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
162 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
163 atmel,clk-output-range = <0 133333333>;
164 atmel,clk-divisors = <1 2 4 3>;
165 atmel,master-clk-have-div3-pres;
166 };
167
168 usb: usbck {
169 compatible = "atmel,at91sam9n12-clk-usb";
170 #clock-cells = <0>;
171 clocks = <&pllb>;
172 };
173
174 prog: progck {
175 compatible = "atmel,at91sam9x5-clk-programmable";
176 #address-cells = <1>;
177 #size-cells = <0>;
178 interrupt-parent = <&pmc>;
179 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
180
181 prog0: prog0 {
182 #clock-cells = <0>;
183 reg = <0>;
184 interrupts = <AT91_PMC_PCKRDY(0)>;
185 };
186
187 prog1: prog1 {
188 #clock-cells = <0>;
189 reg = <1>;
190 interrupts = <AT91_PMC_PCKRDY(1)>;
191 };
192 };
193
194 systemck {
195 compatible = "atmel,at91rm9200-clk-system";
196 #address-cells = <1>;
197 #size-cells = <0>;
198
199 ddrck: ddrck {
200 #clock-cells = <0>;
201 reg = <2>;
202 clocks = <&mck>;
203 };
204
205 lcdck: lcdck {
206 #clock-cells = <0>;
207 reg = <3>;
208 clocks = <&mck>;
209 };
210
211 uhpck: uhpck {
212 #clock-cells = <0>;
213 reg = <6>;
214 clocks = <&usb>;
215 };
216
217 udpck: udpck {
218 #clock-cells = <0>;
219 reg = <7>;
220 clocks = <&usb>;
221 };
222
223 pck0: pck0 {
224 #clock-cells = <0>;
225 reg = <8>;
226 clocks = <&prog0>;
227 };
228
229 pck1: pck1 {
230 #clock-cells = <0>;
231 reg = <9>;
232 clocks = <&prog1>;
233 };
234 };
235
236 periphck {
237 compatible = "atmel,at91sam9x5-clk-peripheral";
238 #address-cells = <1>;
239 #size-cells = <0>;
240 clocks = <&mck>;
241
242 pioAB_clk: pioAB_clk {
243 #clock-cells = <0>;
244 reg = <2>;
245 };
246
247 pioCD_clk: pioCD_clk {
248 #clock-cells = <0>;
249 reg = <3>;
250 };
251
252 fuse_clk: fuse_clk {
253 #clock-cells = <0>;
254 reg = <4>;
255 };
256
257 usart0_clk: usart0_clk {
258 #clock-cells = <0>;
259 reg = <5>;
260 };
261
262 usart1_clk: usart1_clk {
263 #clock-cells = <0>;
264 reg = <6>;
265 };
266
267 usart2_clk: usart2_clk {
268 #clock-cells = <0>;
269 reg = <7>;
270 };
271
272 usart3_clk: usart3_clk {
273 #clock-cells = <0>;
274 reg = <8>;
275 };
276
277 twi0_clk: twi0_clk {
278 reg = <9>;
279 #clock-cells = <0>;
280 };
281
282 twi1_clk: twi1_clk {
283 #clock-cells = <0>;
284 reg = <10>;
285 };
286
287 mci0_clk: mci0_clk {
288 #clock-cells = <0>;
289 reg = <12>;
290 };
291
292 spi0_clk: spi0_clk {
293 #clock-cells = <0>;
294 reg = <13>;
295 };
296
297 spi1_clk: spi1_clk {
298 #clock-cells = <0>;
299 reg = <14>;
300 };
301
302 uart0_clk: uart0_clk {
303 #clock-cells = <0>;
304 reg = <15>;
305 };
306
307 uart1_clk: uart1_clk {
308 #clock-cells = <0>;
309 reg = <16>;
310 };
311
312 tcb_clk: tcb_clk {
313 #clock-cells = <0>;
314 reg = <17>;
315 };
316
317 pwm_clk: pwm_clk {
318 #clock-cells = <0>;
319 reg = <18>;
320 };
321
322 adc_clk: adc_clk {
323 #clock-cells = <0>;
324 reg = <19>;
325 };
326
327 dma0_clk: dma0_clk {
328 #clock-cells = <0>;
329 reg = <20>;
330 };
331
332 uhphs_clk: uhphs_clk {
333 #clock-cells = <0>;
334 reg = <22>;
335 };
336
337 udphs_clk: udphs_clk {
338 #clock-cells = <0>;
339 reg = <23>;
340 };
341
342 lcdc_clk: lcdc_clk {
343 #clock-cells = <0>;
344 reg = <25>;
345 };
346
347 sha_clk: sha_clk {
348 #clock-cells = <0>;
349 reg = <27>;
350 };
351
352 ssc0_clk: ssc0_clk {
353 #clock-cells = <0>;
354 reg = <28>;
355 };
356
357 aes_clk: aes_clk {
358 #clock-cells = <0>;
359 reg = <29>;
360 };
361
362 trng_clk: trng_clk {
363 #clock-cells = <0>;
364 reg = <30>;
365 };
366 };
367 };
368
369 rstc@fffffe00 {
370 compatible = "atmel,at91sam9g45-rstc";
371 reg = <0xfffffe00 0x10>;
372 };
373
374 pit: timer@fffffe30 {
375 compatible = "atmel,at91sam9260-pit";
376 reg = <0xfffffe30 0xf>;
377 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
378 clocks = <&mck>;
379 };
380
381 shdwc@fffffe10 {
382 compatible = "atmel,at91sam9x5-shdwc";
383 reg = <0xfffffe10 0x10>;
384 };
385
386 sckc@fffffe50 {
387 compatible = "atmel,at91sam9x5-sckc";
388 reg = <0xfffffe50 0x4>;
389
390 slow_osc: slow_osc {
391 compatible = "atmel,at91sam9x5-clk-slow-osc";
392 #clock-cells = <0>;
393 clocks = <&slow_xtal>;
394 };
395
396 slow_rc_osc: slow_rc_osc {
397 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
398 #clock-cells = <0>;
399 clock-frequency = <32768>;
400 clock-accuracy = <50000000>;
401 };
402
403 clk32k: slck {
404 compatible = "atmel,at91sam9x5-clk-slow";
405 #clock-cells = <0>;
406 clocks = <&slow_rc_osc>, <&slow_osc>;
407 };
408 };
409
410 mmc0: mmc@f0008000 {
411 compatible = "atmel,hsmci";
412 reg = <0xf0008000 0x600>;
413 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
414 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
415 dma-names = "rxtx";
416 clocks = <&mci0_clk>;
417 clock-names = "mci_clk";
418 #address-cells = <1>;
419 #size-cells = <0>;
420 status = "disabled";
421 };
422
423 tcb0: timer@f8008000 {
424 compatible = "atmel,at91sam9x5-tcb";
425 reg = <0xf8008000 0x100>;
426 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
427 clocks = <&tcb_clk>;
428 clock-names = "t0_clk";
429 };
430
431 tcb1: timer@f800c000 {
432 compatible = "atmel,at91sam9x5-tcb";
433 reg = <0xf800c000 0x100>;
434 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
435 clocks = <&tcb_clk>;
436 clock-names = "t0_clk";
437 };
438
439 dma: dma-controller@ffffec00 {
440 compatible = "atmel,at91sam9g45-dma";
441 reg = <0xffffec00 0x200>;
442 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
443 #dma-cells = <2>;
444 clocks = <&dma0_clk>;
445 clock-names = "dma_clk";
446 };
447
448 pinctrl@fffff400 {
449 #address-cells = <1>;
450 #size-cells = <1>;
451 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
452 ranges = <0xfffff400 0xfffff400 0x800>;
453
--- 253 unchanged lines hidden (view full) ---
707 pioA: gpio@fffff400 {
708 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
709 reg = <0xfffff400 0x200>;
710 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
711 #gpio-cells = <2>;
712 gpio-controller;
713 interrupt-controller;
714 #interrupt-cells = <2>;
715 clocks = <&pioAB_clk>;
716 };
717
718 pioB: gpio@fffff600 {
719 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
720 reg = <0xfffff600 0x200>;
721 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
722 #gpio-cells = <2>;
723 gpio-controller;
724 interrupt-controller;
725 #interrupt-cells = <2>;
726 clocks = <&pioAB_clk>;
727 };
728
729 pioC: gpio@fffff800 {
730 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
731 reg = <0xfffff800 0x200>;
732 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
733 #gpio-cells = <2>;
734 gpio-controller;
735 interrupt-controller;
736 #interrupt-cells = <2>;
737 clocks = <&pioCD_clk>;
738 };
739
740 pioD: gpio@fffffa00 {
741 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
742 reg = <0xfffffa00 0x200>;
743 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
744 #gpio-cells = <2>;
745 gpio-controller;
746 interrupt-controller;
747 #interrupt-cells = <2>;
748 clocks = <&pioCD_clk>;
749 };
750 };
751
752 dbgu: serial@fffff200 {
753 compatible = "atmel,at91sam9260-usart";
754 reg = <0xfffff200 0x200>;
755 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
756 pinctrl-names = "default";
757 pinctrl-0 = <&pinctrl_dbgu>;
758 clocks = <&mck>;
759 clock-names = "usart";
760 status = "disabled";
761 };
762
763 ssc0: ssc@f0010000 {
764 compatible = "atmel,at91sam9g45-ssc";
765 reg = <0xf0010000 0x4000>;
766 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
767 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
768 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
769 dma-names = "tx", "rx";
770 pinctrl-names = "default";
771 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
772 clocks = <&ssc0_clk>;
773 clock-names = "pclk";
774 status = "disabled";
775 };
776
777 usart0: serial@f801c000 {
778 compatible = "atmel,at91sam9260-usart";
779 reg = <0xf801c000 0x4000>;
780 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
781 pinctrl-names = "default";
782 pinctrl-0 = <&pinctrl_usart0>;
783 clocks = <&usart0_clk>;
784 clock-names = "usart";
785 status = "disabled";
786 };
787
788 usart1: serial@f8020000 {
789 compatible = "atmel,at91sam9260-usart";
790 reg = <0xf8020000 0x4000>;
791 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_usart1>;
794 clocks = <&usart1_clk>;
795 clock-names = "usart";
796 status = "disabled";
797 };
798
799 usart2: serial@f8024000 {
800 compatible = "atmel,at91sam9260-usart";
801 reg = <0xf8024000 0x4000>;
802 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
803 pinctrl-names = "default";
804 pinctrl-0 = <&pinctrl_usart2>;
805 clocks = <&usart2_clk>;
806 clock-names = "usart";
807 status = "disabled";
808 };
809
810 usart3: serial@f8028000 {
811 compatible = "atmel,at91sam9260-usart";
812 reg = <0xf8028000 0x4000>;
813 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
814 pinctrl-names = "default";
815 pinctrl-0 = <&pinctrl_usart3>;
816 clocks = <&usart3_clk>;
817 clock-names = "usart";
818 status = "disabled";
819 };
820
821 i2c0: i2c@f8010000 {
822 compatible = "atmel,at91sam9x5-i2c";
823 reg = <0xf8010000 0x100>;
824 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
825 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
826 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
827 dma-names = "tx", "rx";
828 #address-cells = <1>;
829 #size-cells = <0>;
830 pinctrl-names = "default";
831 pinctrl-0 = <&pinctrl_i2c0>;
832 clocks = <&twi0_clk>;
833 status = "disabled";
834 };
835
836 i2c1: i2c@f8014000 {
837 compatible = "atmel,at91sam9x5-i2c";
838 reg = <0xf8014000 0x100>;
839 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
840 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
841 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
842 dma-names = "tx", "rx";
843 #address-cells = <1>;
844 #size-cells = <0>;
845 pinctrl-names = "default";
846 pinctrl-0 = <&pinctrl_i2c1>;
847 clocks = <&twi1_clk>;
848 status = "disabled";
849 };
850
851 spi0: spi@f0000000 {
852 #address-cells = <1>;
853 #size-cells = <0>;
854 compatible = "atmel,at91rm9200-spi";
855 reg = <0xf0000000 0x100>;
856 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
857 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
858 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
859 dma-names = "tx", "rx";
860 pinctrl-names = "default";
861 pinctrl-0 = <&pinctrl_spi0>;
862 clocks = <&spi0_clk>;
863 clock-names = "spi_clk";
864 status = "disabled";
865 };
866
867 spi1: spi@f0004000 {
868 #address-cells = <1>;
869 #size-cells = <0>;
870 compatible = "atmel,at91rm9200-spi";
871 reg = <0xf0004000 0x100>;
872 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
873 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
874 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
875 dma-names = "tx", "rx";
876 pinctrl-names = "default";
877 pinctrl-0 = <&pinctrl_spi1>;
878 clocks = <&spi1_clk>;
879 clock-names = "spi_clk";
880 status = "disabled";
881 };
882
883 watchdog@fffffe40 {
884 compatible = "atmel,at91sam9260-wdt";
885 reg = <0xfffffe40 0x10>;
886 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
887 atmel,watchdog-type = "hardware";
888 atmel,reset-type = "all";
889 atmel,dbg-halt;
890 atmel,idle-halt;
891 status = "disabled";
892 };
893
894 pwm0: pwm@f8034000 {
895 compatible = "atmel,at91sam9rl-pwm";
896 reg = <0xf8034000 0x300>;
897 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
898 #pwm-cells = <3>;
899 clocks = <&pwm_clk>;
900 status = "disabled";
901 };
902 };
903
904 nand0: nand@40000000 {
905 compatible = "atmel,at91rm9200-nand";
906 #address-cells = <1>;
907 #size-cells = <1>;
908 reg = < 0x40000000 0x10000000
909 0xffffe000 0x00000600
910 0xffffe600 0x00000200
911 0x00108000 0x00018000
912 >;
913 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
914 atmel,nand-addr-offset = <21>;
915 atmel,nand-cmd-offset = <22>;
916 atmel,nand-has-dma;
917 pinctrl-names = "default";
918 pinctrl-0 = <&pinctrl_nand>;
919 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
920 &pioD 4 GPIO_ACTIVE_HIGH
921 0
922 >;
923 status = "disabled";
924 };
925
926 usb0: ohci@00500000 {
927 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
928 reg = <0x00500000 0x00100000>;
929 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
930 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
931 <&uhpck>;
932 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
933 status = "disabled";
934 };
935 };
936
937 i2c@0 {
938 compatible = "i2c-gpio";
939 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
940 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
941 >;
942 i2c-gpio,sda-open-drain;
943 i2c-gpio,scl-open-drain;
944 i2c-gpio,delay-us = <2>; /* ~100 kHz */
945 #address-cells = <1>;
946 #size-cells = <0>;
947 status = "disabled";
948 };
949};
2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Hong Xu <hong.xu@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9
10#include "skeleton.dtsi"
11#include <dt-bindings/dma/at91.h>
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/clock/at91.h>
16
17/ {
18 model = "Atmel AT91SAM9N12 SoC";
19 compatible = "atmel,at91sam9n12";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
--- 21 unchanged lines hidden (view full) ---
45 device_type = "cpu";
46 };
47 };
48
49 memory {
50 reg = <0x20000000 0x10000000>;
51 };
52
53 clocks {
54 slow_xtal: slow_xtal {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <0>;
58 };
59
60 main_xtal: main_xtal {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <0>;
64 };
65 };
66
67 ahb {
68 compatible = "simple-bus";
69 #address-cells = <1>;
70 #size-cells = <1>;
71 ranges;
72
73 apb {
74 compatible = "simple-bus";
--- 10 unchanged lines hidden (view full) ---
85 };
86
87 ramc0: ramc@ffffe800 {
88 compatible = "atmel,at91sam9g45-ddramc";
89 reg = <0xffffe800 0x200>;
90 };
91
92 pmc: pmc@fffffc00 {
93 compatible = "atmel,at91sam9n12-pmc";
94 reg = <0xfffffc00 0x200>;
95 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
96 interrupt-controller;
97 #address-cells = <1>;
98 #size-cells = <0>;
99 #interrupt-cells = <1>;
100
101 main_rc_osc: main_rc_osc {
102 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
103 #clock-cells = <0>;
104 interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
105 clock-frequency = <12000000>;
106 clock-accuracy = <50000000>;
107 };
108
109 main_osc: main_osc {
110 compatible = "atmel,at91rm9200-clk-main-osc";
111 #clock-cells = <0>;
112 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
113 clocks = <&main_xtal>;
114 };
115
116 main: mainck {
117 compatible = "atmel,at91sam9x5-clk-main";
118 #clock-cells = <0>;
119 interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
120 clocks = <&main_rc_osc>, <&main_osc>;
121 };
122
123 plla: pllack {
124 compatible = "atmel,at91rm9200-clk-pll";
125 #clock-cells = <0>;
126 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
127 clocks = <&main>;
128 reg = <0>;
129 atmel,clk-input-range = <2000000 32000000>;
130 #atmel,pll-clk-output-range-cells = <4>;
131 atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
132 <695000000 750000000 1 0>,
133 <645000000 700000000 2 0>,
134 <595000000 650000000 3 0>,
135 <545000000 600000000 0 1>,
136 <495000000 555000000 1 1>,
137 <445000000 500000000 2 1>,
138 <400000000 450000000 3 1>;
139 };
140
141 plladiv: plladivck {
142 compatible = "atmel,at91sam9x5-clk-plldiv";
143 #clock-cells = <0>;
144 clocks = <&plla>;
145 };
146
147 pllb: pllbck {
148 compatible = "atmel,at91rm9200-clk-pll";
149 #clock-cells = <0>;
150 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
151 clocks = <&main>;
152 reg = <1>;
153 atmel,clk-input-range = <2000000 32000000>;
154 #atmel,pll-clk-output-range-cells = <3>;
155 atmel,pll-clk-output-ranges = <30000000 100000000 0>;
156 };
157
158 mck: masterck {
159 compatible = "atmel,at91sam9x5-clk-master";
160 #clock-cells = <0>;
161 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
162 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
163 atmel,clk-output-range = <0 133333333>;
164 atmel,clk-divisors = <1 2 4 3>;
165 atmel,master-clk-have-div3-pres;
166 };
167
168 usb: usbck {
169 compatible = "atmel,at91sam9n12-clk-usb";
170 #clock-cells = <0>;
171 clocks = <&pllb>;
172 };
173
174 prog: progck {
175 compatible = "atmel,at91sam9x5-clk-programmable";
176 #address-cells = <1>;
177 #size-cells = <0>;
178 interrupt-parent = <&pmc>;
179 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
180
181 prog0: prog0 {
182 #clock-cells = <0>;
183 reg = <0>;
184 interrupts = <AT91_PMC_PCKRDY(0)>;
185 };
186
187 prog1: prog1 {
188 #clock-cells = <0>;
189 reg = <1>;
190 interrupts = <AT91_PMC_PCKRDY(1)>;
191 };
192 };
193
194 systemck {
195 compatible = "atmel,at91rm9200-clk-system";
196 #address-cells = <1>;
197 #size-cells = <0>;
198
199 ddrck: ddrck {
200 #clock-cells = <0>;
201 reg = <2>;
202 clocks = <&mck>;
203 };
204
205 lcdck: lcdck {
206 #clock-cells = <0>;
207 reg = <3>;
208 clocks = <&mck>;
209 };
210
211 uhpck: uhpck {
212 #clock-cells = <0>;
213 reg = <6>;
214 clocks = <&usb>;
215 };
216
217 udpck: udpck {
218 #clock-cells = <0>;
219 reg = <7>;
220 clocks = <&usb>;
221 };
222
223 pck0: pck0 {
224 #clock-cells = <0>;
225 reg = <8>;
226 clocks = <&prog0>;
227 };
228
229 pck1: pck1 {
230 #clock-cells = <0>;
231 reg = <9>;
232 clocks = <&prog1>;
233 };
234 };
235
236 periphck {
237 compatible = "atmel,at91sam9x5-clk-peripheral";
238 #address-cells = <1>;
239 #size-cells = <0>;
240 clocks = <&mck>;
241
242 pioAB_clk: pioAB_clk {
243 #clock-cells = <0>;
244 reg = <2>;
245 };
246
247 pioCD_clk: pioCD_clk {
248 #clock-cells = <0>;
249 reg = <3>;
250 };
251
252 fuse_clk: fuse_clk {
253 #clock-cells = <0>;
254 reg = <4>;
255 };
256
257 usart0_clk: usart0_clk {
258 #clock-cells = <0>;
259 reg = <5>;
260 };
261
262 usart1_clk: usart1_clk {
263 #clock-cells = <0>;
264 reg = <6>;
265 };
266
267 usart2_clk: usart2_clk {
268 #clock-cells = <0>;
269 reg = <7>;
270 };
271
272 usart3_clk: usart3_clk {
273 #clock-cells = <0>;
274 reg = <8>;
275 };
276
277 twi0_clk: twi0_clk {
278 reg = <9>;
279 #clock-cells = <0>;
280 };
281
282 twi1_clk: twi1_clk {
283 #clock-cells = <0>;
284 reg = <10>;
285 };
286
287 mci0_clk: mci0_clk {
288 #clock-cells = <0>;
289 reg = <12>;
290 };
291
292 spi0_clk: spi0_clk {
293 #clock-cells = <0>;
294 reg = <13>;
295 };
296
297 spi1_clk: spi1_clk {
298 #clock-cells = <0>;
299 reg = <14>;
300 };
301
302 uart0_clk: uart0_clk {
303 #clock-cells = <0>;
304 reg = <15>;
305 };
306
307 uart1_clk: uart1_clk {
308 #clock-cells = <0>;
309 reg = <16>;
310 };
311
312 tcb_clk: tcb_clk {
313 #clock-cells = <0>;
314 reg = <17>;
315 };
316
317 pwm_clk: pwm_clk {
318 #clock-cells = <0>;
319 reg = <18>;
320 };
321
322 adc_clk: adc_clk {
323 #clock-cells = <0>;
324 reg = <19>;
325 };
326
327 dma0_clk: dma0_clk {
328 #clock-cells = <0>;
329 reg = <20>;
330 };
331
332 uhphs_clk: uhphs_clk {
333 #clock-cells = <0>;
334 reg = <22>;
335 };
336
337 udphs_clk: udphs_clk {
338 #clock-cells = <0>;
339 reg = <23>;
340 };
341
342 lcdc_clk: lcdc_clk {
343 #clock-cells = <0>;
344 reg = <25>;
345 };
346
347 sha_clk: sha_clk {
348 #clock-cells = <0>;
349 reg = <27>;
350 };
351
352 ssc0_clk: ssc0_clk {
353 #clock-cells = <0>;
354 reg = <28>;
355 };
356
357 aes_clk: aes_clk {
358 #clock-cells = <0>;
359 reg = <29>;
360 };
361
362 trng_clk: trng_clk {
363 #clock-cells = <0>;
364 reg = <30>;
365 };
366 };
367 };
368
369 rstc@fffffe00 {
370 compatible = "atmel,at91sam9g45-rstc";
371 reg = <0xfffffe00 0x10>;
372 };
373
374 pit: timer@fffffe30 {
375 compatible = "atmel,at91sam9260-pit";
376 reg = <0xfffffe30 0xf>;
377 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
378 clocks = <&mck>;
379 };
380
381 shdwc@fffffe10 {
382 compatible = "atmel,at91sam9x5-shdwc";
383 reg = <0xfffffe10 0x10>;
384 };
385
386 sckc@fffffe50 {
387 compatible = "atmel,at91sam9x5-sckc";
388 reg = <0xfffffe50 0x4>;
389
390 slow_osc: slow_osc {
391 compatible = "atmel,at91sam9x5-clk-slow-osc";
392 #clock-cells = <0>;
393 clocks = <&slow_xtal>;
394 };
395
396 slow_rc_osc: slow_rc_osc {
397 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
398 #clock-cells = <0>;
399 clock-frequency = <32768>;
400 clock-accuracy = <50000000>;
401 };
402
403 clk32k: slck {
404 compatible = "atmel,at91sam9x5-clk-slow";
405 #clock-cells = <0>;
406 clocks = <&slow_rc_osc>, <&slow_osc>;
407 };
408 };
409
410 mmc0: mmc@f0008000 {
411 compatible = "atmel,hsmci";
412 reg = <0xf0008000 0x600>;
413 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
414 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
415 dma-names = "rxtx";
416 clocks = <&mci0_clk>;
417 clock-names = "mci_clk";
418 #address-cells = <1>;
419 #size-cells = <0>;
420 status = "disabled";
421 };
422
423 tcb0: timer@f8008000 {
424 compatible = "atmel,at91sam9x5-tcb";
425 reg = <0xf8008000 0x100>;
426 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
427 clocks = <&tcb_clk>;
428 clock-names = "t0_clk";
429 };
430
431 tcb1: timer@f800c000 {
432 compatible = "atmel,at91sam9x5-tcb";
433 reg = <0xf800c000 0x100>;
434 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
435 clocks = <&tcb_clk>;
436 clock-names = "t0_clk";
437 };
438
439 dma: dma-controller@ffffec00 {
440 compatible = "atmel,at91sam9g45-dma";
441 reg = <0xffffec00 0x200>;
442 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
443 #dma-cells = <2>;
444 clocks = <&dma0_clk>;
445 clock-names = "dma_clk";
446 };
447
448 pinctrl@fffff400 {
449 #address-cells = <1>;
450 #size-cells = <1>;
451 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
452 ranges = <0xfffff400 0xfffff400 0x800>;
453
--- 253 unchanged lines hidden (view full) ---
707 pioA: gpio@fffff400 {
708 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
709 reg = <0xfffff400 0x200>;
710 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
711 #gpio-cells = <2>;
712 gpio-controller;
713 interrupt-controller;
714 #interrupt-cells = <2>;
715 clocks = <&pioAB_clk>;
716 };
717
718 pioB: gpio@fffff600 {
719 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
720 reg = <0xfffff600 0x200>;
721 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
722 #gpio-cells = <2>;
723 gpio-controller;
724 interrupt-controller;
725 #interrupt-cells = <2>;
726 clocks = <&pioAB_clk>;
727 };
728
729 pioC: gpio@fffff800 {
730 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
731 reg = <0xfffff800 0x200>;
732 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
733 #gpio-cells = <2>;
734 gpio-controller;
735 interrupt-controller;
736 #interrupt-cells = <2>;
737 clocks = <&pioCD_clk>;
738 };
739
740 pioD: gpio@fffffa00 {
741 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
742 reg = <0xfffffa00 0x200>;
743 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
744 #gpio-cells = <2>;
745 gpio-controller;
746 interrupt-controller;
747 #interrupt-cells = <2>;
748 clocks = <&pioCD_clk>;
749 };
750 };
751
752 dbgu: serial@fffff200 {
753 compatible = "atmel,at91sam9260-usart";
754 reg = <0xfffff200 0x200>;
755 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
756 pinctrl-names = "default";
757 pinctrl-0 = <&pinctrl_dbgu>;
758 clocks = <&mck>;
759 clock-names = "usart";
760 status = "disabled";
761 };
762
763 ssc0: ssc@f0010000 {
764 compatible = "atmel,at91sam9g45-ssc";
765 reg = <0xf0010000 0x4000>;
766 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
767 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
768 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
769 dma-names = "tx", "rx";
770 pinctrl-names = "default";
771 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
772 clocks = <&ssc0_clk>;
773 clock-names = "pclk";
774 status = "disabled";
775 };
776
777 usart0: serial@f801c000 {
778 compatible = "atmel,at91sam9260-usart";
779 reg = <0xf801c000 0x4000>;
780 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
781 pinctrl-names = "default";
782 pinctrl-0 = <&pinctrl_usart0>;
783 clocks = <&usart0_clk>;
784 clock-names = "usart";
785 status = "disabled";
786 };
787
788 usart1: serial@f8020000 {
789 compatible = "atmel,at91sam9260-usart";
790 reg = <0xf8020000 0x4000>;
791 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_usart1>;
794 clocks = <&usart1_clk>;
795 clock-names = "usart";
796 status = "disabled";
797 };
798
799 usart2: serial@f8024000 {
800 compatible = "atmel,at91sam9260-usart";
801 reg = <0xf8024000 0x4000>;
802 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
803 pinctrl-names = "default";
804 pinctrl-0 = <&pinctrl_usart2>;
805 clocks = <&usart2_clk>;
806 clock-names = "usart";
807 status = "disabled";
808 };
809
810 usart3: serial@f8028000 {
811 compatible = "atmel,at91sam9260-usart";
812 reg = <0xf8028000 0x4000>;
813 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
814 pinctrl-names = "default";
815 pinctrl-0 = <&pinctrl_usart3>;
816 clocks = <&usart3_clk>;
817 clock-names = "usart";
818 status = "disabled";
819 };
820
821 i2c0: i2c@f8010000 {
822 compatible = "atmel,at91sam9x5-i2c";
823 reg = <0xf8010000 0x100>;
824 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
825 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
826 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
827 dma-names = "tx", "rx";
828 #address-cells = <1>;
829 #size-cells = <0>;
830 pinctrl-names = "default";
831 pinctrl-0 = <&pinctrl_i2c0>;
832 clocks = <&twi0_clk>;
833 status = "disabled";
834 };
835
836 i2c1: i2c@f8014000 {
837 compatible = "atmel,at91sam9x5-i2c";
838 reg = <0xf8014000 0x100>;
839 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
840 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
841 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
842 dma-names = "tx", "rx";
843 #address-cells = <1>;
844 #size-cells = <0>;
845 pinctrl-names = "default";
846 pinctrl-0 = <&pinctrl_i2c1>;
847 clocks = <&twi1_clk>;
848 status = "disabled";
849 };
850
851 spi0: spi@f0000000 {
852 #address-cells = <1>;
853 #size-cells = <0>;
854 compatible = "atmel,at91rm9200-spi";
855 reg = <0xf0000000 0x100>;
856 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
857 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
858 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
859 dma-names = "tx", "rx";
860 pinctrl-names = "default";
861 pinctrl-0 = <&pinctrl_spi0>;
862 clocks = <&spi0_clk>;
863 clock-names = "spi_clk";
864 status = "disabled";
865 };
866
867 spi1: spi@f0004000 {
868 #address-cells = <1>;
869 #size-cells = <0>;
870 compatible = "atmel,at91rm9200-spi";
871 reg = <0xf0004000 0x100>;
872 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
873 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
874 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
875 dma-names = "tx", "rx";
876 pinctrl-names = "default";
877 pinctrl-0 = <&pinctrl_spi1>;
878 clocks = <&spi1_clk>;
879 clock-names = "spi_clk";
880 status = "disabled";
881 };
882
883 watchdog@fffffe40 {
884 compatible = "atmel,at91sam9260-wdt";
885 reg = <0xfffffe40 0x10>;
886 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
887 atmel,watchdog-type = "hardware";
888 atmel,reset-type = "all";
889 atmel,dbg-halt;
890 atmel,idle-halt;
891 status = "disabled";
892 };
893
894 pwm0: pwm@f8034000 {
895 compatible = "atmel,at91sam9rl-pwm";
896 reg = <0xf8034000 0x300>;
897 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
898 #pwm-cells = <3>;
899 clocks = <&pwm_clk>;
900 status = "disabled";
901 };
902 };
903
904 nand0: nand@40000000 {
905 compatible = "atmel,at91rm9200-nand";
906 #address-cells = <1>;
907 #size-cells = <1>;
908 reg = < 0x40000000 0x10000000
909 0xffffe000 0x00000600
910 0xffffe600 0x00000200
911 0x00108000 0x00018000
912 >;
913 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
914 atmel,nand-addr-offset = <21>;
915 atmel,nand-cmd-offset = <22>;
916 atmel,nand-has-dma;
917 pinctrl-names = "default";
918 pinctrl-0 = <&pinctrl_nand>;
919 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
920 &pioD 4 GPIO_ACTIVE_HIGH
921 0
922 >;
923 status = "disabled";
924 };
925
926 usb0: ohci@00500000 {
927 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
928 reg = <0x00500000 0x00100000>;
929 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
930 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
931 <&uhpck>;
932 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
933 status = "disabled";
934 };
935 };
936
937 i2c@0 {
938 compatible = "i2c-gpio";
939 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
940 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
941 >;
942 i2c-gpio,sda-open-drain;
943 i2c-gpio,scl-open-drain;
944 i2c-gpio,delay-us = <2>; /* ~100 kHz */
945 #address-cells = <1>;
946 #size-cells = <0>;
947 status = "disabled";
948 };
949};