1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12#include "skeleton.dtsi"
13#include <dt-bindings/dma/at91.h>
14#include <dt-bindings/pinctrl/at91.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16#include <dt-bindings/gpio/gpio.h>
17
18/ {
19 model = "Atmel AT91SAM9G45 family SoC";
20 compatible = "atmel,at91sam9g45";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
--- 23 unchanged lines hidden (view full) ---
48 device_type = "cpu";
49 };
50 };
51
52 memory {
53 reg = <0x70000000 0x10000000>;
54 };
55
56 ahb {
57 compatible = "simple-bus";
58 #address-cells = <1>;
59 #size-cells = <1>;
60 ranges;
61
62 apb {
63 compatible = "simple-bus";
--- 8 unchanged lines hidden (view full) ---
72 reg = <0xfffff000 0x200>;
73 atmel,external-irqs = <31>;
74 };
75
76 ramc0: ramc@ffffe400 {
77 compatible = "atmel,at91sam9g45-ddramc";
78 reg = <0xffffe400 0x200
79 0xffffe600 0x200>;
80 };
81
82 pmc: pmc@fffffc00 {
83 compatible = "atmel,at91rm9200-pmc";
84 reg = <0xfffffc00 0x100>;
85 };
86
87 rstc@fffffd00 {
88 compatible = "atmel,at91sam9g45-rstc";
89 reg = <0xfffffd00 0x10>;
90 };
91
92 pit: timer@fffffd30 {
93 compatible = "atmel,at91sam9260-pit";
94 reg = <0xfffffd30 0xf>;
95 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
96 };
97
98
99 shdwc@fffffd10 {
100 compatible = "atmel,at91sam9rl-shdwc";
101 reg = <0xfffffd10 0x10>;
102 };
103
104 tcb0: timer@fff7c000 {
105 compatible = "atmel,at91rm9200-tcb";
106 reg = <0xfff7c000 0x100>;
107 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
108 };
109
110 tcb1: timer@fffd4000 {
111 compatible = "atmel,at91rm9200-tcb";
112 reg = <0xfffd4000 0x100>;
113 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
114 };
115
116 dma: dma-controller@ffffec00 {
117 compatible = "atmel,at91sam9g45-dma";
118 reg = <0xffffec00 0x200>;
119 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
120 #dma-cells = <2>;
121 };
122
123 pinctrl@fffff200 {
124 #address-cells = <1>;
125 #size-cells = <1>;
126 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
127 ranges = <0xfffff200 0xfffff200 0xa00>;
128
129 atmel,mux-mask = <
130 /* A B */
131 0xffffffff 0xffc003ff /* pioA */
132 0xffffffff 0x800f8f00 /* pioB */
133 0xffffffff 0x00000e00 /* pioC */
134 0xffffffff 0xff0c1381 /* pioD */
135 0xffffffff 0x81ffff81 /* pioE */
136 >;
137
138 /* shared pinctrl settings */
139 dbgu {
140 pinctrl_dbgu: dbgu-0 {
141 atmel,pins =
142 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
143 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
144 };
145 };
146
--- 334 unchanged lines hidden (view full) ---
481 pioA: gpio@fffff200 {
482 compatible = "atmel,at91rm9200-gpio";
483 reg = <0xfffff200 0x200>;
484 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
485 #gpio-cells = <2>;
486 gpio-controller;
487 interrupt-controller;
488 #interrupt-cells = <2>;
489 };
490
491 pioB: gpio@fffff400 {
492 compatible = "atmel,at91rm9200-gpio";
493 reg = <0xfffff400 0x200>;
494 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
495 #gpio-cells = <2>;
496 gpio-controller;
497 interrupt-controller;
498 #interrupt-cells = <2>;
499 };
500
501 pioC: gpio@fffff600 {
502 compatible = "atmel,at91rm9200-gpio";
503 reg = <0xfffff600 0x200>;
504 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
505 #gpio-cells = <2>;
506 gpio-controller;
507 interrupt-controller;
508 #interrupt-cells = <2>;
509 };
510
511 pioD: gpio@fffff800 {
512 compatible = "atmel,at91rm9200-gpio";
513 reg = <0xfffff800 0x200>;
514 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
515 #gpio-cells = <2>;
516 gpio-controller;
517 interrupt-controller;
518 #interrupt-cells = <2>;
519 };
520
521 pioE: gpio@fffffa00 {
522 compatible = "atmel,at91rm9200-gpio";
523 reg = <0xfffffa00 0x200>;
524 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
525 #gpio-cells = <2>;
526 gpio-controller;
527 interrupt-controller;
528 #interrupt-cells = <2>;
529 };
530 };
531
532 dbgu: serial@ffffee00 {
533 compatible = "atmel,at91sam9260-usart";
534 reg = <0xffffee00 0x200>;
535 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_dbgu>;
538 status = "disabled";
539 };
540
541 usart0: serial@fff8c000 {
542 compatible = "atmel,at91sam9260-usart";
543 reg = <0xfff8c000 0x200>;
544 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
545 atmel,use-dma-rx;
546 atmel,use-dma-tx;
547 pinctrl-names = "default";
548 pinctrl-0 = <&pinctrl_usart0>;
549 status = "disabled";
550 };
551
552 usart1: serial@fff90000 {
553 compatible = "atmel,at91sam9260-usart";
554 reg = <0xfff90000 0x200>;
555 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
556 atmel,use-dma-rx;
557 atmel,use-dma-tx;
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_usart1>;
560 status = "disabled";
561 };
562
563 usart2: serial@fff94000 {
564 compatible = "atmel,at91sam9260-usart";
565 reg = <0xfff94000 0x200>;
566 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
567 atmel,use-dma-rx;
568 atmel,use-dma-tx;
569 pinctrl-names = "default";
570 pinctrl-0 = <&pinctrl_usart2>;
571 status = "disabled";
572 };
573
574 usart3: serial@fff98000 {
575 compatible = "atmel,at91sam9260-usart";
576 reg = <0xfff98000 0x200>;
577 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
578 atmel,use-dma-rx;
579 atmel,use-dma-tx;
580 pinctrl-names = "default";
581 pinctrl-0 = <&pinctrl_usart3>;
582 status = "disabled";
583 };
584
585 macb0: ethernet@fffbc000 {
586 compatible = "cdns,at32ap7000-macb", "cdns,macb";
587 reg = <0xfffbc000 0x100>;
588 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
589 pinctrl-names = "default";
590 pinctrl-0 = <&pinctrl_macb_rmii>;
591 status = "disabled";
592 };
593
594 i2c0: i2c@fff84000 {
595 compatible = "atmel,at91sam9g10-i2c";
596 reg = <0xfff84000 0x100>;
597 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
598 pinctrl-names = "default";
599 pinctrl-0 = <&pinctrl_i2c0>;
600 #address-cells = <1>;
601 #size-cells = <0>;
602 status = "disabled";
603 };
604
605 i2c1: i2c@fff88000 {
606 compatible = "atmel,at91sam9g10-i2c";
607 reg = <0xfff88000 0x100>;
608 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
609 pinctrl-names = "default";
610 pinctrl-0 = <&pinctrl_i2c1>;
611 #address-cells = <1>;
612 #size-cells = <0>;
613 status = "disabled";
614 };
615
616 ssc0: ssc@fff9c000 {
617 compatible = "atmel,at91sam9g45-ssc";
618 reg = <0xfff9c000 0x4000>;
619 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
620 pinctrl-names = "default";
621 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
622 status = "disabled";
623 };
624
625 ssc1: ssc@fffa0000 {
626 compatible = "atmel,at91sam9g45-ssc";
627 reg = <0xfffa0000 0x4000>;
628 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
629 pinctrl-names = "default";
630 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
631 status = "disabled";
632 };
633
634 adc0: adc@fffb0000 {
635 compatible = "atmel,at91sam9260-adc";
636 reg = <0xfffb0000 0x100>;
637 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
638 atmel,adc-use-external-triggers;
639 atmel,adc-channels-used = <0xff>;
640 atmel,adc-vref = <3300>;
641 atmel,adc-num-channels = <8>;
642 atmel,adc-startup-time = <40>;
643 atmel,adc-channel-base = <0x30>;
644 atmel,adc-drdy-mask = <0x10000>;
645 atmel,adc-status-register = <0x1c>;
646 atmel,adc-trigger-register = <0x08>;
647 atmel,adc-res = <8 10>;
648 atmel,adc-res-names = "lowres", "highres";
649 atmel,adc-use-res = "highres";
650
651 trigger@0 {
652 trigger-name = "external-rising";
653 trigger-value = <0x1>;
654 trigger-external;
655 };
656 trigger@1 {
657 trigger-name = "external-falling";
658 trigger-value = <0x2>;
659 trigger-external;
660 };
661
662 trigger@2 {
663 trigger-name = "external-any";
664 trigger-value = <0x3>;
665 trigger-external;
666 };
667
668 trigger@3 {
669 trigger-name = "continuous";
670 trigger-value = <0x6>;
671 };
672 };
673
674 pwm0: pwm@fffb8000 {
675 compatible = "atmel,at91sam9rl-pwm";
676 reg = <0xfffb8000 0x300>;
677 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
678 #pwm-cells = <3>;
679 status = "disabled";
680 };
681
682 mmc0: mmc@fff80000 {
683 compatible = "atmel,hsmci";
684 reg = <0xfff80000 0x600>;
685 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
686 pinctrl-names = "default";
687 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
688 dma-names = "rxtx";
689 #address-cells = <1>;
690 #size-cells = <0>;
691 status = "disabled";
692 };
693
694 mmc1: mmc@fffd0000 {
695 compatible = "atmel,hsmci";
696 reg = <0xfffd0000 0x600>;
697 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
698 pinctrl-names = "default";
699 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
700 dma-names = "rxtx";
701 #address-cells = <1>;
702 #size-cells = <0>;
703 status = "disabled";
704 };
705
706 watchdog@fffffd40 {
707 compatible = "atmel,at91sam9260-wdt";
708 reg = <0xfffffd40 0x10>;
709 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
710 atmel,watchdog-type = "hardware";
--- 6 unchanged lines hidden (view full) ---
717 spi0: spi@fffa4000 {
718 #address-cells = <1>;
719 #size-cells = <0>;
720 compatible = "atmel,at91rm9200-spi";
721 reg = <0xfffa4000 0x200>;
722 interrupts = <14 4 3>;
723 pinctrl-names = "default";
724 pinctrl-0 = <&pinctrl_spi0>;
725 status = "disabled";
726 };
727
728 spi1: spi@fffa8000 {
729 #address-cells = <1>;
730 #size-cells = <0>;
731 compatible = "atmel,at91rm9200-spi";
732 reg = <0xfffa8000 0x200>;
733 interrupts = <15 4 3>;
734 pinctrl-names = "default";
735 pinctrl-0 = <&pinctrl_spi1>;
736 status = "disabled";
737 };
738
739 usb2: gadget@fff78000 {
740 #address-cells = <1>;
741 #size-cells = <0>;
742 compatible = "atmel,at91sam9rl-udc";
743 reg = <0x00600000 0x80000
744 0xfff78000 0x400>;
745 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
746 status = "disabled";
747
748 ep0 {
749 reg = <0>;
750 atmel,fifo-size = <64>;
751 atmel,nb-banks = <1>;
752 };
753
--- 46 unchanged lines hidden (view full) ---
800 };
801
802 fb0: fb@0x00500000 {
803 compatible = "atmel,at91sam9g45-lcdc";
804 reg = <0x00500000 0x1000>;
805 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
806 pinctrl-names = "default";
807 pinctrl-0 = <&pinctrl_fb>;
808 status = "disabled";
809 };
810
811 nand0: nand@40000000 {
812 compatible = "atmel,at91rm9200-nand";
813 #address-cells = <1>;
814 #size-cells = <1>;
815 reg = <0x40000000 0x10000000
816 0xffffe200 0x200
817 >;
818 atmel,nand-addr-offset = <21>;
819 atmel,nand-cmd-offset = <22>;
820 pinctrl-names = "default";
821 pinctrl-0 = <&pinctrl_nand>;
822 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
823 &pioC 14 GPIO_ACTIVE_HIGH
824 0
825 >;
826 status = "disabled";
827 };
828
829 usb0: ohci@00700000 {
830 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
831 reg = <0x00700000 0x100000>;
832 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
833 status = "disabled";
834 };
835
836 usb1: ehci@00800000 {
837 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
838 reg = <0x00800000 0x100000>;
839 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
840 status = "disabled";
841 };
842 };
843
844 i2c@0 {
845 compatible = "i2c-gpio";
846 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
847 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
848 >;
849 i2c-gpio,sda-open-drain;
850 i2c-gpio,scl-open-drain;
851 i2c-gpio,delay-us = <5>; /* ~100 kHz */
852 #address-cells = <1>;
853 #size-cells = <0>;
854 status = "disabled";
855 };
856};
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12#include "skeleton.dtsi"
13#include <dt-bindings/dma/at91.h>
14#include <dt-bindings/pinctrl/at91.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16#include <dt-bindings/gpio/gpio.h>
17
18/ {
19 model = "Atmel AT91SAM9G45 family SoC";
20 compatible = "atmel,at91sam9g45";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
--- 23 unchanged lines hidden (view full) ---
48 device_type = "cpu";
49 };
50 };
51
52 memory {
53 reg = <0x70000000 0x10000000>;
54 };
55
56 ahb {
57 compatible = "simple-bus";
58 #address-cells = <1>;
59 #size-cells = <1>;
60 ranges;
61
62 apb {
63 compatible = "simple-bus";
--- 8 unchanged lines hidden (view full) ---
72 reg = <0xfffff000 0x200>;
73 atmel,external-irqs = <31>;
74 };
75
76 ramc0: ramc@ffffe400 {
77 compatible = "atmel,at91sam9g45-ddramc";
78 reg = <0xffffe400 0x200
79 0xffffe600 0x200>;
80 };
81
82 pmc: pmc@fffffc00 {
83 compatible = "atmel,at91rm9200-pmc";
84 reg = <0xfffffc00 0x100>;
85 };
86
87 rstc@fffffd00 {
88 compatible = "atmel,at91sam9g45-rstc";
89 reg = <0xfffffd00 0x10>;
90 };
91
92 pit: timer@fffffd30 {
93 compatible = "atmel,at91sam9260-pit";
94 reg = <0xfffffd30 0xf>;
95 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
96 };
97
98
99 shdwc@fffffd10 {
100 compatible = "atmel,at91sam9rl-shdwc";
101 reg = <0xfffffd10 0x10>;
102 };
103
104 tcb0: timer@fff7c000 {
105 compatible = "atmel,at91rm9200-tcb";
106 reg = <0xfff7c000 0x100>;
107 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
108 };
109
110 tcb1: timer@fffd4000 {
111 compatible = "atmel,at91rm9200-tcb";
112 reg = <0xfffd4000 0x100>;
113 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
114 };
115
116 dma: dma-controller@ffffec00 {
117 compatible = "atmel,at91sam9g45-dma";
118 reg = <0xffffec00 0x200>;
119 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
120 #dma-cells = <2>;
121 };
122
123 pinctrl@fffff200 {
124 #address-cells = <1>;
125 #size-cells = <1>;
126 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
127 ranges = <0xfffff200 0xfffff200 0xa00>;
128
129 atmel,mux-mask = <
130 /* A B */
131 0xffffffff 0xffc003ff /* pioA */
132 0xffffffff 0x800f8f00 /* pioB */
133 0xffffffff 0x00000e00 /* pioC */
134 0xffffffff 0xff0c1381 /* pioD */
135 0xffffffff 0x81ffff81 /* pioE */
136 >;
137
138 /* shared pinctrl settings */
139 dbgu {
140 pinctrl_dbgu: dbgu-0 {
141 atmel,pins =
142 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
143 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
144 };
145 };
146
--- 334 unchanged lines hidden (view full) ---
481 pioA: gpio@fffff200 {
482 compatible = "atmel,at91rm9200-gpio";
483 reg = <0xfffff200 0x200>;
484 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
485 #gpio-cells = <2>;
486 gpio-controller;
487 interrupt-controller;
488 #interrupt-cells = <2>;
489 };
490
491 pioB: gpio@fffff400 {
492 compatible = "atmel,at91rm9200-gpio";
493 reg = <0xfffff400 0x200>;
494 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
495 #gpio-cells = <2>;
496 gpio-controller;
497 interrupt-controller;
498 #interrupt-cells = <2>;
499 };
500
501 pioC: gpio@fffff600 {
502 compatible = "atmel,at91rm9200-gpio";
503 reg = <0xfffff600 0x200>;
504 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
505 #gpio-cells = <2>;
506 gpio-controller;
507 interrupt-controller;
508 #interrupt-cells = <2>;
509 };
510
511 pioD: gpio@fffff800 {
512 compatible = "atmel,at91rm9200-gpio";
513 reg = <0xfffff800 0x200>;
514 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
515 #gpio-cells = <2>;
516 gpio-controller;
517 interrupt-controller;
518 #interrupt-cells = <2>;
519 };
520
521 pioE: gpio@fffffa00 {
522 compatible = "atmel,at91rm9200-gpio";
523 reg = <0xfffffa00 0x200>;
524 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
525 #gpio-cells = <2>;
526 gpio-controller;
527 interrupt-controller;
528 #interrupt-cells = <2>;
529 };
530 };
531
532 dbgu: serial@ffffee00 {
533 compatible = "atmel,at91sam9260-usart";
534 reg = <0xffffee00 0x200>;
535 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_dbgu>;
538 status = "disabled";
539 };
540
541 usart0: serial@fff8c000 {
542 compatible = "atmel,at91sam9260-usart";
543 reg = <0xfff8c000 0x200>;
544 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
545 atmel,use-dma-rx;
546 atmel,use-dma-tx;
547 pinctrl-names = "default";
548 pinctrl-0 = <&pinctrl_usart0>;
549 status = "disabled";
550 };
551
552 usart1: serial@fff90000 {
553 compatible = "atmel,at91sam9260-usart";
554 reg = <0xfff90000 0x200>;
555 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
556 atmel,use-dma-rx;
557 atmel,use-dma-tx;
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_usart1>;
560 status = "disabled";
561 };
562
563 usart2: serial@fff94000 {
564 compatible = "atmel,at91sam9260-usart";
565 reg = <0xfff94000 0x200>;
566 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
567 atmel,use-dma-rx;
568 atmel,use-dma-tx;
569 pinctrl-names = "default";
570 pinctrl-0 = <&pinctrl_usart2>;
571 status = "disabled";
572 };
573
574 usart3: serial@fff98000 {
575 compatible = "atmel,at91sam9260-usart";
576 reg = <0xfff98000 0x200>;
577 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
578 atmel,use-dma-rx;
579 atmel,use-dma-tx;
580 pinctrl-names = "default";
581 pinctrl-0 = <&pinctrl_usart3>;
582 status = "disabled";
583 };
584
585 macb0: ethernet@fffbc000 {
586 compatible = "cdns,at32ap7000-macb", "cdns,macb";
587 reg = <0xfffbc000 0x100>;
588 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
589 pinctrl-names = "default";
590 pinctrl-0 = <&pinctrl_macb_rmii>;
591 status = "disabled";
592 };
593
594 i2c0: i2c@fff84000 {
595 compatible = "atmel,at91sam9g10-i2c";
596 reg = <0xfff84000 0x100>;
597 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
598 pinctrl-names = "default";
599 pinctrl-0 = <&pinctrl_i2c0>;
600 #address-cells = <1>;
601 #size-cells = <0>;
602 status = "disabled";
603 };
604
605 i2c1: i2c@fff88000 {
606 compatible = "atmel,at91sam9g10-i2c";
607 reg = <0xfff88000 0x100>;
608 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
609 pinctrl-names = "default";
610 pinctrl-0 = <&pinctrl_i2c1>;
611 #address-cells = <1>;
612 #size-cells = <0>;
613 status = "disabled";
614 };
615
616 ssc0: ssc@fff9c000 {
617 compatible = "atmel,at91sam9g45-ssc";
618 reg = <0xfff9c000 0x4000>;
619 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
620 pinctrl-names = "default";
621 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
622 status = "disabled";
623 };
624
625 ssc1: ssc@fffa0000 {
626 compatible = "atmel,at91sam9g45-ssc";
627 reg = <0xfffa0000 0x4000>;
628 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
629 pinctrl-names = "default";
630 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
631 status = "disabled";
632 };
633
634 adc0: adc@fffb0000 {
635 compatible = "atmel,at91sam9260-adc";
636 reg = <0xfffb0000 0x100>;
637 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
638 atmel,adc-use-external-triggers;
639 atmel,adc-channels-used = <0xff>;
640 atmel,adc-vref = <3300>;
641 atmel,adc-num-channels = <8>;
642 atmel,adc-startup-time = <40>;
643 atmel,adc-channel-base = <0x30>;
644 atmel,adc-drdy-mask = <0x10000>;
645 atmel,adc-status-register = <0x1c>;
646 atmel,adc-trigger-register = <0x08>;
647 atmel,adc-res = <8 10>;
648 atmel,adc-res-names = "lowres", "highres";
649 atmel,adc-use-res = "highres";
650
651 trigger@0 {
652 trigger-name = "external-rising";
653 trigger-value = <0x1>;
654 trigger-external;
655 };
656 trigger@1 {
657 trigger-name = "external-falling";
658 trigger-value = <0x2>;
659 trigger-external;
660 };
661
662 trigger@2 {
663 trigger-name = "external-any";
664 trigger-value = <0x3>;
665 trigger-external;
666 };
667
668 trigger@3 {
669 trigger-name = "continuous";
670 trigger-value = <0x6>;
671 };
672 };
673
674 pwm0: pwm@fffb8000 {
675 compatible = "atmel,at91sam9rl-pwm";
676 reg = <0xfffb8000 0x300>;
677 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
678 #pwm-cells = <3>;
679 status = "disabled";
680 };
681
682 mmc0: mmc@fff80000 {
683 compatible = "atmel,hsmci";
684 reg = <0xfff80000 0x600>;
685 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
686 pinctrl-names = "default";
687 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
688 dma-names = "rxtx";
689 #address-cells = <1>;
690 #size-cells = <0>;
691 status = "disabled";
692 };
693
694 mmc1: mmc@fffd0000 {
695 compatible = "atmel,hsmci";
696 reg = <0xfffd0000 0x600>;
697 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
698 pinctrl-names = "default";
699 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
700 dma-names = "rxtx";
701 #address-cells = <1>;
702 #size-cells = <0>;
703 status = "disabled";
704 };
705
706 watchdog@fffffd40 {
707 compatible = "atmel,at91sam9260-wdt";
708 reg = <0xfffffd40 0x10>;
709 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
710 atmel,watchdog-type = "hardware";
--- 6 unchanged lines hidden (view full) ---
717 spi0: spi@fffa4000 {
718 #address-cells = <1>;
719 #size-cells = <0>;
720 compatible = "atmel,at91rm9200-spi";
721 reg = <0xfffa4000 0x200>;
722 interrupts = <14 4 3>;
723 pinctrl-names = "default";
724 pinctrl-0 = <&pinctrl_spi0>;
725 status = "disabled";
726 };
727
728 spi1: spi@fffa8000 {
729 #address-cells = <1>;
730 #size-cells = <0>;
731 compatible = "atmel,at91rm9200-spi";
732 reg = <0xfffa8000 0x200>;
733 interrupts = <15 4 3>;
734 pinctrl-names = "default";
735 pinctrl-0 = <&pinctrl_spi1>;
736 status = "disabled";
737 };
738
739 usb2: gadget@fff78000 {
740 #address-cells = <1>;
741 #size-cells = <0>;
742 compatible = "atmel,at91sam9rl-udc";
743 reg = <0x00600000 0x80000
744 0xfff78000 0x400>;
745 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
746 status = "disabled";
747
748 ep0 {
749 reg = <0>;
750 atmel,fifo-size = <64>;
751 atmel,nb-banks = <1>;
752 };
753
--- 46 unchanged lines hidden (view full) ---
800 };
801
802 fb0: fb@0x00500000 {
803 compatible = "atmel,at91sam9g45-lcdc";
804 reg = <0x00500000 0x1000>;
805 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
806 pinctrl-names = "default";
807 pinctrl-0 = <&pinctrl_fb>;
808 status = "disabled";
809 };
810
811 nand0: nand@40000000 {
812 compatible = "atmel,at91rm9200-nand";
813 #address-cells = <1>;
814 #size-cells = <1>;
815 reg = <0x40000000 0x10000000
816 0xffffe200 0x200
817 >;
818 atmel,nand-addr-offset = <21>;
819 atmel,nand-cmd-offset = <22>;
820 pinctrl-names = "default";
821 pinctrl-0 = <&pinctrl_nand>;
822 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
823 &pioC 14 GPIO_ACTIVE_HIGH
824 0
825 >;
826 status = "disabled";
827 };
828
829 usb0: ohci@00700000 {
830 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
831 reg = <0x00700000 0x100000>;
832 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
833 status = "disabled";
834 };
835
836 usb1: ehci@00800000 {
837 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
838 reg = <0x00800000 0x100000>;
839 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
840 status = "disabled";
841 };
842 };
843
844 i2c@0 {
845 compatible = "i2c-gpio";
846 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
847 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
848 >;
849 i2c-gpio,sda-open-drain;
850 i2c-gpio,scl-open-drain;
851 i2c-gpio,delay-us = <5>; /* ~100 kHz */
852 #address-cells = <1>;
853 #size-cells = <0>;
854 status = "disabled";
855 };
856};