1/* 2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC 3 * 4 * Copyright (C) 2011 Atmel, 5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, 6 * 2012 Joachim Eastwood <manabian@gmail.com> 7 * 8 * Based on at91sam9260.dtsi 9 * 10 * Licensed under GPLv2 or later. 11 */ 12 13#include "skeleton.dtsi" 14#include <dt-bindings/pinctrl/at91.h> 15#include <dt-bindings/interrupt-controller/irq.h> 16#include <dt-bindings/gpio/gpio.h> |
17#include <dt-bindings/clock/at91.h> |
18 19/ { 20 model = "Atmel AT91RM9200 family SoC"; 21 compatible = "atmel,at91rm9200"; 22 interrupt-parent = <&aic>; 23 24 aliases { 25 serial0 = &dbgu; --- 21 unchanged lines hidden (view full) --- 47 device_type = "cpu"; 48 }; 49 }; 50 51 memory { 52 reg = <0x20000000 0x04000000>; 53 }; 54 |
55 clocks { 56 slow_xtal: slow_xtal { 57 compatible = "fixed-clock"; 58 #clock-cells = <0>; 59 clock-frequency = <0>; 60 }; 61 62 main_xtal: main_xtal { 63 compatible = "fixed-clock"; 64 #clock-cells = <0>; 65 clock-frequency = <0>; 66 }; 67 }; 68 |
69 ahb { 70 compatible = "simple-bus"; 71 #address-cells = <1>; 72 #size-cells = <1>; 73 ranges; 74 75 apb { 76 compatible = "simple-bus"; --- 12 unchanged lines hidden (view full) --- 89 ramc0: ramc@ffffff00 { 90 compatible = "atmel,at91rm9200-sdramc"; 91 reg = <0xffffff00 0x100>; 92 }; 93 94 pmc: pmc@fffffc00 { 95 compatible = "atmel,at91rm9200-pmc"; 96 reg = <0xfffffc00 0x100>; |
97 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 98 interrupt-controller; 99 #address-cells = <1>; 100 #size-cells = <0>; 101 #interrupt-cells = <1>; 102 103 main_osc: main_osc { 104 compatible = "atmel,at91rm9200-clk-main-osc"; 105 #clock-cells = <0>; 106 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 107 clocks = <&main_xtal>; 108 }; 109 110 main: mainck { 111 compatible = "atmel,at91rm9200-clk-main"; 112 #clock-cells = <0>; 113 clocks = <&main_osc>; 114 }; 115 116 plla: pllack { 117 compatible = "atmel,at91rm9200-clk-pll"; 118 #clock-cells = <0>; 119 interrupts-extended = <&pmc AT91_PMC_LOCKA>; 120 clocks = <&main>; 121 reg = <0>; 122 atmel,clk-input-range = <1000000 32000000>; 123 #atmel,pll-clk-output-range-cells = <3>; 124 atmel,pll-clk-output-ranges = <80000000 160000000 0>, 125 <150000000 180000000 2>; 126 }; 127 128 pllb: pllbck { 129 compatible = "atmel,at91rm9200-clk-pll"; 130 #clock-cells = <0>; 131 interrupts-extended = <&pmc AT91_PMC_LOCKB>; 132 clocks = <&main>; 133 reg = <1>; 134 atmel,clk-input-range = <1000000 32000000>; 135 #atmel,pll-clk-output-range-cells = <3>; 136 atmel,pll-clk-output-ranges = <80000000 160000000 0>, 137 <150000000 180000000 2>; 138 }; 139 140 mck: masterck { 141 compatible = "atmel,at91rm9200-clk-master"; 142 #clock-cells = <0>; 143 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 144 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 145 atmel,clk-output-range = <0 80000000>; 146 atmel,clk-divisors = <1 2 3 4>; 147 }; 148 149 usb: usbck { 150 compatible = "atmel,at91rm9200-clk-usb"; 151 #clock-cells = <0>; 152 atmel,clk-divisors = <1 2>; 153 clocks = <&pllb>; 154 }; 155 156 prog: progck { 157 compatible = "atmel,at91rm9200-clk-programmable"; 158 #address-cells = <1>; 159 #size-cells = <0>; 160 interrupt-parent = <&pmc>; 161 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 162 163 prog0: prog0 { 164 #clock-cells = <0>; 165 reg = <0>; 166 interrupts = <AT91_PMC_PCKRDY(0)>; 167 }; 168 169 prog1: prog1 { 170 #clock-cells = <0>; 171 reg = <1>; 172 interrupts = <AT91_PMC_PCKRDY(1)>; 173 }; 174 175 prog2: prog2 { 176 #clock-cells = <0>; 177 reg = <2>; 178 interrupts = <AT91_PMC_PCKRDY(2)>; 179 }; 180 181 prog3: prog3 { 182 #clock-cells = <0>; 183 reg = <3>; 184 interrupts = <AT91_PMC_PCKRDY(3)>; 185 }; 186 }; 187 188 systemck { 189 compatible = "atmel,at91rm9200-clk-system"; 190 #address-cells = <1>; 191 #size-cells = <0>; 192 193 udpck: udpck { 194 #clock-cells = <0>; 195 reg = <2>; 196 clocks = <&usb>; 197 }; 198 199 uhpck: uhpck { 200 #clock-cells = <0>; 201 reg = <4>; 202 clocks = <&usb>; 203 }; 204 205 pck0: pck0 { 206 #clock-cells = <0>; 207 reg = <8>; 208 clocks = <&prog0>; 209 }; 210 211 pck1: pck1 { 212 #clock-cells = <0>; 213 reg = <9>; 214 clocks = <&prog1>; 215 }; 216 217 pck2: pck2 { 218 #clock-cells = <0>; 219 reg = <10>; 220 clocks = <&prog2>; 221 }; 222 223 pck3: pck3 { 224 #clock-cells = <0>; 225 reg = <11>; 226 clocks = <&prog3>; 227 }; 228 }; 229 230 periphck { 231 compatible = "atmel,at91rm9200-clk-peripheral"; 232 #address-cells = <1>; 233 #size-cells = <0>; 234 clocks = <&mck>; 235 236 pioA_clk: pioA_clk { 237 #clock-cells = <0>; 238 reg = <2>; 239 }; 240 241 pioB_clk: pioB_clk { 242 #clock-cells = <0>; 243 reg = <3>; 244 }; 245 246 pioC_clk: pioC_clk { 247 #clock-cells = <0>; 248 reg = <4>; 249 }; 250 251 pioD_clk: pioD_clk { 252 #clock-cells = <0>; 253 reg = <5>; 254 }; 255 256 usart0_clk: usart0_clk { 257 #clock-cells = <0>; 258 reg = <6>; 259 }; 260 261 usart1_clk: usart1_clk { 262 #clock-cells = <0>; 263 reg = <7>; 264 }; 265 266 usart2_clk: usart2_clk { 267 #clock-cells = <0>; 268 reg = <8>; 269 }; 270 271 usart3_clk: usart3_clk { 272 #clock-cells = <0>; 273 reg = <9>; 274 }; 275 276 mci0_clk: mci0_clk { 277 #clock-cells = <0>; 278 reg = <10>; 279 }; 280 281 udc_clk: udc_clk { 282 #clock-cells = <0>; 283 reg = <11>; 284 }; 285 286 twi0_clk: twi0_clk { 287 reg = <12>; 288 #clock-cells = <0>; 289 }; 290 291 spi0_clk: spi0_clk { 292 #clock-cells = <0>; 293 reg = <13>; 294 }; 295 296 ssc0_clk: ssc0_clk { 297 #clock-cells = <0>; 298 reg = <14>; 299 }; 300 301 ssc1_clk: ssc1_clk { 302 #clock-cells = <0>; 303 reg = <15>; 304 }; 305 306 ssc2_clk: ssc2_clk { 307 #clock-cells = <0>; 308 reg = <16>; 309 }; 310 311 tc0_clk: tc0_clk { 312 #clock-cells = <0>; 313 reg = <17>; 314 }; 315 316 tc1_clk: tc1_clk { 317 #clock-cells = <0>; 318 reg = <18>; 319 }; 320 321 tc2_clk: tc2_clk { 322 #clock-cells = <0>; 323 reg = <19>; 324 }; 325 326 tc3_clk: tc3_clk { 327 #clock-cells = <0>; 328 reg = <20>; 329 }; 330 331 tc4_clk: tc4_clk { 332 #clock-cells = <0>; 333 reg = <21>; 334 }; 335 336 tc5_clk: tc5_clk { 337 #clock-cells = <0>; 338 reg = <22>; 339 }; 340 341 ohci_clk: ohci_clk { 342 #clock-cells = <0>; 343 reg = <23>; 344 }; 345 346 macb0_clk: macb0_clk { 347 #clock-cells = <0>; 348 reg = <24>; 349 }; 350 }; |
351 }; 352 353 st: timer@fffffd00 { 354 compatible = "atmel,at91rm9200-st"; 355 reg = <0xfffffd00 0x100>; 356 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 357 }; 358 359 tcb0: timer@fffa0000 { 360 compatible = "atmel,at91rm9200-tcb"; 361 reg = <0xfffa0000 0x100>; 362 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 363 18 IRQ_TYPE_LEVEL_HIGH 0 364 19 IRQ_TYPE_LEVEL_HIGH 0>; |
365 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; 366 clock-names = "t0_clk", "t1_clk", "t2_clk"; |
367 }; 368 369 tcb1: timer@fffa4000 { 370 compatible = "atmel,at91rm9200-tcb"; 371 reg = <0xfffa4000 0x100>; 372 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0 373 21 IRQ_TYPE_LEVEL_HIGH 0 374 22 IRQ_TYPE_LEVEL_HIGH 0>; |
375 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>; 376 clock-names = "t0_clk", "t1_clk", "t2_clk"; |
377 }; 378 379 i2c0: i2c@fffb8000 { 380 compatible = "atmel,at91rm9200-i2c"; 381 reg = <0xfffb8000 0x4000>; 382 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 383 pinctrl-names = "default"; 384 pinctrl-0 = <&pinctrl_twi>; |
385 clocks = <&twi0_clk>; |
386 #address-cells = <1>; 387 #size-cells = <0>; 388 status = "disabled"; 389 }; 390 391 mmc0: mmc@fffb4000 { 392 compatible = "atmel,hsmci"; 393 reg = <0xfffb4000 0x4000>; 394 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; |
395 clocks = <&mci0_clk>; 396 clock-names = "mci_clk"; |
397 #address-cells = <1>; 398 #size-cells = <0>; 399 pinctrl-names = "default"; 400 status = "disabled"; 401 }; 402 403 ssc0: ssc@fffd0000 { 404 compatible = "atmel,at91rm9200-ssc"; 405 reg = <0xfffd0000 0x4000>; 406 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 407 pinctrl-names = "default"; 408 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; |
409 clocks = <&ssc0_clk>; 410 clock-names = "pclk"; |
411 status = "disable"; 412 }; 413 414 ssc1: ssc@fffd4000 { 415 compatible = "atmel,at91rm9200-ssc"; 416 reg = <0xfffd4000 0x4000>; 417 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 418 pinctrl-names = "default"; 419 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; |
420 clocks = <&ssc1_clk>; 421 clock-names = "pclk"; |
422 status = "disable"; 423 }; 424 425 ssc2: ssc@fffd8000 { 426 compatible = "atmel,at91rm9200-ssc"; 427 reg = <0xfffd8000 0x4000>; 428 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 429 pinctrl-names = "default"; 430 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; |
431 clocks = <&ssc2_clk>; 432 clock-names = "pclk"; |
433 status = "disable"; 434 }; 435 436 macb0: ethernet@fffbc000 { 437 compatible = "cdns,at91rm9200-emac", "cdns,emac"; 438 reg = <0xfffbc000 0x4000>; 439 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; 440 phy-mode = "rmii"; 441 pinctrl-names = "default"; 442 pinctrl-0 = <&pinctrl_macb_rmii>; |
443 clocks = <&macb0_clk>; 444 clock-names = "ether_clk"; |
445 status = "disabled"; 446 }; 447 448 pinctrl@fffff400 { 449 #address-cells = <1>; 450 #size-cells = <1>; 451 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 452 ranges = <0xfffff400 0xfffff400 0x800>; --- 322 unchanged lines hidden (view full) --- 775 pioA: gpio@fffff400 { 776 compatible = "atmel,at91rm9200-gpio"; 777 reg = <0xfffff400 0x200>; 778 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 779 #gpio-cells = <2>; 780 gpio-controller; 781 interrupt-controller; 782 #interrupt-cells = <2>; |
783 clocks = <&pioA_clk>; |
784 }; 785 786 pioB: gpio@fffff600 { 787 compatible = "atmel,at91rm9200-gpio"; 788 reg = <0xfffff600 0x200>; 789 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 790 #gpio-cells = <2>; 791 gpio-controller; 792 interrupt-controller; 793 #interrupt-cells = <2>; |
794 clocks = <&pioB_clk>; |
795 }; 796 797 pioC: gpio@fffff800 { 798 compatible = "atmel,at91rm9200-gpio"; 799 reg = <0xfffff800 0x200>; 800 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 801 #gpio-cells = <2>; 802 gpio-controller; 803 interrupt-controller; 804 #interrupt-cells = <2>; |
805 clocks = <&pioC_clk>; |
806 }; 807 808 pioD: gpio@fffffa00 { 809 compatible = "atmel,at91rm9200-gpio"; 810 reg = <0xfffffa00 0x200>; 811 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 812 #gpio-cells = <2>; 813 gpio-controller; 814 interrupt-controller; 815 #interrupt-cells = <2>; |
816 clocks = <&pioD_clk>; |
817 }; 818 }; 819 820 dbgu: serial@fffff200 { 821 compatible = "atmel,at91rm9200-usart"; 822 reg = <0xfffff200 0x200>; 823 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 824 pinctrl-names = "default"; 825 pinctrl-0 = <&pinctrl_dbgu>; |
826 clocks = <&mck>; 827 clock-names = "usart"; |
828 status = "disabled"; 829 }; 830 831 usart0: serial@fffc0000 { 832 compatible = "atmel,at91rm9200-usart"; 833 reg = <0xfffc0000 0x200>; 834 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 835 atmel,use-dma-rx; 836 atmel,use-dma-tx; 837 pinctrl-names = "default"; 838 pinctrl-0 = <&pinctrl_uart0>; |
839 clocks = <&usart0_clk>; 840 clock-names = "usart"; |
841 status = "disabled"; 842 }; 843 844 usart1: serial@fffc4000 { 845 compatible = "atmel,at91rm9200-usart"; 846 reg = <0xfffc4000 0x200>; 847 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 848 atmel,use-dma-rx; 849 atmel,use-dma-tx; 850 pinctrl-names = "default"; 851 pinctrl-0 = <&pinctrl_uart1>; |
852 clocks = <&usart1_clk>; 853 clock-names = "usart"; |
854 status = "disabled"; 855 }; 856 857 usart2: serial@fffc8000 { 858 compatible = "atmel,at91rm9200-usart"; 859 reg = <0xfffc8000 0x200>; 860 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 861 atmel,use-dma-rx; 862 atmel,use-dma-tx; 863 pinctrl-names = "default"; 864 pinctrl-0 = <&pinctrl_uart2>; |
865 clocks = <&usart2_clk>; 866 clock-names = "usart"; |
867 status = "disabled"; 868 }; 869 870 usart3: serial@fffcc000 { 871 compatible = "atmel,at91rm9200-usart"; 872 reg = <0xfffcc000 0x200>; 873 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>; 874 atmel,use-dma-rx; 875 atmel,use-dma-tx; 876 pinctrl-names = "default"; 877 pinctrl-0 = <&pinctrl_uart3>; |
878 clocks = <&usart3_clk>; 879 clock-names = "usart"; |
880 status = "disabled"; 881 }; 882 883 usb1: gadget@fffb0000 { 884 compatible = "atmel,at91rm9200-udc"; 885 reg = <0xfffb0000 0x4000>; 886 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>; |
887 clocks = <&udc_clk>, <&udpck>; 888 clock-names = "pclk", "hclk"; |
889 status = "disabled"; 890 }; 891 892 spi0: spi@fffe0000 { 893 #address-cells = <1>; 894 #size-cells = <0>; 895 compatible = "atmel,at91rm9200-spi"; 896 reg = <0xfffe0000 0x200>; 897 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 898 pinctrl-names = "default"; 899 pinctrl-0 = <&pinctrl_spi0>; |
900 clocks = <&spi0_clk>; 901 clock-names = "spi_clk"; |
902 status = "disabled"; 903 }; 904 }; 905 906 nand0: nand@40000000 { 907 compatible = "atmel,at91rm9200-nand"; 908 #address-cells = <1>; 909 #size-cells = <1>; --- 9 unchanged lines hidden (view full) --- 919 >; 920 status = "disabled"; 921 }; 922 923 usb0: ohci@00300000 { 924 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 925 reg = <0x00300000 0x100000>; 926 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>; |
927 clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>; 928 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; |
929 status = "disabled"; 930 }; 931 }; 932 933 i2c@0 { 934 compatible = "i2c-gpio"; 935 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */ 936 &pioA 26 GPIO_ACTIVE_HIGH /* scl */ 937 >; 938 i2c-gpio,sda-open-drain; 939 i2c-gpio,scl-open-drain; 940 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 941 pinctrl-names = "default"; 942 pinctrl-0 = <&pinctrl_twi_gpio>; 943 #address-cells = <1>; 944 #size-cells = <0>; 945 status = "disabled"; 946 }; 947}; |