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> #include <dt-bindings/clock/at91.h>
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> clocks {
> slow_xtal: slow_xtal {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <0>;
> };
>
> main_xtal: main_xtal {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <0>;
> };
> };
>
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> interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
> interrupt-controller;
> #address-cells = <1>;
> #size-cells = <0>;
> #interrupt-cells = <1>;
>
> main_osc: main_osc {
> compatible = "atmel,at91rm9200-clk-main-osc";
> #clock-cells = <0>;
> interrupts-extended = <&pmc AT91_PMC_MOSCS>;
> clocks = <&main_xtal>;
> };
>
> main: mainck {
> compatible = "atmel,at91rm9200-clk-main";
> #clock-cells = <0>;
> clocks = <&main_osc>;
> };
>
> plla: pllack {
> compatible = "atmel,at91rm9200-clk-pll";
> #clock-cells = <0>;
> interrupts-extended = <&pmc AT91_PMC_LOCKA>;
> clocks = <&main>;
> reg = <0>;
> atmel,clk-input-range = <1000000 32000000>;
> #atmel,pll-clk-output-range-cells = <3>;
> atmel,pll-clk-output-ranges = <80000000 160000000 0>,
> <150000000 180000000 2>;
> };
>
> pllb: pllbck {
> compatible = "atmel,at91rm9200-clk-pll";
> #clock-cells = <0>;
> interrupts-extended = <&pmc AT91_PMC_LOCKB>;
> clocks = <&main>;
> reg = <1>;
> atmel,clk-input-range = <1000000 32000000>;
> #atmel,pll-clk-output-range-cells = <3>;
> atmel,pll-clk-output-ranges = <80000000 160000000 0>,
> <150000000 180000000 2>;
> };
>
> mck: masterck {
> compatible = "atmel,at91rm9200-clk-master";
> #clock-cells = <0>;
> interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
> clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
> atmel,clk-output-range = <0 80000000>;
> atmel,clk-divisors = <1 2 3 4>;
> };
>
> usb: usbck {
> compatible = "atmel,at91rm9200-clk-usb";
> #clock-cells = <0>;
> atmel,clk-divisors = <1 2>;
> clocks = <&pllb>;
> };
>
> prog: progck {
> compatible = "atmel,at91rm9200-clk-programmable";
> #address-cells = <1>;
> #size-cells = <0>;
> interrupt-parent = <&pmc>;
> clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
>
> prog0: prog0 {
> #clock-cells = <0>;
> reg = <0>;
> interrupts = <AT91_PMC_PCKRDY(0)>;
> };
>
> prog1: prog1 {
> #clock-cells = <0>;
> reg = <1>;
> interrupts = <AT91_PMC_PCKRDY(1)>;
> };
>
> prog2: prog2 {
> #clock-cells = <0>;
> reg = <2>;
> interrupts = <AT91_PMC_PCKRDY(2)>;
> };
>
> prog3: prog3 {
> #clock-cells = <0>;
> reg = <3>;
> interrupts = <AT91_PMC_PCKRDY(3)>;
> };
> };
>
> systemck {
> compatible = "atmel,at91rm9200-clk-system";
> #address-cells = <1>;
> #size-cells = <0>;
>
> udpck: udpck {
> #clock-cells = <0>;
> reg = <2>;
> clocks = <&usb>;
> };
>
> uhpck: uhpck {
> #clock-cells = <0>;
> reg = <4>;
> clocks = <&usb>;
> };
>
> pck0: pck0 {
> #clock-cells = <0>;
> reg = <8>;
> clocks = <&prog0>;
> };
>
> pck1: pck1 {
> #clock-cells = <0>;
> reg = <9>;
> clocks = <&prog1>;
> };
>
> pck2: pck2 {
> #clock-cells = <0>;
> reg = <10>;
> clocks = <&prog2>;
> };
>
> pck3: pck3 {
> #clock-cells = <0>;
> reg = <11>;
> clocks = <&prog3>;
> };
> };
>
> periphck {
> compatible = "atmel,at91rm9200-clk-peripheral";
> #address-cells = <1>;
> #size-cells = <0>;
> clocks = <&mck>;
>
> pioA_clk: pioA_clk {
> #clock-cells = <0>;
> reg = <2>;
> };
>
> pioB_clk: pioB_clk {
> #clock-cells = <0>;
> reg = <3>;
> };
>
> pioC_clk: pioC_clk {
> #clock-cells = <0>;
> reg = <4>;
> };
>
> pioD_clk: pioD_clk {
> #clock-cells = <0>;
> reg = <5>;
> };
>
> usart0_clk: usart0_clk {
> #clock-cells = <0>;
> reg = <6>;
> };
>
> usart1_clk: usart1_clk {
> #clock-cells = <0>;
> reg = <7>;
> };
>
> usart2_clk: usart2_clk {
> #clock-cells = <0>;
> reg = <8>;
> };
>
> usart3_clk: usart3_clk {
> #clock-cells = <0>;
> reg = <9>;
> };
>
> mci0_clk: mci0_clk {
> #clock-cells = <0>;
> reg = <10>;
> };
>
> udc_clk: udc_clk {
> #clock-cells = <0>;
> reg = <11>;
> };
>
> twi0_clk: twi0_clk {
> reg = <12>;
> #clock-cells = <0>;
> };
>
> spi0_clk: spi0_clk {
> #clock-cells = <0>;
> reg = <13>;
> };
>
> ssc0_clk: ssc0_clk {
> #clock-cells = <0>;
> reg = <14>;
> };
>
> ssc1_clk: ssc1_clk {
> #clock-cells = <0>;
> reg = <15>;
> };
>
> ssc2_clk: ssc2_clk {
> #clock-cells = <0>;
> reg = <16>;
> };
>
> tc0_clk: tc0_clk {
> #clock-cells = <0>;
> reg = <17>;
> };
>
> tc1_clk: tc1_clk {
> #clock-cells = <0>;
> reg = <18>;
> };
>
> tc2_clk: tc2_clk {
> #clock-cells = <0>;
> reg = <19>;
> };
>
> tc3_clk: tc3_clk {
> #clock-cells = <0>;
> reg = <20>;
> };
>
> tc4_clk: tc4_clk {
> #clock-cells = <0>;
> reg = <21>;
> };
>
> tc5_clk: tc5_clk {
> #clock-cells = <0>;
> reg = <22>;
> };
>
> ohci_clk: ohci_clk {
> #clock-cells = <0>;
> reg = <23>;
> };
>
> macb0_clk: macb0_clk {
> #clock-cells = <0>;
> reg = <24>;
> };
> };
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> clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
> clock-names = "t0_clk", "t1_clk", "t2_clk";
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> clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>;
> clock-names = "t0_clk", "t1_clk", "t2_clk";
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> clocks = <&twi0_clk>;
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> clocks = <&mci0_clk>;
> clock-names = "mci_clk";
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> clocks = <&ssc0_clk>;
> clock-names = "pclk";
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> clocks = <&ssc1_clk>;
> clock-names = "pclk";
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> clocks = <&ssc2_clk>;
> clock-names = "pclk";
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> clocks = <&macb0_clk>;
> clock-names = "ether_clk";
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> clocks = <&pioA_clk>;
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> clocks = <&pioB_clk>;
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> clocks = <&pioC_clk>;
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> clocks = <&pioD_clk>;
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> clocks = <&mck>;
> clock-names = "usart";
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> clocks = <&usart0_clk>;
> clock-names = "usart";
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> clocks = <&usart1_clk>;
> clock-names = "usart";
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> clocks = <&usart2_clk>;
> clock-names = "usart";
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> clocks = <&usart3_clk>;
> clock-names = "usart";
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> clocks = <&udc_clk>, <&udpck>;
> clock-names = "pclk", "hclk";
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> clocks = <&spi0_clk>;
> clock-names = "spi_clk";
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> clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
> clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";