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if_wl.c (113566) if_wl.c (113571)
1/* $FreeBSD: head/sys/dev/wl/if_wl.c 113566 2003-04-16 15:52:20Z jhay $ */
1/* $FreeBSD: head/sys/dev/wl/if_wl.c 113571 2003-04-16 17:29:00Z jhay $ */
2/*
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions
5 * are met:
6 * 1. Redistributions of source code must retain all copyright
7 * notices, this list of conditions and the following disclaimer.
8 * 2. The names of the authors may not be used to endorse or promote products
9 * derived from this software without specific prior written permission

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183 * The copy I found was dated 1984. This really tells you
184 * what the state machines are doing
185 * 2. In the current design, we only do one write at a time,
186 * though the hardware is capable of chaining and possibly
187 * even batching. The problem is that we only make one
188 * transmit buffer available in sram space.
189 */
190
2/*
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions
5 * are met:
6 * 1. Redistributions of source code must retain all copyright
7 * notices, this list of conditions and the following disclaimer.
8 * 2. The names of the authors may not be used to endorse or promote products
9 * derived from this software without specific prior written permission

--- 173 unchanged lines hidden (view full) ---

183 * The copy I found was dated 1984. This really tells you
184 * what the state machines are doing
185 * 2. In the current design, we only do one write at a time,
186 * though the hardware is capable of chaining and possibly
187 * even batching. The problem is that we only make one
188 * transmit buffer available in sram space.
189 */
190
191#define NWL 4
192#include "opt_wavelan.h"
193#include "opt_inet.h"
194
195#include <sys/param.h>
196#include <sys/systm.h>
197#include <sys/kernel.h>
198#include <sys/sockio.h>
199#include <sys/mbuf.h>
200#include <sys/socket.h>
201#include <sys/syslog.h>
191#include "opt_wavelan.h"
192#include "opt_inet.h"
193
194#include <sys/param.h>
195#include <sys/systm.h>
196#include <sys/kernel.h>
197#include <sys/sockio.h>
198#include <sys/mbuf.h>
199#include <sys/socket.h>
200#include <sys/syslog.h>
201#include <machine/bus.h>
202#include <machine/resource.h>
202#include <sys/bus.h>
203#include <sys/bus.h>
204#include <sys/rman.h>
203
204#include <sys/sysctl.h>
205
206#include <net/ethernet.h>
207#include <net/if.h>
205
206#include <sys/sysctl.h>
207
208#include <net/ethernet.h>
209#include <net/if.h>
210#include <net/if_arp.h>
208#include <net/if_dl.h>
209
210#ifdef INET
211#include <netinet/in.h>
212#include <netinet/in_systm.h>
213#include <netinet/ip.h>
214#include <netinet/if_ether.h>
215#endif
216
217#include <net/bpf.h>
211#include <net/if_dl.h>
212
213#ifdef INET
214#include <netinet/in.h>
215#include <netinet/in_systm.h>
216#include <netinet/ip.h>
217#include <netinet/if_ether.h>
218#endif
219
220#include <net/bpf.h>
218#include <i386/isa/isa_device.h>
221#include <isa/isavar.h>
219#include <i386/isa/ic/if_wl_i82586.h> /* Definitions for the Intel chip */
220
221/* was 1000 in original, fed to DELAY(x) */
222#define DELAYCONST 1000
223#include <dev/wl/if_wl.h>
224#include <machine/if_wl_wavelan.h>
225
222#include <i386/isa/ic/if_wl_i82586.h> /* Definitions for the Intel chip */
223
224/* was 1000 in original, fed to DELAY(x) */
225#define DELAYCONST 1000
226#include <dev/wl/if_wl.h>
227#include <machine/if_wl_wavelan.h>
228
226#ifndef COMPAT_OLDISA
227#error "The wl device requires the old isa compatibility shims"
228#endif
229
230static char t_packet[ETHERMTU + sizeof(struct ether_header) + sizeof(long)];
231
232struct wl_softc{
233 struct arpcom wl_ac; /* Ethernet common part */
234#define wl_if wl_ac.ac_if /* network visible interface */
235#define wl_addr wl_ac.ac_enaddr /* hardware address */
236 u_char psa[0x40];
237 u_char nwid[2]; /* current radio modem nwid */
238 short base;
239 short unit;
240 int flags;
241 int tbusy; /* flag to determine if xmit is busy */
242 u_short begin_fd;
243 u_short end_fd;
244 u_short end_rbd;
245 u_short hacr; /* latest host adapter CR command */
246 short mode;
247 u_char chan24; /* 2.4 Gz: channel number/EEPROM Area # */
248 u_short freq24; /* 2.4 Gz: resulting frequency */
229static char t_packet[ETHERMTU + sizeof(struct ether_header) + sizeof(long)];
230
231struct wl_softc{
232 struct arpcom wl_ac; /* Ethernet common part */
233#define wl_if wl_ac.ac_if /* network visible interface */
234#define wl_addr wl_ac.ac_enaddr /* hardware address */
235 u_char psa[0x40];
236 u_char nwid[2]; /* current radio modem nwid */
237 short base;
238 short unit;
239 int flags;
240 int tbusy; /* flag to determine if xmit is busy */
241 u_short begin_fd;
242 u_short end_fd;
243 u_short end_rbd;
244 u_short hacr; /* latest host adapter CR command */
245 short mode;
246 u_char chan24; /* 2.4 Gz: channel number/EEPROM Area # */
247 u_short freq24; /* 2.4 Gz: resulting frequency */
249 struct callout_handle watchdog_ch;
248 int rid_ioport;
249 int rid_irq;
250 struct resource *res_ioport;
251 struct resource *res_irq;
252 void *intr_cookie;
253 bus_space_tag_t bt;
254 bus_space_handle_t bh;
255 struct callout_handle watchdog_ch;
250#ifdef WLCACHE
251 int w_sigitems; /* number of cached entries */
252 /* array of cache entries */
253 struct w_sigcache w_sigcache[ MAXCACHEITEMS ];
254 int w_nextcache; /* next free cache entry */
255 int w_wrapindex; /* next "free" cache entry */
256#endif
257};
256#ifdef WLCACHE
257 int w_sigitems; /* number of cached entries */
258 /* array of cache entries */
259 struct w_sigcache w_sigcache[ MAXCACHEITEMS ];
260 int w_nextcache; /* next free cache entry */
261 int w_wrapindex; /* next "free" cache entry */
262#endif
263};
258static struct wl_softc wl_softc[NWL];
259
264
260#define WLSOFTC(unit) ((struct wl_softc *)(&wl_softc[unit]))
265static int wlprobe(device_t);
266static int wlattach(device_t);
267static int wldetach(device_t);
261
268
262static int wlprobe(struct isa_device *);
263static int wlattach(struct isa_device *);
269static device_method_t wl_methods[] = {
270 DEVMETHOD(device_probe, wlprobe),
271 DEVMETHOD(device_attach, wlattach),
272 DEVMETHOD(device_detach, wldetach),
273 { 0, 0}
274};
264
275
265struct isa_driver wldriver = {
266 INTR_TYPE_NET,
267 wlprobe,
268 wlattach,
276static driver_t wl_driver = {
269 "wl",
277 "wl",
270 0
278 wl_methods,
279 sizeof (struct wl_softc)
271};
280};
272COMPAT_ISA_DRIVER(wl, wldriver);
273
281
282devclass_t wl_devclass;
283DRIVER_MODULE(wl, isa, wl_driver, wl_devclass, 0, 0);
284MODULE_DEPEND(wl, isa, 1, 1, 1);
285MODULE_DEPEND(wl, ether, 1, 1, 1);
286
287static struct isa_pnp_id wl_ids[] = {
288 {0, NULL}
289};
290
274/*
275 * XXX The Wavelan appears to be prone to dropping stuff if you talk to
276 * it too fast. This disgusting hack inserts a delay after each packet
277 * is queued which helps avoid this behaviour on fast systems.
278 */
279static int wl_xmit_delay = 250;
280SYSCTL_INT(_machdep, OID_AUTO, wl_xmit_delay, CTLFLAG_RW, &wl_xmit_delay, 0, "");
281

--- 14 unchanged lines hidden (view full) ---

296SYSCTL_INT(_machdep, OID_AUTO, wl_xmit_watch, CTLFLAG_RW, &xmt_watch, 0, "");
297
298/*
299 * Collect SNR statistics
300 */
301static int gathersnr = 0;
302SYSCTL_INT(_machdep, OID_AUTO, wl_gather_snr, CTLFLAG_RW, &gathersnr, 0, "");
303
291/*
292 * XXX The Wavelan appears to be prone to dropping stuff if you talk to
293 * it too fast. This disgusting hack inserts a delay after each packet
294 * is queued which helps avoid this behaviour on fast systems.
295 */
296static int wl_xmit_delay = 250;
297SYSCTL_INT(_machdep, OID_AUTO, wl_xmit_delay, CTLFLAG_RW, &wl_xmit_delay, 0, "");
298

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313SYSCTL_INT(_machdep, OID_AUTO, wl_xmit_watch, CTLFLAG_RW, &xmt_watch, 0, "");
314
315/*
316 * Collect SNR statistics
317 */
318static int gathersnr = 0;
319SYSCTL_INT(_machdep, OID_AUTO, wl_gather_snr, CTLFLAG_RW, &gathersnr, 0, "");
320
321static int wl_allocate_resources(device_t device);
322static int wl_deallocate_resources(device_t device);
304static void wlstart(struct ifnet *ifp);
305static void wlinit(void *xsc);
306static int wlioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
307static timeout_t wlwatchdog;
323static void wlstart(struct ifnet *ifp);
324static void wlinit(void *xsc);
325static int wlioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
326static timeout_t wlwatchdog;
308static ointhand2_t wlintr;
309static void wlxmt(int unt, struct mbuf *m);
310static int wldiag(int unt);
311static int wlconfig(int unit);
312static int wlcmd(int unit, char *str);
313static void wlmmcstat(int unit);
314static u_short wlbldru(int unit);
327static void wlintr(void *arg);
328static void wlxmt(struct wl_softc *sc, struct mbuf *m);
329static int wldiag(struct wl_softc *sc);
330static int wlconfig(struct wl_softc *sc);
331static int wlcmd(struct wl_softc *sc, char *str);
332static void wlmmcstat(struct wl_softc *sc);
333static u_short wlbldru(struct wl_softc *sc);
315static u_short wlmmcread(u_int base, u_short reg);
334static u_short wlmmcread(u_int base, u_short reg);
316static void wlinitmmc(int unit);
317static int wlhwrst(int unit);
318static void wlrustrt(int unit);
319static void wlbldcu(int unit);
320static int wlack(int unit);
321static int wlread(int unit, u_short fd_p);
322static void getsnr(int unit);
323static void wlrcv(int unit);
324static int wlrequeue(int unit, u_short fd_p);
325static void wlsftwsleaze(u_short *countp, u_char **mb_pp, struct mbuf **tm_pp, int unit);
326static void wlhdwsleaze(u_short *countp, u_char **mb_pp, struct mbuf **tm_pp, int unit);
335static void wlinitmmc(struct wl_softc *sc);
336static int wlhwrst(struct wl_softc *sc);
337static void wlrustrt(struct wl_softc *sc);
338static void wlbldcu(struct wl_softc *sc);
339static int wlack(struct wl_softc *sc);
340static int wlread(struct wl_softc *sc, u_short fd_p);
341static void getsnr(struct wl_softc *sc);
342static void wlrcv(struct wl_softc *sc);
343static int wlrequeue(struct wl_softc *sc, u_short fd_p);
344static void wlsftwsleaze(u_short *countp, u_char **mb_pp, struct mbuf **tm_pp, struct wl_softc *sc);
345static void wlhdwsleaze(u_short *countp, u_char **mb_pp, struct mbuf **tm_pp, struct wl_softc *sc);
327#ifdef WLDEBUG
346#ifdef WLDEBUG
328static void wltbd(int unit);
347static void wltbd(struct wl_softc *sc);
329#endif
330static void wlgetpsa(int base, u_char *buf);
348#endif
349static void wlgetpsa(int base, u_char *buf);
331static void wlsetpsa(int unit);
350static void wlsetpsa(struct wl_softc *sc);
332static u_short wlpsacrc(u_char *buf);
351static u_short wlpsacrc(u_char *buf);
333static void wldump(int unit);
352static void wldump(struct wl_softc *sc);
334#ifdef WLCACHE
353#ifdef WLCACHE
335static void wl_cache_store(int, int, struct ether_header *, struct mbuf *);
336static void wl_cache_zero(int unit);
354static void wl_cache_store(struct wl_softc *, int, struct ether_header *, struct mbuf *);
355static void wl_cache_zero(struct wl_softc *sc);
337#endif
338
339/* array for maping irq numbers to values for the irq parameter register */
340static int irqvals[16] = {
341 0, 0, 0, 0x01, 0x02, 0x04, 0, 0x08, 0, 0, 0x10, 0x20, 0x40, 0, 0, 0x80
342};
343/* mask of valid IRQs */
344#define WL_IRQS (IRQ3|IRQ4|IRQ5|IRQ7|IRQ10|IRQ11|IRQ12|IRQ15)

--- 10 unchanged lines hidden (view full) ---

355 * code expects to see a successful return from the probe routine before
356 * attach will be called.
357 *
358 * input : address device is mapped to, and unit # being checked
359 * output : a '1' is returned if the board exists, and a 0 otherwise
360 *
361 */
362static int
356#endif
357
358/* array for maping irq numbers to values for the irq parameter register */
359static int irqvals[16] = {
360 0, 0, 0, 0x01, 0x02, 0x04, 0, 0x08, 0, 0, 0x10, 0x20, 0x40, 0, 0, 0x80
361};
362/* mask of valid IRQs */
363#define WL_IRQS (IRQ3|IRQ4|IRQ5|IRQ7|IRQ10|IRQ11|IRQ12|IRQ15)

--- 10 unchanged lines hidden (view full) ---

374 * code expects to see a successful return from the probe routine before
375 * attach will be called.
376 *
377 * input : address device is mapped to, and unit # being checked
378 * output : a '1' is returned if the board exists, and a 0 otherwise
379 *
380 */
381static int
363wlprobe(struct isa_device *id)
382wlprobe(device_t device)
364{
383{
365 struct wl_softc *sc = &wl_softc[id->id_unit];
366 short base = id->id_iobase;
384 struct wl_softc *sc;
385 short base;
367 char *str = "wl%d: board out of range [0..%d]\n";
368 u_char inbuf[100];
386 char *str = "wl%d: board out of range [0..%d]\n";
387 u_char inbuf[100];
369 unsigned long oldpri;
370 int irq;
388 unsigned long junk, oldpri, sirq;
389 int error, irq;
371
390
391 error = ISA_PNP_PROBE(device_get_parent(device), device, wl_ids);
392 if (error == ENXIO || error == 0)
393 return (error);
394
395 sc = device_get_softc(device);
396 error = wl_allocate_resources(device);
397 if (error)
398 goto errexit;
399
400 base = rman_get_start(sc->res_ioport);
401
372 /* TBD. not true.
373 * regular CMD() will not work, since no softc yet
374 */
375#define PCMD(base, hacr) outw((base), (hacr))
376
377 oldpri = splimp();
378 PCMD(base, HACR_RESET); /* reset the board */
379 DELAY(DELAYCONST); /* >> 4 clocks at 6MHz */

--- 5 unchanged lines hidden (view full) ---

385 PCMD(base, HACR_DEFAULT);
386 PCMD(base, HACR_DEFAULT);
387 outw(PIOR1(base), 0); /* go to beginning of RAM */
388 outsw(PIOP1(base), str, strlen(str)/2+1); /* write string */
389
390 outw(PIOR1(base), 0); /* rewind */
391 insw(PIOP1(base), inbuf, strlen(str)/2+1); /* read result */
392
402 /* TBD. not true.
403 * regular CMD() will not work, since no softc yet
404 */
405#define PCMD(base, hacr) outw((base), (hacr))
406
407 oldpri = splimp();
408 PCMD(base, HACR_RESET); /* reset the board */
409 DELAY(DELAYCONST); /* >> 4 clocks at 6MHz */

--- 5 unchanged lines hidden (view full) ---

415 PCMD(base, HACR_DEFAULT);
416 PCMD(base, HACR_DEFAULT);
417 outw(PIOR1(base), 0); /* go to beginning of RAM */
418 outsw(PIOP1(base), str, strlen(str)/2+1); /* write string */
419
420 outw(PIOR1(base), 0); /* rewind */
421 insw(PIOP1(base), inbuf, strlen(str)/2+1); /* read result */
422
393 if (bcmp(str, inbuf, strlen(str)))
394 return(0);
423 if (bcmp(str, inbuf, strlen(str))) {
424 error = ENXIO;
425 goto errexit;
426 }
395
396 sc->chan24 = 0; /* 2.4 Gz: config channel */
397 sc->freq24 = 0; /* 2.4 Gz: frequency */
398
399 /* read the PSA from the board into temporary storage */
400 wlgetpsa(base, inbuf);
401
402 /* We read the IRQ value from the PSA on the board. */
403 for (irq = 15; irq >= 0; irq--)
404 if (irqvals[irq] == inbuf[WLPSA_IRQNO])
405 break;
406 if ((irq == 0) || (irqvals[irq] == 0)){
427
428 sc->chan24 = 0; /* 2.4 Gz: config channel */
429 sc->freq24 = 0; /* 2.4 Gz: frequency */
430
431 /* read the PSA from the board into temporary storage */
432 wlgetpsa(base, inbuf);
433
434 /* We read the IRQ value from the PSA on the board. */
435 for (irq = 15; irq >= 0; irq--)
436 if (irqvals[irq] == inbuf[WLPSA_IRQNO])
437 break;
438 if ((irq == 0) || (irqvals[irq] == 0)){
407 printf("wl%d: PSA corrupt (invalid IRQ value)\n", id->id_unit);
408 id->id_irq = 0; /* no interrupt */
439 printf("wl%d: PSA corrupt (invalid IRQ value)\n",
440 device_get_unit(device));
409 } else {
410 /*
411 * If the IRQ requested by the PSA is already claimed by another
412 * device, the board won't work, but the user can still access the
413 * driver to change the IRQ.
414 */
441 } else {
442 /*
443 * If the IRQ requested by the PSA is already claimed by another
444 * device, the board won't work, but the user can still access the
445 * driver to change the IRQ.
446 */
415 id->id_irq = (1<<irq); /* use IRQ from PSA */
447 if (bus_get_resource(device, SYS_RES_IRQ, 0, &sirq, &junk))
448 goto errexit;
449 if (irq != (int)sirq)
450 printf("wl%d: board is configured for interrupt %d\n",
451 device_get_unit(device), irq);
416 }
452 }
417 return(16);
453 wl_deallocate_resources(device);
454 return (0);
455
456errexit:
457 wl_deallocate_resources(device);
458 return (error);
418}
419
420
421/*
422 * wlattach:
423 *
424 * This function attaches a WaveLAN board to the "system". The rest of
425 * runtime structures are initialized here (this routine is called after
426 * a successful probe of the board). Once the ethernet address is read
427 * and stored, the board's ifnet structure is attached and readied.
428 *
429 * input : isa_dev structure setup in autoconfig
430 * output : board structs and ifnet is setup
431 *
432 */
433static int
459}
460
461
462/*
463 * wlattach:
464 *
465 * This function attaches a WaveLAN board to the "system". The rest of
466 * runtime structures are initialized here (this routine is called after
467 * a successful probe of the board). Once the ethernet address is read
468 * and stored, the board's ifnet structure is attached and readied.
469 *
470 * input : isa_dev structure setup in autoconfig
471 * output : board structs and ifnet is setup
472 *
473 */
474static int
434wlattach(struct isa_device *id)
475wlattach(device_t device)
435{
476{
436 struct wl_softc *sc = (struct wl_softc *) &wl_softc[id->id_unit];
437 short base = id->id_iobase;
438 int i,j;
439 u_char unit = id->id_unit;
440 struct ifnet *ifp = &sc->wl_if;
477 struct wl_softc *sc;
478 short base;
479 int error, i, j;
480 int unit;
481 struct ifnet *ifp;
441
482
483 sc = device_get_softc(device);
484 ifp = &sc->wl_if;
485
486 error = wl_allocate_resources(device);
487 if (error) {
488 wl_deallocate_resources(device);
489 return (ENXIO);
490 }
491
492 base = rman_get_start(sc->res_ioport);
493 unit = device_get_unit(device);
494
442#ifdef WLDEBUG
443 printf("wlattach: base %x, unit %d\n", base, unit);
444#endif
495#ifdef WLDEBUG
496 printf("wlattach: base %x, unit %d\n", base, unit);
497#endif
445 id->id_ointr = wlintr;
498
446 sc->base = base;
447 sc->unit = unit;
448 sc->flags = 0;
449 sc->mode = 0;
450 sc->hacr = HACR_RESET;
451 callout_handle_init(&sc->watchdog_ch);
499 sc->base = base;
500 sc->unit = unit;
501 sc->flags = 0;
502 sc->mode = 0;
503 sc->hacr = HACR_RESET;
504 callout_handle_init(&sc->watchdog_ch);
452 CMD(unit); /* reset the board */
505 CMD(sc); /* reset the board */
453 DELAY(DELAYCONST); /* >> 4 clocks at 6MHz */
454
455 /* clear reset command and set PIO#2 in parameter access mode */
456 sc->hacr = (HACR_DEFAULT & ~HACR_16BITS);
506 DELAY(DELAYCONST); /* >> 4 clocks at 6MHz */
507
508 /* clear reset command and set PIO#2 in parameter access mode */
509 sc->hacr = (HACR_DEFAULT & ~HACR_16BITS);
457 CMD(unit);
510 CMD(sc);
458
459 /* Read the PSA from the board for our later reference */
460 wlgetpsa(base, sc->psa);
461
462 /* fetch NWID */
463 sc->nwid[0] = sc->psa[WLPSA_NWID];
464 sc->nwid[1] = sc->psa[WLPSA_NWID+1];
465
466 /* fetch MAC address - decide which one first */
467 if (sc->psa[WLPSA_MACSEL] & 1)
468 j = WLPSA_LOCALMAC;
469 else
470 j = WLPSA_UNIMAC;
471 for (i=0; i < WAVELAN_ADDR_SIZE; ++i)
472 sc->wl_addr[i] = sc->psa[j + i];
473
474 /* enter normal 16 bit mode operation */
475 sc->hacr = HACR_DEFAULT;
511
512 /* Read the PSA from the board for our later reference */
513 wlgetpsa(base, sc->psa);
514
515 /* fetch NWID */
516 sc->nwid[0] = sc->psa[WLPSA_NWID];
517 sc->nwid[1] = sc->psa[WLPSA_NWID+1];
518
519 /* fetch MAC address - decide which one first */
520 if (sc->psa[WLPSA_MACSEL] & 1)
521 j = WLPSA_LOCALMAC;
522 else
523 j = WLPSA_UNIMAC;
524 for (i=0; i < WAVELAN_ADDR_SIZE; ++i)
525 sc->wl_addr[i] = sc->psa[j + i];
526
527 /* enter normal 16 bit mode operation */
528 sc->hacr = HACR_DEFAULT;
476 CMD(unit);
529 CMD(sc);
477
530
478 wlinitmmc(unit);
531 wlinitmmc(sc);
479 outw(PIOR1(base), OFFSET_SCB + 8); /* address of scb_crcerrs */
480 outw(PIOP1(base), 0); /* clear scb_crcerrs */
481 outw(PIOP1(base), 0); /* clear scb_alnerrs */
482 outw(PIOP1(base), 0); /* clear scb_rscerrs */
483 outw(PIOP1(base), 0); /* clear scb_ovrnerrs */
484
485 bzero(ifp, sizeof(ifp));
486 ifp->if_softc = sc;
532 outw(PIOR1(base), OFFSET_SCB + 8); /* address of scb_crcerrs */
533 outw(PIOP1(base), 0); /* clear scb_crcerrs */
534 outw(PIOP1(base), 0); /* clear scb_alnerrs */
535 outw(PIOP1(base), 0); /* clear scb_rscerrs */
536 outw(PIOP1(base), 0); /* clear scb_ovrnerrs */
537
538 bzero(ifp, sizeof(ifp));
539 ifp->if_softc = sc;
487 ifp->if_unit = id->id_unit;
488 ifp->if_mtu = WAVELAN_MTU;
489 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
490#ifdef WLDEBUG
491 ifp->if_flags |= IFF_DEBUG;
492#endif
493#if MULTICAST
494 ifp->if_flags |= IFF_MULTICAST;
495#endif /* MULTICAST */
496 ifp->if_name = "wl";
497 ifp->if_unit = unit;
498 ifp->if_init = wlinit;
499 ifp->if_output = ether_output;
500 ifp->if_start = wlstart;
501 ifp->if_ioctl = wlioctl;
502 ifp->if_timer = 0; /* paranoia */
540 ifp->if_mtu = WAVELAN_MTU;
541 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
542#ifdef WLDEBUG
543 ifp->if_flags |= IFF_DEBUG;
544#endif
545#if MULTICAST
546 ifp->if_flags |= IFF_MULTICAST;
547#endif /* MULTICAST */
548 ifp->if_name = "wl";
549 ifp->if_unit = unit;
550 ifp->if_init = wlinit;
551 ifp->if_output = ether_output;
552 ifp->if_start = wlstart;
553 ifp->if_ioctl = wlioctl;
554 ifp->if_timer = 0; /* paranoia */
555 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
503 /* no entries
504 ifp->if_watchdog
505 ifp->if_done
506 ifp->if_reset
507 */
508 ether_ifattach(ifp, &sc->wl_addr[0]);
509
510 bcopy(&sc->wl_addr[0], sc->wl_ac.ac_enaddr, WAVELAN_ADDR_SIZE);
511 printf("%s%d: address %6D, NWID 0x%02x%02x", ifp->if_name, ifp->if_unit,
512 sc->wl_ac.ac_enaddr, ":", sc->nwid[0], sc->nwid[1]);
513 if (sc->freq24)
514 printf(", Freq %d MHz",sc->freq24); /* 2.4 Gz */
515 printf("\n"); /* 2.4 Gz */
516
556 /* no entries
557 ifp->if_watchdog
558 ifp->if_done
559 ifp->if_reset
560 */
561 ether_ifattach(ifp, &sc->wl_addr[0]);
562
563 bcopy(&sc->wl_addr[0], sc->wl_ac.ac_enaddr, WAVELAN_ADDR_SIZE);
564 printf("%s%d: address %6D, NWID 0x%02x%02x", ifp->if_name, ifp->if_unit,
565 sc->wl_ac.ac_enaddr, ":", sc->nwid[0], sc->nwid[1]);
566 if (sc->freq24)
567 printf(", Freq %d MHz",sc->freq24); /* 2.4 Gz */
568 printf("\n"); /* 2.4 Gz */
569
570 bus_setup_intr(device, sc->res_irq, INTR_TYPE_NET, wlintr, sc, &sc->intr_cookie);
517
518 if (bootverbose)
571
572 if (bootverbose)
519 wldump(unit);
520 return(1);
573 wldump(sc);
574 return (0);
521}
522
575}
576
577static int
578wldetach(device_t device)
579{
580 struct wl_softc *sc = device_get_softc(device);
581 device_t parent = device_get_parent(device);
582 struct ifnet *ifp;
583
584 ifp = &sc->wl_if;
585 ether_ifdetach(ifp);
586
587 /* reset the board */
588 sc->hacr = HACR_RESET;
589 CMD(sc);
590 sc->hacr = HACR_DEFAULT;
591 CMD(sc);
592
593 if (sc->intr_cookie != NULL) {
594 BUS_TEARDOWN_INTR(parent, device, sc->res_irq, sc->intr_cookie);
595 sc->intr_cookie = NULL;
596 }
597
598 bus_generic_detach(device);
599 wl_deallocate_resources(device);
600 return (0);
601}
602
603static int
604wl_allocate_resources(device_t device)
605{
606 struct wl_softc *sc = device_get_softc(device);
607 int ports = 16; /* Number of ports */
608
609 sc->res_ioport = bus_alloc_resource(device, SYS_RES_IOPORT,
610 &sc->rid_ioport, 0ul, ~0ul, ports, RF_ACTIVE);
611 if (sc->res_ioport == NULL)
612 goto errexit;
613
614 sc->res_irq = bus_alloc_resource(device, SYS_RES_IRQ,
615 &sc->rid_irq, 0ul, ~0ul, 1, RF_SHAREABLE|RF_ACTIVE);
616 if (sc->res_irq == NULL)
617 goto errexit;
618 return (0);
619
620errexit:
621 wl_deallocate_resources(device);
622 return (ENXIO);
623}
624
625static int
626wl_deallocate_resources(device_t device)
627{
628 struct wl_softc *sc = device_get_softc(device);
629
630 if (sc->res_irq != 0) {
631 bus_deactivate_resource(device, SYS_RES_IRQ,
632 sc->rid_irq, sc->res_irq);
633 bus_release_resource(device, SYS_RES_IRQ,
634 sc->rid_irq, sc->res_irq);
635 sc->res_irq = 0;
636 }
637 if (sc->res_ioport != 0) {
638 bus_deactivate_resource(device, SYS_RES_IOPORT,
639 sc->rid_ioport, sc->res_ioport);
640 bus_release_resource(device, SYS_RES_IOPORT,
641 sc->rid_ioport, sc->res_ioport);
642 sc->res_ioport = 0;
643 }
644 return (0);
645}
646
523/*
524 * Print out interesting information about the 82596.
525 */
526static void
647/*
648 * Print out interesting information about the 82596.
649 */
650static void
527wldump(int unit)
651wldump(struct wl_softc *sc)
528{
652{
529 struct wl_softc *sp = WLSOFTC(unit);
530 int base = sp->base;
653 int base = sc->base;
531 int i;
532
533 printf("hasr %04x\n", inw(HASR(base)));
534
535 printf("scb at %04x:\n ", OFFSET_SCB);
536 outw(PIOR1(base), OFFSET_SCB);
537 for (i = 0; i < 8; i++)
538 printf("%04x ", inw(PIOP1(base)));

--- 9 unchanged lines hidden (view full) ---

548 outw(PIOR1(base), OFFSET_TBD);
549 for (i = 0; i < 4; i++)
550 printf("%04x ", inw(PIOP1(base)));
551 printf("\n");
552}
553
554/* Initialize the Modem Management Controller */
555static void
654 int i;
655
656 printf("hasr %04x\n", inw(HASR(base)));
657
658 printf("scb at %04x:\n ", OFFSET_SCB);
659 outw(PIOR1(base), OFFSET_SCB);
660 for (i = 0; i < 8; i++)
661 printf("%04x ", inw(PIOP1(base)));

--- 9 unchanged lines hidden (view full) ---

671 outw(PIOR1(base), OFFSET_TBD);
672 for (i = 0; i < 4; i++)
673 printf("%04x ", inw(PIOP1(base)));
674 printf("\n");
675}
676
677/* Initialize the Modem Management Controller */
678static void
556wlinitmmc(int unit)
679wlinitmmc(struct wl_softc *sc)
557{
680{
558 struct wl_softc *sp = WLSOFTC(unit);
559 int base = sp->base;
681 int base = sc->base;
560 int configured;
682 int configured;
561 int mode = sp->mode;
683 int mode = sc->mode;
562 int i; /* 2.4 Gz */
563
564 /* enter 8 bit operation */
684 int i; /* 2.4 Gz */
685
686 /* enter 8 bit operation */
565 sp->hacr = (HACR_DEFAULT & ~HACR_16BITS);
566 CMD(unit);
687 sc->hacr = (HACR_DEFAULT & ~HACR_16BITS);
688 CMD(sc);
567
689
568 configured = sp->psa[WLPSA_CONFIGURED] & 1;
690 configured = sc->psa[WLPSA_CONFIGURED] & 1;
569
570 /*
571 * Set default modem control parameters. Taken from NCR document
572 * 407-0024326 Rev. A
573 */
574 MMC_WRITE(MMC_JABBER_ENABLE, 0x01);
575 MMC_WRITE(MMC_ANTEN_SEL, 0x02);
576 MMC_WRITE(MMC_IFS, 0x20);
577 MMC_WRITE(MMC_MOD_DELAY, 0x04);
578 MMC_WRITE(MMC_JAM_TIME, 0x38);
579 MMC_WRITE(MMC_DECAY_PRM, 0x00); /* obsolete ? */
580 MMC_WRITE(MMC_DECAY_UPDAT_PRM, 0x00);
581 if (!configured) {
582 MMC_WRITE(MMC_LOOPT_SEL, 0x00);
691
692 /*
693 * Set default modem control parameters. Taken from NCR document
694 * 407-0024326 Rev. A
695 */
696 MMC_WRITE(MMC_JABBER_ENABLE, 0x01);
697 MMC_WRITE(MMC_ANTEN_SEL, 0x02);
698 MMC_WRITE(MMC_IFS, 0x20);
699 MMC_WRITE(MMC_MOD_DELAY, 0x04);
700 MMC_WRITE(MMC_JAM_TIME, 0x38);
701 MMC_WRITE(MMC_DECAY_PRM, 0x00); /* obsolete ? */
702 MMC_WRITE(MMC_DECAY_UPDAT_PRM, 0x00);
703 if (!configured) {
704 MMC_WRITE(MMC_LOOPT_SEL, 0x00);
583 if (sp->psa[WLPSA_COMPATNO] & 1) {
705 if (sc->psa[WLPSA_COMPATNO] & 1) {
584 MMC_WRITE(MMC_THR_PRE_SET, 0x01); /* 0x04 for AT and 0x01 for MCA */
585 } else {
586 MMC_WRITE(MMC_THR_PRE_SET, 0x04); /* 0x04 for AT and 0x01 for MCA */
587 }
588 MMC_WRITE(MMC_QUALITY_THR, 0x03);
589 } else {
590 /* use configuration defaults from parameter storage area */
706 MMC_WRITE(MMC_THR_PRE_SET, 0x01); /* 0x04 for AT and 0x01 for MCA */
707 } else {
708 MMC_WRITE(MMC_THR_PRE_SET, 0x04); /* 0x04 for AT and 0x01 for MCA */
709 }
710 MMC_WRITE(MMC_QUALITY_THR, 0x03);
711 } else {
712 /* use configuration defaults from parameter storage area */
591 if (sp->psa[WLPSA_NWIDENABLE] & 1) {
713 if (sc->psa[WLPSA_NWIDENABLE] & 1) {
592 if ((mode & (MOD_PROM | MOD_ENAL)) && wl_ignore_nwid) {
593 MMC_WRITE(MMC_LOOPT_SEL, 0x40);
594 } else {
595 MMC_WRITE(MMC_LOOPT_SEL, 0x00);
596 }
597 } else {
598 MMC_WRITE(MMC_LOOPT_SEL, 0x40); /* disable network id check */
599 }
714 if ((mode & (MOD_PROM | MOD_ENAL)) && wl_ignore_nwid) {
715 MMC_WRITE(MMC_LOOPT_SEL, 0x40);
716 } else {
717 MMC_WRITE(MMC_LOOPT_SEL, 0x00);
718 }
719 } else {
720 MMC_WRITE(MMC_LOOPT_SEL, 0x40); /* disable network id check */
721 }
600 MMC_WRITE(MMC_THR_PRE_SET, sp->psa[WLPSA_THRESH]);
601 MMC_WRITE(MMC_QUALITY_THR, sp->psa[WLPSA_QUALTHRESH]);
722 MMC_WRITE(MMC_THR_PRE_SET, sc->psa[WLPSA_THRESH]);
723 MMC_WRITE(MMC_QUALITY_THR, sc->psa[WLPSA_QUALTHRESH]);
602 }
603 MMC_WRITE(MMC_FREEZE, 0x00);
604 MMC_WRITE(MMC_ENCR_ENABLE, 0x00);
605
724 }
725 MMC_WRITE(MMC_FREEZE, 0x00);
726 MMC_WRITE(MMC_ENCR_ENABLE, 0x00);
727
606 MMC_WRITE(MMC_NETW_ID_L,sp->nwid[1]); /* set NWID */
607 MMC_WRITE(MMC_NETW_ID_H,sp->nwid[0]);
728 MMC_WRITE(MMC_NETW_ID_L,sc->nwid[1]); /* set NWID */
729 MMC_WRITE(MMC_NETW_ID_H,sc->nwid[0]);
608
609 /* enter normal 16 bit mode operation */
730
731 /* enter normal 16 bit mode operation */
610 sp->hacr = HACR_DEFAULT;
611 CMD(unit);
612 CMD(unit); /* virtualpc1 needs this! */
732 sc->hacr = HACR_DEFAULT;
733 CMD(sc);
734 CMD(sc); /* virtualpc1 needs this! */
613
735
614 if (sp->psa[WLPSA_COMPATNO]== /* 2.4 Gz: half-card ver */
736 if (sc->psa[WLPSA_COMPATNO]== /* 2.4 Gz: half-card ver */
615 WLPSA_COMPATNO_WL24B) { /* 2.4 Gz */
737 WLPSA_COMPATNO_WL24B) { /* 2.4 Gz */
616 i=sp->chan24<<4; /* 2.4 Gz: position ch # */
738 i=sc->chan24<<4; /* 2.4 Gz: position ch # */
617 MMC_WRITE(MMC_EEADDR,i+0x0f); /* 2.4 Gz: named ch, wc=16 */
618 MMC_WRITE(MMC_EECTRL,MMC_EECTRL_DWLD+ /* 2.4 Gz: Download Synths */
619 MMC_EECTRL_EEOP_READ); /* 2.4 Gz: Read EEPROM */
620 for (i=0; i<1000; ++i) { /* 2.4 Gz: wait for download */
621 DELAY(40); /* 2.4 Gz */
622 if ((wlmmcread(base,MMC_EECTRLstat) /* 2.4 Gz: check DWLD and */
623 &(MMC_EECTRLstat_DWLD /* 2.4 Gz: EEBUSY */
624 +MMC_EECTRLstat_EEBUSY))==0) /* 2.4 Gz: */

--- 9 unchanged lines hidden (view full) ---

634 &(MMC_EECTRLstat_DWLD /* 2.4 Gz: EEBUSY */
635 +MMC_EECTRLstat_EEBUSY))==0) /* 2.4 Gz: */
636 break; /* 2.4 Gz: download finished */
637 } /* 2.4 Gz */
638 if (i==1000) printf("wl: xmit pwr load failed\n"); /* 2.4 Gz */
639 MMC_WRITE(MMC_ANALCTRL, /* 2.4 Gz: EXT ant+polarity */
640 MMC_ANALCTRL_ANTPOL + /* 2.4 Gz: */
641 MMC_ANALCTRL_EXTANT); /* 2.4 Gz: */
739 MMC_WRITE(MMC_EEADDR,i+0x0f); /* 2.4 Gz: named ch, wc=16 */
740 MMC_WRITE(MMC_EECTRL,MMC_EECTRL_DWLD+ /* 2.4 Gz: Download Synths */
741 MMC_EECTRL_EEOP_READ); /* 2.4 Gz: Read EEPROM */
742 for (i=0; i<1000; ++i) { /* 2.4 Gz: wait for download */
743 DELAY(40); /* 2.4 Gz */
744 if ((wlmmcread(base,MMC_EECTRLstat) /* 2.4 Gz: check DWLD and */
745 &(MMC_EECTRLstat_DWLD /* 2.4 Gz: EEBUSY */
746 +MMC_EECTRLstat_EEBUSY))==0) /* 2.4 Gz: */

--- 9 unchanged lines hidden (view full) ---

756 &(MMC_EECTRLstat_DWLD /* 2.4 Gz: EEBUSY */
757 +MMC_EECTRLstat_EEBUSY))==0) /* 2.4 Gz: */
758 break; /* 2.4 Gz: download finished */
759 } /* 2.4 Gz */
760 if (i==1000) printf("wl: xmit pwr load failed\n"); /* 2.4 Gz */
761 MMC_WRITE(MMC_ANALCTRL, /* 2.4 Gz: EXT ant+polarity */
762 MMC_ANALCTRL_ANTPOL + /* 2.4 Gz: */
763 MMC_ANALCTRL_EXTANT); /* 2.4 Gz: */
642 i=sp->chan24<<4; /* 2.4 Gz: position ch # */
764 i=sc->chan24<<4; /* 2.4 Gz: position ch # */
643 MMC_WRITE(MMC_EEADDR,i); /* 2.4 Gz: get frequency */
644 MMC_WRITE(MMC_EECTRL, /* 2.4 Gz: EEPROM read */
645 MMC_EECTRL_EEOP_READ); /* 2.4 Gz: */
646 DELAY(40); /* 2.4 Gz */
647 i = wlmmcread(base,MMC_EEDATALrv) /* 2.4 Gz: freq val */
648 + (wlmmcread(base,MMC_EEDATAHrv)<<8); /* 2.4 Gz */
765 MMC_WRITE(MMC_EEADDR,i); /* 2.4 Gz: get frequency */
766 MMC_WRITE(MMC_EECTRL, /* 2.4 Gz: EEPROM read */
767 MMC_EECTRL_EEOP_READ); /* 2.4 Gz: */
768 DELAY(40); /* 2.4 Gz */
769 i = wlmmcread(base,MMC_EEDATALrv) /* 2.4 Gz: freq val */
770 + (wlmmcread(base,MMC_EEDATAHrv)<<8); /* 2.4 Gz */
649 sp->freq24 = (i>>6)+2400; /* 2.4 Gz: save real freq */
771 sc->freq24 = (i>>6)+2400; /* 2.4 Gz: save real freq */
650 }
651}
652
653/*
654 * wlinit:
655 *
656 * Another routine that interfaces the "if" layer to this driver.
657 * Simply resets the structures that are used by "upper layers".

--- 13 unchanged lines hidden (view full) ---

671
672#ifdef WLDEBUG
673 if (sc->wl_if.if_flags & IFF_DEBUG)
674 printf("wl%d: entered wlinit()\n",sc->unit);
675#endif
676 if (TAILQ_FIRST(&ifp->if_addrhead) == (struct ifaddr *)0)
677 return;
678 oldpri = splimp();
772 }
773}
774
775/*
776 * wlinit:
777 *
778 * Another routine that interfaces the "if" layer to this driver.
779 * Simply resets the structures that are used by "upper layers".

--- 13 unchanged lines hidden (view full) ---

793
794#ifdef WLDEBUG
795 if (sc->wl_if.if_flags & IFF_DEBUG)
796 printf("wl%d: entered wlinit()\n",sc->unit);
797#endif
798 if (TAILQ_FIRST(&ifp->if_addrhead) == (struct ifaddr *)0)
799 return;
800 oldpri = splimp();
679 if ((stat = wlhwrst(sc->unit)) == TRUE) {
801 if ((stat = wlhwrst(sc)) == TRUE) {
680 sc->wl_if.if_flags |= IFF_RUNNING; /* same as DSF_RUNNING */
681 /*
682 * OACTIVE is used by upper-level routines
683 * and must be set
684 */
685 sc->wl_if.if_flags &= ~IFF_OACTIVE; /* same as tbusy below */
686
687 sc->flags |= DSF_RUNNING;

--- 13 unchanged lines hidden (view full) ---

701 * This routine resets the WaveLAN board that corresponds to the
702 * board number passed in.
703 *
704 * input : board number to do a hardware reset
705 * output : board is reset
706 *
707 */
708static int
802 sc->wl_if.if_flags |= IFF_RUNNING; /* same as DSF_RUNNING */
803 /*
804 * OACTIVE is used by upper-level routines
805 * and must be set
806 */
807 sc->wl_if.if_flags &= ~IFF_OACTIVE; /* same as tbusy below */
808
809 sc->flags |= DSF_RUNNING;

--- 13 unchanged lines hidden (view full) ---

823 * This routine resets the WaveLAN board that corresponds to the
824 * board number passed in.
825 *
826 * input : board number to do a hardware reset
827 * output : board is reset
828 *
829 */
830static int
709wlhwrst(int unit)
831wlhwrst(struct wl_softc *sc)
710{
832{
711 struct wl_softc *sc = WLSOFTC(unit);
712
713#ifdef WLDEBUG
714 if (sc->wl_if.if_flags & IFF_DEBUG)
833
834#ifdef WLDEBUG
835 if (sc->wl_if.if_flags & IFF_DEBUG)
715 printf("wl%d: entered wlhwrst()\n",unit);
836 printf("wl%d: entered wlhwrst()\n", sc->unit);
716#endif
717 sc->hacr = HACR_RESET;
837#endif
838 sc->hacr = HACR_RESET;
718 CMD(unit); /* reset the board */
839 CMD(sc); /* reset the board */
719
720 /* clear reset command and set PIO#1 in autoincrement mode */
721 sc->hacr = HACR_DEFAULT;
840
841 /* clear reset command and set PIO#1 in autoincrement mode */
842 sc->hacr = HACR_DEFAULT;
722 CMD(unit);
843 CMD(sc);
723
724#ifdef WLDEBUG
725 if (sc->wl_if.if_flags & IFF_DEBUG)
844
845#ifdef WLDEBUG
846 if (sc->wl_if.if_flags & IFF_DEBUG)
726 wlmmcstat(unit); /* Display MMC registers */
847 wlmmcstat(sc); /* Display MMC registers */
727#endif /* WLDEBUG */
848#endif /* WLDEBUG */
728 wlbldcu(unit); /* set up command unit structures */
849 wlbldcu(sc); /* set up command unit structures */
729
850
730 if (wldiag(unit) == 0)
851 if (wldiag(sc) == 0)
731 return(0);
732
852 return(0);
853
733 if (wlconfig(unit) == 0)
854 if (wlconfig(sc) == 0)
734 return(0);
735 /*
736 * insert code for loopback test here
737 */
855 return(0);
856 /*
857 * insert code for loopback test here
858 */
738 wlrustrt(unit); /* start receive unit */
859 wlrustrt(sc); /* start receive unit */
739
740 /* enable interrupts */
741 sc->hacr = (HACR_DEFAULT | HACR_INTRON);
860
861 /* enable interrupts */
862 sc->hacr = (HACR_DEFAULT | HACR_INTRON);
742 CMD(unit);
863 CMD(sc);
743
744 return(1);
745}
746
747/*
748 * wlbldcu:
749 *
750 * This function builds up the command unit structures. It inits
751 * the scp, iscp, scb, cb, tbd, and tbuf.
752 *
753 */
754static void
864
865 return(1);
866}
867
868/*
869 * wlbldcu:
870 *
871 * This function builds up the command unit structures. It inits
872 * the scp, iscp, scb, cb, tbd, and tbuf.
873 *
874 */
875static void
755wlbldcu(int unit)
876wlbldcu(struct wl_softc *sc)
756{
877{
757 struct wl_softc *sc = WLSOFTC(unit);
758 short base = sc->base;
759 scp_t scp;
760 iscp_t iscp;
761 scb_t scb;
762 ac_t cb;
763 tbd_t tbd;
878 short base = sc->base;
879 scp_t scp;
880 iscp_t iscp;
881 scb_t scb;
882 ac_t cb;
883 tbd_t tbd;
764 int i;
884 int i;
765
766 bzero(&scp, sizeof(scp));
767 scp.scp_sysbus = 0;
768 scp.scp_iscp = OFFSET_ISCP;
769 scp.scp_iscp_base = 0;
770 outw(PIOR1(base), OFFSET_SCP);
771 outsw(PIOP1(base), &scp, sizeof(scp_t)/2);
772

--- 11 unchanged lines hidden (view full) ---

784 scb.scb_rfa_offset = OFFSET_RU;
785 scb.scb_crcerrs = 0;
786 scb.scb_alnerrs = 0;
787 scb.scb_rscerrs = 0;
788 scb.scb_ovrnerrs = 0;
789 outw(PIOR1(base), OFFSET_SCB);
790 outsw(PIOP1(base), &scb, sizeof(scb_t)/2);
791
885
886 bzero(&scp, sizeof(scp));
887 scp.scp_sysbus = 0;
888 scp.scp_iscp = OFFSET_ISCP;
889 scp.scp_iscp_base = 0;
890 outw(PIOR1(base), OFFSET_SCP);
891 outsw(PIOP1(base), &scp, sizeof(scp_t)/2);
892

--- 11 unchanged lines hidden (view full) ---

904 scb.scb_rfa_offset = OFFSET_RU;
905 scb.scb_crcerrs = 0;
906 scb.scb_alnerrs = 0;
907 scb.scb_rscerrs = 0;
908 scb.scb_ovrnerrs = 0;
909 outw(PIOR1(base), OFFSET_SCB);
910 outsw(PIOP1(base), &scb, sizeof(scb_t)/2);
911
792 SET_CHAN_ATTN(unit);
912 SET_CHAN_ATTN(sc);
793
794 outw(PIOR0(base), OFFSET_ISCP + 0); /* address of iscp_busy */
795 for (i = 1000000; inw(PIOP0(base)) && (i-- > 0); )
796 continue;
797 if (i <= 0)
913
914 outw(PIOR0(base), OFFSET_ISCP + 0); /* address of iscp_busy */
915 for (i = 1000000; inw(PIOP0(base)) && (i-- > 0); )
916 continue;
917 if (i <= 0)
798 printf("wl%d bldcu(): iscp_busy timeout.\n", unit);
918 printf("wl%d bldcu(): iscp_busy timeout.\n", sc->unit);
799 outw(PIOR0(base), OFFSET_SCB + 0); /* address of scb_status */
800 for (i = STATUS_TRIES; i-- > 0; ) {
801 if (inw(PIOP0(base)) == (SCB_SW_CX|SCB_SW_CNA))
802 break;
803 }
804 if (i <= 0)
919 outw(PIOR0(base), OFFSET_SCB + 0); /* address of scb_status */
920 for (i = STATUS_TRIES; i-- > 0; ) {
921 if (inw(PIOP0(base)) == (SCB_SW_CX|SCB_SW_CNA))
922 break;
923 }
924 if (i <= 0)
805 printf("wl%d bldcu(): not ready after reset.\n", unit);
806 wlack(unit);
925 printf("wl%d bldcu(): not ready after reset.\n", sc->unit);
926 wlack(sc);
807
808 cb.ac_status = 0;
809 cb.ac_command = AC_CW_EL; /* NOP */
810 cb.ac_link_offset = OFFSET_CU;
811 outw(PIOR1(base), OFFSET_CU);
812 outsw(PIOP1(base), &cb, 6/2);
813
814 tbd.act_count = 0;

--- 13 unchanged lines hidden (view full) ---

828 * output : stuff sent to board if any there
829 *
830 */
831static void
832wlstart(struct ifnet *ifp)
833{
834 int unit = ifp->if_unit;
835 struct mbuf *m;
927
928 cb.ac_status = 0;
929 cb.ac_command = AC_CW_EL; /* NOP */
930 cb.ac_link_offset = OFFSET_CU;
931 outw(PIOR1(base), OFFSET_CU);
932 outsw(PIOP1(base), &cb, 6/2);
933
934 tbd.act_count = 0;

--- 13 unchanged lines hidden (view full) ---

948 * output : stuff sent to board if any there
949 *
950 */
951static void
952wlstart(struct ifnet *ifp)
953{
954 int unit = ifp->if_unit;
955 struct mbuf *m;
836 struct wl_softc *sc = WLSOFTC(unit);
956 struct wl_softc *sc = ifp->if_softc;
837 short base = sc->base;
838 int scb_status, cu_status, scb_command;
839
840#ifdef WLDEBUG
841 if (sc->wl_if.if_flags & IFF_DEBUG)
842 printf("wl%d: entered wlstart()\n",unit);
843#endif
844

--- 45 unchanged lines hidden (view full) ---

890 sc->tbusy++;
891 /* set the watchdog timer so that if the board
892 * fails to interrupt we will restart
893 */
894 /* try 10 ticks, not very long */
895 sc->watchdog_ch = timeout(wlwatchdog, sc, 10);
896 sc->wl_ac.ac_if.if_flags |= IFF_OACTIVE;
897 sc->wl_if.if_opackets++;
957 short base = sc->base;
958 int scb_status, cu_status, scb_command;
959
960#ifdef WLDEBUG
961 if (sc->wl_if.if_flags & IFF_DEBUG)
962 printf("wl%d: entered wlstart()\n",unit);
963#endif
964

--- 45 unchanged lines hidden (view full) ---

1010 sc->tbusy++;
1011 /* set the watchdog timer so that if the board
1012 * fails to interrupt we will restart
1013 */
1014 /* try 10 ticks, not very long */
1015 sc->watchdog_ch = timeout(wlwatchdog, sc, 10);
1016 sc->wl_ac.ac_if.if_flags |= IFF_OACTIVE;
1017 sc->wl_if.if_opackets++;
898 wlxmt(unit, m);
1018 wlxmt(sc, m);
899 } else {
900 sc->wl_ac.ac_if.if_flags &= ~IFF_OACTIVE;
901 }
902 return;
903}
904
905/*
906 * wlread:

--- 9 unchanged lines hidden (view full) ---

916 * is then enqueued onto the appropriate "if" queue.
917 *
918 * input : board number, and a frame descriptor address
919 * output : the packet is put into an mbuf chain, and passed up
920 * assumes : if any errors occur, packet is "dropped on the floor"
921 *
922 */
923static int
1019 } else {
1020 sc->wl_ac.ac_if.if_flags &= ~IFF_OACTIVE;
1021 }
1022 return;
1023}
1024
1025/*
1026 * wlread:

--- 9 unchanged lines hidden (view full) ---

1036 * is then enqueued onto the appropriate "if" queue.
1037 *
1038 * input : board number, and a frame descriptor address
1039 * output : the packet is put into an mbuf chain, and passed up
1040 * assumes : if any errors occur, packet is "dropped on the floor"
1041 *
1042 */
1043static int
924wlread(int unit, u_short fd_p)
1044wlread(struct wl_softc *sc, u_short fd_p)
925{
1045{
926 struct wl_softc *sc = WLSOFTC(unit);
927 struct ifnet *ifp = &sc->wl_if;
928 short base = sc->base;
929 fd_t fd;
930 struct ether_header *eh;
931 struct mbuf *m;
932 rbd_t rbd;
933 u_char *mb_p;
934 u_short mlen, len;
935 u_short bytes_in_msg, bytes_in_mbuf, bytes;
936
937
938#ifdef WLDEBUG
939 if (sc->wl_if.if_flags & IFF_DEBUG)
1046 struct ifnet *ifp = &sc->wl_if;
1047 short base = sc->base;
1048 fd_t fd;
1049 struct ether_header *eh;
1050 struct mbuf *m;
1051 rbd_t rbd;
1052 u_char *mb_p;
1053 u_short mlen, len;
1054 u_short bytes_in_msg, bytes_in_mbuf, bytes;
1055
1056
1057#ifdef WLDEBUG
1058 if (sc->wl_if.if_flags & IFF_DEBUG)
940 printf("wl%d: entered wlread()\n", unit);
1059 printf("wl%d: entered wlread()\n", sc->unit);
941#endif
942 if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) != (IFF_UP|IFF_RUNNING)) {
1060#endif
1061 if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) != (IFF_UP|IFF_RUNNING)) {
943 printf("wl%d read(): board is not running.\n", unit);
1062 printf("wl%d read(): board is not running.\n", sc->unit);
944 sc->hacr &= ~HACR_INTRON;
1063 sc->hacr &= ~HACR_INTRON;
945 CMD(unit); /* turn off interrupts */
1064 CMD(sc); /* turn off interrupts */
946 }
947
948 /*
949 * Collect message size.
950 */
951 outw(PIOR1(base), fd_p);
952 insw(PIOP1(base), &fd, sizeof(fd_t)/2);
953 if (fd.rbd_offset == I82586NULL) {
1065 }
1066
1067 /*
1068 * Collect message size.
1069 */
1070 outw(PIOR1(base), fd_p);
1071 insw(PIOP1(base), &fd, sizeof(fd_t)/2);
1072 if (fd.rbd_offset == I82586NULL) {
954 if (wlhwrst(unit) != TRUE) {
1073 if (wlhwrst(sc) != TRUE) {
955 sc->hacr &= ~HACR_INTRON;
1074 sc->hacr &= ~HACR_INTRON;
956 CMD(unit); /* turn off interrupts */
957 printf("wl%d read(): hwrst trouble.\n", unit);
1075 CMD(sc); /* turn off interrupts */
1076 printf("wl%d read(): hwrst trouble.\n", sc->unit);
958 }
959 return 0;
960 }
961
962 outw(PIOR1(base), fd.rbd_offset);
963 insw(PIOP1(base), &rbd, sizeof(rbd_t)/2);
964 bytes_in_msg = rbd.status & RBD_SW_COUNT;
965
966 /*
967 * Allocate a cluster'd mbuf to receive the packet.
968 */
969 m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
970 if (m == NULL) {
1077 }
1078 return 0;
1079 }
1080
1081 outw(PIOR1(base), fd.rbd_offset);
1082 insw(PIOP1(base), &rbd, sizeof(rbd_t)/2);
1083 bytes_in_msg = rbd.status & RBD_SW_COUNT;
1084
1085 /*
1086 * Allocate a cluster'd mbuf to receive the packet.
1087 */
1088 m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1089 if (m == NULL) {
971 if (wlhwrst(unit) != TRUE) {
1090 if (wlhwrst(sc) != TRUE) {
972 sc->hacr &= ~HACR_INTRON;
1091 sc->hacr &= ~HACR_INTRON;
973 CMD(unit); /* turn off interrupts */
974 printf("wl%d read(): hwrst trouble.\n", unit);
1092 CMD(sc); /* turn off interrupts */
1093 printf("wl%d read(): hwrst trouble.\n", sc->unit);
975 }
976 return 0;
977 }
978 m->m_pkthdr.len = m->m_len = MCLBYTES;
979 m_adj(m, ETHER_ALIGN); /* align IP header */
980
981 /*
982 * Collect the message data.

--- 11 unchanged lines hidden (view full) ---

994 outw(PIOR1(base), rbd.buffer_addr);
995 insw(PIOP1(base), mb_p, len/2);
996 mlen += bytes;
997
998 if (bytes > bytes_in_mbuf) {
999 /* XXX something wrong, a packet should fit in 1 cluster */
1000 m_freem(m);
1001 printf("wl%d read(): packet too large (%u > %u)\n",
1094 }
1095 return 0;
1096 }
1097 m->m_pkthdr.len = m->m_len = MCLBYTES;
1098 m_adj(m, ETHER_ALIGN); /* align IP header */
1099
1100 /*
1101 * Collect the message data.

--- 11 unchanged lines hidden (view full) ---

1113 outw(PIOR1(base), rbd.buffer_addr);
1114 insw(PIOP1(base), mb_p, len/2);
1115 mlen += bytes;
1116
1117 if (bytes > bytes_in_mbuf) {
1118 /* XXX something wrong, a packet should fit in 1 cluster */
1119 m_freem(m);
1120 printf("wl%d read(): packet too large (%u > %u)\n",
1002 unit, bytes, bytes_in_mbuf);
1003 if (wlhwrst(unit) != TRUE) {
1121 sc->unit, bytes, bytes_in_mbuf);
1122 if (wlhwrst(sc) != TRUE) {
1004 sc->hacr &= ~HACR_INTRON;
1123 sc->hacr &= ~HACR_INTRON;
1005 CMD(unit); /* turn off interrupts */
1006 printf("wl%d read(): hwrst trouble.\n", unit);
1124 CMD(sc); /* turn off interrupts */
1125 printf("wl%d read(): hwrst trouble.\n", sc->unit);
1007 }
1008 return 0;
1009 }
1010 mb_p += bytes;
1011 bytes_in_msg -= bytes;
1012 if (bytes_in_msg == 0) {
1013 if (rbd.status & RBD_SW_EOF || rbd.next_rbd_offset == I82586NULL) {
1014 break;

--- 38 unchanged lines hidden (view full) ---

1053 bcmp(eh->ether_dhost, sc->wl_ac.ac_enaddr,
1054 sizeof(eh->ether_dhost)) != 0 ) {
1055 m_freem(m);
1056 return 1;
1057 }
1058
1059#ifdef WLDEBUG
1060 if (sc->wl_if.if_flags & IFF_DEBUG)
1126 }
1127 return 0;
1128 }
1129 mb_p += bytes;
1130 bytes_in_msg -= bytes;
1131 if (bytes_in_msg == 0) {
1132 if (rbd.status & RBD_SW_EOF || rbd.next_rbd_offset == I82586NULL) {
1133 break;

--- 38 unchanged lines hidden (view full) ---

1172 bcmp(eh->ether_dhost, sc->wl_ac.ac_enaddr,
1173 sizeof(eh->ether_dhost)) != 0 ) {
1174 m_freem(m);
1175 return 1;
1176 }
1177
1178#ifdef WLDEBUG
1179 if (sc->wl_if.if_flags & IFF_DEBUG)
1061 printf("wl%d: wlrecv %u bytes\n", unit, mlen);
1180 printf("wl%d: wlrecv %u bytes\n", sc->unit, mlen);
1062#endif
1063
1064#ifdef WLCACHE
1181#endif
1182
1183#ifdef WLCACHE
1065 wl_cache_store(unit, base, eh, m);
1184 wl_cache_store(sc, base, eh, m);
1066#endif
1067
1068 /*
1069 * received packet is now in a chain of mbuf's. next step is
1070 * to pass the packet upwards.
1071 */
1072 (*ifp->if_input)(ifp, m);
1073 return 1;

--- 11 unchanged lines hidden (view full) ---

1085 * return : error is returned containing exit conditions
1086 *
1087 */
1088static int
1089wlioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1090{
1091 struct ifreq *ifr = (struct ifreq *)data;
1092 int unit = ifp->if_unit;
1185#endif
1186
1187 /*
1188 * received packet is now in a chain of mbuf's. next step is
1189 * to pass the packet upwards.
1190 */
1191 (*ifp->if_input)(ifp, m);
1192 return 1;

--- 11 unchanged lines hidden (view full) ---

1204 * return : error is returned containing exit conditions
1205 *
1206 */
1207static int
1208wlioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1209{
1210 struct ifreq *ifr = (struct ifreq *)data;
1211 int unit = ifp->if_unit;
1093 struct wl_softc *sc = WLSOFTC(unit);
1212 struct wl_softc *sc = ifp->if_softc;
1094 short base = sc->base;
1095 short mode = 0;
1096 int opri, error = 0;
1097 struct thread *td = curthread; /* XXX */
1098 int irq, irqval, i, isroot;
1099 caddr_t up;
1100#ifdef WLCACHE
1101 int size;

--- 31 unchanged lines hidden (view full) ---

1133 }
1134 /* if interface is marked DOWN and still running then
1135 * stop it.
1136 */
1137 if ((ifp->if_flags & IFF_UP) == 0 && sc->flags & DSF_RUNNING) {
1138 printf("wl%d ioctl(): board is not running\n", unit);
1139 sc->flags &= ~DSF_RUNNING;
1140 sc->hacr &= ~HACR_INTRON;
1213 short base = sc->base;
1214 short mode = 0;
1215 int opri, error = 0;
1216 struct thread *td = curthread; /* XXX */
1217 int irq, irqval, i, isroot;
1218 caddr_t up;
1219#ifdef WLCACHE
1220 int size;

--- 31 unchanged lines hidden (view full) ---

1252 }
1253 /* if interface is marked DOWN and still running then
1254 * stop it.
1255 */
1256 if ((ifp->if_flags & IFF_UP) == 0 && sc->flags & DSF_RUNNING) {
1257 printf("wl%d ioctl(): board is not running\n", unit);
1258 sc->flags &= ~DSF_RUNNING;
1259 sc->hacr &= ~HACR_INTRON;
1141 CMD(unit); /* turn off interrupts */
1260 CMD(sc); /* turn off interrupts */
1142 }
1143 /* else if interface is UP and RUNNING, start it
1144 */
1145 else if (ifp->if_flags & IFF_UP && (sc->flags & DSF_RUNNING) == 0) {
1146 wlinit(sc);
1147 }
1148
1149 /* if WLDEBUG set on interface, then printf rf-modem regs
1150 */
1151 if (ifp->if_flags & IFF_DEBUG)
1261 }
1262 /* else if interface is UP and RUNNING, start it
1263 */
1264 else if (ifp->if_flags & IFF_UP && (sc->flags & DSF_RUNNING) == 0) {
1265 wlinit(sc);
1266 }
1267
1268 /* if WLDEBUG set on interface, then printf rf-modem regs
1269 */
1270 if (ifp->if_flags & IFF_DEBUG)
1152 wlmmcstat(unit);
1271 wlmmcstat(sc);
1153 break;
1154#if MULTICAST
1155 case SIOCADDMULTI:
1156 case SIOCDELMULTI:
1157
1158 wlinit(sc);
1159 break;
1160#endif /* MULTICAST */

--- 49 unchanged lines hidden (view full) ---

1210 /* MAC select */
1211 sc->psa[WLPSA_MACSEL] = fubyte(up+WLPSA_MACSEL);
1212
1213 /* default nwid */
1214 sc->psa[WLPSA_NWID] = fubyte(up+WLPSA_NWID);
1215 sc->psa[WLPSA_NWID+1] = fubyte(up+WLPSA_NWID+1);
1216
1217 error = 0;
1272 break;
1273#if MULTICAST
1274 case SIOCADDMULTI:
1275 case SIOCDELMULTI:
1276
1277 wlinit(sc);
1278 break;
1279#endif /* MULTICAST */

--- 49 unchanged lines hidden (view full) ---

1329 /* MAC select */
1330 sc->psa[WLPSA_MACSEL] = fubyte(up+WLPSA_MACSEL);
1331
1332 /* default nwid */
1333 sc->psa[WLPSA_NWID] = fubyte(up+WLPSA_NWID);
1334 sc->psa[WLPSA_NWID+1] = fubyte(up+WLPSA_NWID+1);
1335
1336 error = 0;
1218 wlsetpsa(unit); /* update the PSA */
1337 wlsetpsa(sc); /* update the PSA */
1219 break;
1220
1221
1222 /* get the current NWID out of the sc since we stored it there */
1223 case SIOCGWLCNWID:
1224 ifr->ifr_data = (caddr_t) (sc->nwid[0] << 8 | sc->nwid[1]);
1225 break;
1226

--- 47 unchanged lines hidden (view full) ---

1274 break;
1275
1276#ifdef WLCACHE
1277 /* zero (Delete) the wl cache */
1278 case SIOCDWLCACHE:
1279 /* root only */
1280 if ((error = suser(td)))
1281 break;
1338 break;
1339
1340
1341 /* get the current NWID out of the sc since we stored it there */
1342 case SIOCGWLCNWID:
1343 ifr->ifr_data = (caddr_t) (sc->nwid[0] << 8 | sc->nwid[1]);
1344 break;
1345

--- 47 unchanged lines hidden (view full) ---

1393 break;
1394
1395#ifdef WLCACHE
1396 /* zero (Delete) the wl cache */
1397 case SIOCDWLCACHE:
1398 /* root only */
1399 if ((error = suser(td)))
1400 break;
1282 wl_cache_zero(unit);
1401 wl_cache_zero(sc);
1283 break;
1284
1285 /* read out the number of used cache elements */
1286 case SIOCGWLCITEM:
1287 ifr->ifr_data = (caddr_t) sc->w_sigitems;
1288 break;
1289
1290 /* read out the wl cache */

--- 48 unchanged lines hidden (view full) ---

1339 * is received, or a packet has successfully been transfered and
1340 * the unit is ready to transmit another packet.
1341 *
1342 * input : board number that interrupted
1343 * output : either a packet is received, or a packet is transfered
1344 *
1345 */
1346static void
1402 break;
1403
1404 /* read out the number of used cache elements */
1405 case SIOCGWLCITEM:
1406 ifr->ifr_data = (caddr_t) sc->w_sigitems;
1407 break;
1408
1409 /* read out the wl cache */

--- 48 unchanged lines hidden (view full) ---

1458 * is received, or a packet has successfully been transfered and
1459 * the unit is ready to transmit another packet.
1460 *
1461 * input : board number that interrupted
1462 * output : either a packet is received, or a packet is transfered
1463 *
1464 */
1465static void
1347wlintr(unit)
1348int unit;
1466wlintr(void *arg)
1349{
1467{
1350 struct wl_softc *sc = &wl_softc[unit];
1468 struct wl_softc *sc = (struct wl_softc *)arg;
1351 short base = sc->base;
1352 int ac_status;
1353 u_short int_type, int_type1;
1354
1355#ifdef WLDEBUG
1356 if (sc->wl_if.if_flags & IFF_DEBUG)
1469 short base = sc->base;
1470 int ac_status;
1471 u_short int_type, int_type1;
1472
1473#ifdef WLDEBUG
1474 if (sc->wl_if.if_flags & IFF_DEBUG)
1357 printf("wl%d: wlintr() called\n",unit);
1475 printf("wl%d: wlintr() called\n", sc->unit);
1358#endif
1359
1360 if ((int_type = inw(HASR(base))) & HASR_MMC_INTR) {
1361 /* handle interrupt from the modem management controler */
1362 /* This will clear the interrupt condition */
1363 (void) wlmmcread(base,MMC_DCE_STATUS); /* ignored for now */
1364 }
1365
1366 if (!(int_type & HASR_INTR)){ /* return if no interrupt from 82586 */
1367 /* commented out. jrb. it happens when reinit occurs
1368 printf("wlintr: int_type %x, dump follows\n", int_type);
1369 wldump(unit);
1370 */
1371 return;
1372 }
1373
1374 if (gathersnr)
1476#endif
1477
1478 if ((int_type = inw(HASR(base))) & HASR_MMC_INTR) {
1479 /* handle interrupt from the modem management controler */
1480 /* This will clear the interrupt condition */
1481 (void) wlmmcread(base,MMC_DCE_STATUS); /* ignored for now */
1482 }
1483
1484 if (!(int_type & HASR_INTR)){ /* return if no interrupt from 82586 */
1485 /* commented out. jrb. it happens when reinit occurs
1486 printf("wlintr: int_type %x, dump follows\n", int_type);
1487 wldump(unit);
1488 */
1489 return;
1490 }
1491
1492 if (gathersnr)
1375 getsnr(unit);
1493 getsnr(sc);
1376 for (;;) {
1377 outw(PIOR0(base), OFFSET_SCB + 0); /* get scb status */
1378 int_type = (inw(PIOP0(base)) & SCB_SW_INT);
1379 if (int_type == 0) /* no interrupts left */
1380 break;
1381
1494 for (;;) {
1495 outw(PIOR0(base), OFFSET_SCB + 0); /* get scb status */
1496 int_type = (inw(PIOP0(base)) & SCB_SW_INT);
1497 if (int_type == 0) /* no interrupts left */
1498 break;
1499
1382 int_type1 = wlack(unit); /* acknowledge interrupt(s) */
1500 int_type1 = wlack(sc); /* acknowledge interrupt(s) */
1383 /* make sure no bits disappeared (others may appear) */
1384 if ((int_type & int_type1) != int_type)
1385 printf("wlack() int bits disappeared : %04x != int_type %04x\n",
1386 int_type1, int_type);
1387 int_type = int_type1; /* go with the new status */
1388 /*
1389 * incoming packet
1390 */
1391 if (int_type & SCB_SW_FR) {
1392 sc->wl_if.if_ipackets++;
1501 /* make sure no bits disappeared (others may appear) */
1502 if ((int_type & int_type1) != int_type)
1503 printf("wlack() int bits disappeared : %04x != int_type %04x\n",
1504 int_type1, int_type);
1505 int_type = int_type1; /* go with the new status */
1506 /*
1507 * incoming packet
1508 */
1509 if (int_type & SCB_SW_FR) {
1510 sc->wl_if.if_ipackets++;
1393 wlrcv(unit);
1511 wlrcv(sc);
1394 }
1395 /*
1396 * receiver not ready
1397 */
1398 if (int_type & SCB_SW_RNR) {
1399 sc->wl_if.if_ierrors++;
1400#ifdef WLDEBUG
1401 if (sc->wl_if.if_flags & IFF_DEBUG)
1402 printf("wl%d intr(): receiver overrun! begin_fd = %x\n",
1512 }
1513 /*
1514 * receiver not ready
1515 */
1516 if (int_type & SCB_SW_RNR) {
1517 sc->wl_if.if_ierrors++;
1518#ifdef WLDEBUG
1519 if (sc->wl_if.if_flags & IFF_DEBUG)
1520 printf("wl%d intr(): receiver overrun! begin_fd = %x\n",
1403 unit, sc->begin_fd);
1521 sc->unit, sc->begin_fd);
1404#endif
1522#endif
1405 wlrustrt(unit);
1523 wlrustrt(sc);
1406 }
1407 /*
1408 * CU not ready
1409 */
1410 if (int_type & SCB_SW_CNA) {
1411 /*
1412 * At present, we don't care about CNA's. We
1413 * believe they are a side effect of XMT.

--- 6 unchanged lines hidden (view full) ---

1420 */
1421 outw(PIOR1(base), OFFSET_CU); /* get command status */
1422 ac_status = inw(PIOP1(base));
1423
1424 if (xmt_watch) { /* report some anomalies */
1425
1426 if (sc->tbusy == 0) {
1427 printf("wl%d: xmt intr but not busy, CU %04x\n",
1524 }
1525 /*
1526 * CU not ready
1527 */
1528 if (int_type & SCB_SW_CNA) {
1529 /*
1530 * At present, we don't care about CNA's. We
1531 * believe they are a side effect of XMT.

--- 6 unchanged lines hidden (view full) ---

1538 */
1539 outw(PIOR1(base), OFFSET_CU); /* get command status */
1540 ac_status = inw(PIOP1(base));
1541
1542 if (xmt_watch) { /* report some anomalies */
1543
1544 if (sc->tbusy == 0) {
1545 printf("wl%d: xmt intr but not busy, CU %04x\n",
1428 unit, ac_status);
1546 sc->unit, ac_status);
1429 }
1430 if (ac_status == 0) {
1547 }
1548 if (ac_status == 0) {
1431 printf("wl%d: xmt intr but ac_status == 0\n", unit);
1549 printf("wl%d: xmt intr but ac_status == 0\n", sc->unit);
1432 }
1433 if (ac_status & AC_SW_A) {
1550 }
1551 if (ac_status & AC_SW_A) {
1434 printf("wl%d: xmt aborted\n",unit);
1552 printf("wl%d: xmt aborted\n", sc->unit);
1435 }
1436#ifdef notdef
1437 if (ac_status & TC_CARRIER) {
1553 }
1554#ifdef notdef
1555 if (ac_status & TC_CARRIER) {
1438 printf("wl%d: no carrier\n", unit);
1556 printf("wl%d: no carrier\n", sc->unit);
1439 }
1440#endif /* notdef */
1441 if (ac_status & TC_CLS) {
1557 }
1558#endif /* notdef */
1559 if (ac_status & TC_CLS) {
1442 printf("wl%d: no CTS\n", unit);
1560 printf("wl%d: no CTS\n", sc->unit);
1443 }
1444 if (ac_status & TC_DMA) {
1561 }
1562 if (ac_status & TC_DMA) {
1445 printf("wl%d: DMA underrun\n", unit);
1563 printf("wl%d: DMA underrun\n", sc->unit);
1446 }
1447 if (ac_status & TC_DEFER) {
1564 }
1565 if (ac_status & TC_DEFER) {
1448 printf("wl%d: xmt deferred\n",unit);
1566 printf("wl%d: xmt deferred\n", sc->unit);
1449 }
1450 if (ac_status & TC_SQE) {
1567 }
1568 if (ac_status & TC_SQE) {
1451 printf("wl%d: heart beat\n", unit);
1569 printf("wl%d: heart beat\n", sc->unit);
1452 }
1453 if (ac_status & TC_COLLISION) {
1570 }
1571 if (ac_status & TC_COLLISION) {
1454 printf("wl%d: too many collisions\n", unit);
1572 printf("wl%d: too many collisions\n", sc->unit);
1455 }
1456 }
1457 /* if the transmit actually failed, or returned some status */
1458 if ((!(ac_status & AC_SW_OK)) || (ac_status & 0xfff)) {
1459 if (ac_status & (TC_COLLISION | TC_CLS | TC_DMA)) {
1460 sc->wl_if.if_oerrors++;
1461 }
1462 /* count collisions */

--- 22 unchanged lines hidden (view full) ---

1485 * to do the actual transfer of the board data (including the
1486 * ethernet header) into a packet (consisting of an mbuf chain).
1487 *
1488 * input : number of the board to check
1489 * output : if a packet is available, it is "sent up"
1490 *
1491 */
1492static void
1573 }
1574 }
1575 /* if the transmit actually failed, or returned some status */
1576 if ((!(ac_status & AC_SW_OK)) || (ac_status & 0xfff)) {
1577 if (ac_status & (TC_COLLISION | TC_CLS | TC_DMA)) {
1578 sc->wl_if.if_oerrors++;
1579 }
1580 /* count collisions */

--- 22 unchanged lines hidden (view full) ---

1603 * to do the actual transfer of the board data (including the
1604 * ethernet header) into a packet (consisting of an mbuf chain).
1605 *
1606 * input : number of the board to check
1607 * output : if a packet is available, it is "sent up"
1608 *
1609 */
1610static void
1493wlrcv(int unit)
1611wlrcv(struct wl_softc *sc)
1494{
1612{
1495 struct wl_softc *sc = WLSOFTC(unit);
1496 short base = sc->base;
1497 u_short fd_p, status, offset, link_offset;
1498
1499#ifdef WLDEBUG
1500 if (sc->wl_if.if_flags & IFF_DEBUG)
1613 short base = sc->base;
1614 u_short fd_p, status, offset, link_offset;
1615
1616#ifdef WLDEBUG
1617 if (sc->wl_if.if_flags & IFF_DEBUG)
1501 printf("wl%d: entered wlrcv()\n",unit);
1618 printf("wl%d: entered wlrcv()\n", sc->unit);
1502#endif
1503 for (fd_p = sc->begin_fd; fd_p != I82586NULL; fd_p = sc->begin_fd) {
1504
1505 outw(PIOR0(base), fd_p + 0); /* address of status */
1506 status = inw(PIOP0(base));
1507 outw(PIOR1(base), fd_p + 4); /* address of link_offset */
1508 link_offset = inw(PIOP1(base));
1509 offset = inw(PIOP1(base)); /* rbd_offset */
1510 if (status == 0xffff || offset == 0xffff /*I82586NULL*/) {
1619#endif
1620 for (fd_p = sc->begin_fd; fd_p != I82586NULL; fd_p = sc->begin_fd) {
1621
1622 outw(PIOR0(base), fd_p + 0); /* address of status */
1623 status = inw(PIOP0(base));
1624 outw(PIOR1(base), fd_p + 4); /* address of link_offset */
1625 link_offset = inw(PIOP1(base));
1626 offset = inw(PIOP1(base)); /* rbd_offset */
1627 if (status == 0xffff || offset == 0xffff /*I82586NULL*/) {
1511 if (wlhwrst(unit) != TRUE)
1512 printf("wl%d rcv(): hwrst ffff trouble.\n", unit);
1628 if (wlhwrst(sc) != TRUE)
1629 printf("wl%d rcv(): hwrst ffff trouble.\n", sc->unit);
1513 return;
1514 } else if (status & AC_SW_C) {
1515 if (status == (RFD_DONE|RFD_RSC)) {
1516 /* lost one */
1517#ifdef WLDEBUG
1518 if (sc->wl_if.if_flags & IFF_DEBUG)
1630 return;
1631 } else if (status & AC_SW_C) {
1632 if (status == (RFD_DONE|RFD_RSC)) {
1633 /* lost one */
1634#ifdef WLDEBUG
1635 if (sc->wl_if.if_flags & IFF_DEBUG)
1519 printf("wl%d RCV: RSC %x\n", unit, status);
1636 printf("wl%d RCV: RSC %x\n", sc->unit, status);
1520#endif
1521 sc->wl_if.if_ierrors++;
1522 } else if (!(status & RFD_OK)) {
1637#endif
1638 sc->wl_if.if_ierrors++;
1639 } else if (!(status & RFD_OK)) {
1523 printf("wl%d RCV: !OK %x\n", unit, status);
1640 printf("wl%d RCV: !OK %x\n", sc->unit, status);
1524 sc->wl_if.if_ierrors++;
1525 } else if (status & 0xfff) { /* can't happen */
1641 sc->wl_if.if_ierrors++;
1642 } else if (status & 0xfff) { /* can't happen */
1526 printf("wl%d RCV: ERRs %x\n", unit, status);
1643 printf("wl%d RCV: ERRs %x\n", sc->unit, status);
1527 sc->wl_if.if_ierrors++;
1644 sc->wl_if.if_ierrors++;
1528 } else if (!wlread(unit, fd_p))
1645 } else if (!wlread(sc, fd_p))
1529 return;
1530
1646 return;
1647
1531 if (!wlrequeue(unit, fd_p)) {
1648 if (!wlrequeue(sc, fd_p)) {
1532 /* abort on chain error */
1649 /* abort on chain error */
1533 if (wlhwrst(unit) != TRUE)
1534 printf("wl%d rcv(): hwrst trouble.\n", unit);
1650 if (wlhwrst(sc) != TRUE)
1651 printf("wl%d rcv(): hwrst trouble.\n", sc->unit);
1535 return;
1536 }
1537 sc->begin_fd = link_offset;
1538 } else {
1539 break;
1540 }
1541 }
1542 return;
1543}
1544
1545/*
1546 * wlrequeue:
1547 *
1548 * This routine puts rbd's used in the last receive back onto the
1549 * free list for the next receive.
1550 *
1551 */
1552static int
1652 return;
1653 }
1654 sc->begin_fd = link_offset;
1655 } else {
1656 break;
1657 }
1658 }
1659 return;
1660}
1661
1662/*
1663 * wlrequeue:
1664 *
1665 * This routine puts rbd's used in the last receive back onto the
1666 * free list for the next receive.
1667 *
1668 */
1669static int
1553wlrequeue(int unit, u_short fd_p)
1670wlrequeue(struct wl_softc *sc, u_short fd_p)
1554{
1671{
1555 struct wl_softc *sc = WLSOFTC(unit);
1556 short base = sc->base;
1557 fd_t fd;
1558 u_short l_rbdp, f_rbdp, rbd_offset;
1559
1560 outw(PIOR0(base), fd_p + 6);
1561 rbd_offset = inw(PIOP0(base));
1562 if ((f_rbdp = rbd_offset) != I82586NULL) {
1563 l_rbdp = f_rbdp;

--- 44 unchanged lines hidden (view full) ---

1608 * locations on the WaveLAN board and starts the board off on
1609 * the transmit.
1610 *
1611 * input : board number of interest, and a pointer to the mbuf
1612 * output : board memory and registers are set for xfer and attention
1613 *
1614 */
1615static void
1672 short base = sc->base;
1673 fd_t fd;
1674 u_short l_rbdp, f_rbdp, rbd_offset;
1675
1676 outw(PIOR0(base), fd_p + 6);
1677 rbd_offset = inw(PIOP0(base));
1678 if ((f_rbdp = rbd_offset) != I82586NULL) {
1679 l_rbdp = f_rbdp;

--- 44 unchanged lines hidden (view full) ---

1724 * locations on the WaveLAN board and starts the board off on
1725 * the transmit.
1726 *
1727 * input : board number of interest, and a pointer to the mbuf
1728 * output : board memory and registers are set for xfer and attention
1729 *
1730 */
1731static void
1616wlxmt(int unit, struct mbuf *m)
1732wlxmt(struct wl_softc *sc, struct mbuf *m)
1617{
1733{
1618 struct wl_softc *sc = WLSOFTC(unit);
1619 u_short xmtdata_p = OFFSET_TBUF;
1620 u_short xmtshort_p;
1621 struct mbuf *tm_p = m;
1622 struct ether_header *eh_p = mtod(m, struct ether_header *);
1623 u_char *mb_p = mtod(m, u_char *) + sizeof(struct ether_header);
1624 u_short count = m->m_len - sizeof(struct ether_header);
1625 ac_t cb;
1626 u_short tbd_p = OFFSET_TBD;
1627 u_short len, clen = 0;
1628 short base = sc->base;
1629 int spin;
1630
1631#ifdef WLDEBUG
1632 if (sc->wl_if.if_flags & IFF_DEBUG)
1734 u_short xmtdata_p = OFFSET_TBUF;
1735 u_short xmtshort_p;
1736 struct mbuf *tm_p = m;
1737 struct ether_header *eh_p = mtod(m, struct ether_header *);
1738 u_char *mb_p = mtod(m, u_char *) + sizeof(struct ether_header);
1739 u_short count = m->m_len - sizeof(struct ether_header);
1740 ac_t cb;
1741 u_short tbd_p = OFFSET_TBD;
1742 u_short len, clen = 0;
1743 short base = sc->base;
1744 int spin;
1745
1746#ifdef WLDEBUG
1747 if (sc->wl_if.if_flags & IFF_DEBUG)
1633 printf("wl%d: entered wlxmt()\n",unit);
1748 printf("wl%d: entered wlxmt()\n", sc->unit);
1634#endif
1635
1636 cb.ac_status = 0;
1637 cb.ac_command = (AC_CW_EL|AC_TRANSMIT|AC_CW_I);
1638 cb.ac_link_offset = I82586NULL;
1639 outw(PIOR1(base), OFFSET_CU);
1640 outsw(PIOP1(base), &cb, 6/2);
1641 outw(PIOP1(base), OFFSET_TBD); /* cb.cmd.transmit.tbd_offset */

--- 36 unchanged lines hidden (view full) ---

1678 outw(PIOP0(base), tbd_p); /* next_tbd_offset */
1679 outw(PIOR0(base), tbd_p);
1680 outw(PIOP0(base), 0); /* act_count */
1681 outw(PIOR1(base), tbd_p + 4);
1682 outw(PIOP1(base), xmtdata_p); /* buffer_addr */
1683 outw(PIOP1(base), 0); /* buffer_base */
1684 /* at the end -> coallesce remaining mbufs */
1685 if (tbd_p == OFFSET_TBD + (N_TBD-1) * sizeof (tbd_t)) {
1749#endif
1750
1751 cb.ac_status = 0;
1752 cb.ac_command = (AC_CW_EL|AC_TRANSMIT|AC_CW_I);
1753 cb.ac_link_offset = I82586NULL;
1754 outw(PIOR1(base), OFFSET_CU);
1755 outsw(PIOP1(base), &cb, 6/2);
1756 outw(PIOP1(base), OFFSET_TBD); /* cb.cmd.transmit.tbd_offset */

--- 36 unchanged lines hidden (view full) ---

1793 outw(PIOP0(base), tbd_p); /* next_tbd_offset */
1794 outw(PIOR0(base), tbd_p);
1795 outw(PIOP0(base), 0); /* act_count */
1796 outw(PIOR1(base), tbd_p + 4);
1797 outw(PIOP1(base), xmtdata_p); /* buffer_addr */
1798 outw(PIOP1(base), 0); /* buffer_base */
1799 /* at the end -> coallesce remaining mbufs */
1800 if (tbd_p == OFFSET_TBD + (N_TBD-1) * sizeof (tbd_t)) {
1686 wlsftwsleaze(&count, &mb_p, &tm_p, unit);
1801 wlsftwsleaze(&count, &mb_p, &tm_p, sc);
1687 continue;
1688 }
1689 /* next mbuf short -> coallesce as needed */
1690 if ( (tm_p->m_next == (struct mbuf *) 0) ||
1691#define HDW_THRESHOLD 55
1692 tm_p->m_len > HDW_THRESHOLD)
1693 /* ok */;
1694 else {
1802 continue;
1803 }
1804 /* next mbuf short -> coallesce as needed */
1805 if ( (tm_p->m_next == (struct mbuf *) 0) ||
1806#define HDW_THRESHOLD 55
1807 tm_p->m_len > HDW_THRESHOLD)
1808 /* ok */;
1809 else {
1695 wlhdwsleaze(&count, &mb_p, &tm_p, unit);
1810 wlhdwsleaze(&count, &mb_p, &tm_p, sc);
1696 continue;
1697 }
1698 }
1699 } else if ((tm_p = tm_p->m_next) == (struct mbuf *)0)
1700 break;
1701 count = tm_p->m_len;
1702 mb_p = mtod(tm_p, u_char *);
1703#ifdef WLDEBUG

--- 15 unchanged lines hidden (view full) ---

1719 outw(PIOP1(base), 0);
1720 }
1721 outw(PIOP0(base), inw(PIOP0(base)) | TBD_SW_EOF);
1722 outw(PIOR0(base), tbd_p + 2);
1723 outw(PIOP0(base), I82586NULL);
1724#ifdef WLDEBUG
1725 if (sc->wl_if.if_flags & IFF_DEBUG) {
1726 if (xmt_debug) {
1811 continue;
1812 }
1813 }
1814 } else if ((tm_p = tm_p->m_next) == (struct mbuf *)0)
1815 break;
1816 count = tm_p->m_len;
1817 mb_p = mtod(tm_p, u_char *);
1818#ifdef WLDEBUG

--- 15 unchanged lines hidden (view full) ---

1834 outw(PIOP1(base), 0);
1835 }
1836 outw(PIOP0(base), inw(PIOP0(base)) | TBD_SW_EOF);
1837 outw(PIOR0(base), tbd_p + 2);
1838 outw(PIOP0(base), I82586NULL);
1839#ifdef WLDEBUG
1840 if (sc->wl_if.if_flags & IFF_DEBUG) {
1841 if (xmt_debug) {
1727 wltbd(unit);
1842 wltbd(sc);
1728 printf("\n");
1729 }
1730 }
1731#endif /* WLDEBUG */
1732
1733 outw(PIOR0(base), OFFSET_SCB + 2); /* address of scb_command */
1734 /*
1735 * wait for 586 to clear previous command, complain if it takes
1736 * too long
1737 */
1738 for (spin = 1;;spin = (spin + 1) % 10000) {
1739 if (inw(PIOP0(base)) == 0) { /* it's done, we can go */
1740 break;
1741 }
1742 if ((spin == 0) && xmt_watch) { /* not waking up, and we care */
1843 printf("\n");
1844 }
1845 }
1846#endif /* WLDEBUG */
1847
1848 outw(PIOR0(base), OFFSET_SCB + 2); /* address of scb_command */
1849 /*
1850 * wait for 586 to clear previous command, complain if it takes
1851 * too long
1852 */
1853 for (spin = 1;;spin = (spin + 1) % 10000) {
1854 if (inw(PIOP0(base)) == 0) { /* it's done, we can go */
1855 break;
1856 }
1857 if ((spin == 0) && xmt_watch) { /* not waking up, and we care */
1743 printf("wl%d: slow accepting xmit\n",unit);
1858 printf("wl%d: slow accepting xmit\n", sc->unit);
1744 }
1745 }
1746 outw(PIOP0(base), SCB_CU_STRT); /* new command */
1859 }
1860 }
1861 outw(PIOP0(base), SCB_CU_STRT); /* new command */
1747 SET_CHAN_ATTN(unit);
1862 SET_CHAN_ATTN(sc);
1748
1749 m_freem(m);
1750
1751 /* XXX
1752 * Pause to avoid transmit overrun problems.
1753 * The required delay tends to vary with platform type, and may be
1754 * related to interrupt loss.
1755 */

--- 6 unchanged lines hidden (view full) ---

1762/*
1763 * wlbldru:
1764 *
1765 * This function builds the linear linked lists of fd's and
1766 * rbd's. Based on page 4-32 of 1986 Intel microcom handbook.
1767 *
1768 */
1769static u_short
1863
1864 m_freem(m);
1865
1866 /* XXX
1867 * Pause to avoid transmit overrun problems.
1868 * The required delay tends to vary with platform type, and may be
1869 * related to interrupt loss.
1870 */

--- 6 unchanged lines hidden (view full) ---

1877/*
1878 * wlbldru:
1879 *
1880 * This function builds the linear linked lists of fd's and
1881 * rbd's. Based on page 4-32 of 1986 Intel microcom handbook.
1882 *
1883 */
1884static u_short
1770wlbldru(int unit)
1885wlbldru(struct wl_softc *sc)
1771{
1886{
1772 struct wl_softc *sc = WLSOFTC(unit);
1773 short base = sc->base;
1774 fd_t fd;
1775 rbd_t rbd;
1776 u_short fd_p = OFFSET_RU;
1777 u_short rbd_p = OFFSET_RBD;
1778 int i;
1779
1780 sc->begin_fd = fd_p;

--- 39 unchanged lines hidden (view full) ---

1820 * wlrustrt:
1821 *
1822 * This routine starts the receive unit running. First checks if the
1823 * board is actually ready, then the board is instructed to receive
1824 * packets again.
1825 *
1826 */
1827static void
1887 short base = sc->base;
1888 fd_t fd;
1889 rbd_t rbd;
1890 u_short fd_p = OFFSET_RU;
1891 u_short rbd_p = OFFSET_RBD;
1892 int i;
1893
1894 sc->begin_fd = fd_p;

--- 39 unchanged lines hidden (view full) ---

1934 * wlrustrt:
1935 *
1936 * This routine starts the receive unit running. First checks if the
1937 * board is actually ready, then the board is instructed to receive
1938 * packets again.
1939 *
1940 */
1941static void
1828wlrustrt(int unit)
1942wlrustrt(struct wl_softc *sc)
1829{
1943{
1830 struct wl_softc *sc = WLSOFTC(unit);
1831 short base = sc->base;
1832 u_short rfa;
1833
1834#ifdef WLDEBUG
1835 if (sc->wl_if.if_flags & IFF_DEBUG)
1944 short base = sc->base;
1945 u_short rfa;
1946
1947#ifdef WLDEBUG
1948 if (sc->wl_if.if_flags & IFF_DEBUG)
1836 printf("wl%d: entered wlrustrt()\n",unit);
1949 printf("wl%d: entered wlrustrt()\n", sc->unit);
1837#endif
1838 outw(PIOR0(base), OFFSET_SCB);
1839 if (inw(PIOP0(base)) & SCB_RUS_READY){
1840 printf("wlrustrt: RUS_READY\n");
1841 return;
1842 }
1843
1844 outw(PIOR0(base), OFFSET_SCB + 2);
1845 outw(PIOP0(base), SCB_RU_STRT); /* command */
1950#endif
1951 outw(PIOR0(base), OFFSET_SCB);
1952 if (inw(PIOP0(base)) & SCB_RUS_READY){
1953 printf("wlrustrt: RUS_READY\n");
1954 return;
1955 }
1956
1957 outw(PIOR0(base), OFFSET_SCB + 2);
1958 outw(PIOP0(base), SCB_RU_STRT); /* command */
1846 rfa = wlbldru(unit);
1959 rfa = wlbldru(sc);
1847 outw(PIOR0(base), OFFSET_SCB + 6); /* address of scb_rfa_offset */
1848 outw(PIOP0(base), rfa);
1849
1960 outw(PIOR0(base), OFFSET_SCB + 6); /* address of scb_rfa_offset */
1961 outw(PIOP0(base), rfa);
1962
1850 SET_CHAN_ATTN(unit);
1963 SET_CHAN_ATTN(sc);
1851 return;
1852}
1853
1854/*
1855 * wldiag:
1856 *
1857 * This routine does a 586 op-code number 7, and obtains the
1858 * diagnose status for the WaveLAN.
1859 *
1860 */
1861static int
1964 return;
1965}
1966
1967/*
1968 * wldiag:
1969 *
1970 * This routine does a 586 op-code number 7, and obtains the
1971 * diagnose status for the WaveLAN.
1972 *
1973 */
1974static int
1862wldiag(int unit)
1975wldiag(struct wl_softc *sc)
1863{
1976{
1864 struct wl_softc *sc = WLSOFTC(unit);
1865 short base = sc->base;
1866 short status;
1977 short base = sc->base;
1978 short status;
1867
1868#ifdef WLDEBUG
1869 if (sc->wl_if.if_flags & IFF_DEBUG)
1979
1980#ifdef WLDEBUG
1981 if (sc->wl_if.if_flags & IFF_DEBUG)
1870 printf("wl%d: entered wldiag()\n",unit);
1982 printf("wl%d: entered wldiag()\n", sc->unit);
1871#endif
1872 outw(PIOR0(base), OFFSET_SCB);
1873 status = inw(PIOP0(base));
1874 if (status & SCB_SW_INT) {
1875 /* state is 2000 which seems ok
1876 printf("wl%d diag(): unexpected initial state %\n",
1983#endif
1984 outw(PIOR0(base), OFFSET_SCB);
1985 status = inw(PIOP0(base));
1986 if (status & SCB_SW_INT) {
1987 /* state is 2000 which seems ok
1988 printf("wl%d diag(): unexpected initial state %\n",
1877 unit, inw(PIOP0(base)));
1989 sc->unit, inw(PIOP0(base)));
1878 */
1990 */
1879 wlack(unit);
1991 wlack(sc);
1880 }
1881 outw(PIOR1(base), OFFSET_CU);
1882 outw(PIOP1(base), 0); /* ac_status */
1883 outw(PIOP1(base), AC_DIAGNOSE|AC_CW_EL);/* ac_command */
1992 }
1993 outw(PIOR1(base), OFFSET_CU);
1994 outw(PIOP1(base), 0); /* ac_status */
1995 outw(PIOP1(base), AC_DIAGNOSE|AC_CW_EL);/* ac_command */
1884 if (wlcmd(unit, "diag()") == 0)
1996 if (wlcmd(sc, "diag()") == 0)
1885 return 0;
1886 outw(PIOR0(base), OFFSET_CU);
1887 if (inw(PIOP0(base)) & 0x0800) {
1997 return 0;
1998 outw(PIOR0(base), OFFSET_CU);
1999 if (inw(PIOP0(base)) & 0x0800) {
1888 printf("wl%d: i82586 Self Test failed!\n", unit);
2000 printf("wl%d: i82586 Self Test failed!\n", sc->unit);
1889 return 0;
1890 }
1891 return TRUE;
1892}
1893
1894/*
1895 * wlconfig:
1896 *
1897 * This routine does a standard config of the WaveLAN board.
1898 *
1899 */
1900static int
2001 return 0;
2002 }
2003 return TRUE;
2004}
2005
2006/*
2007 * wlconfig:
2008 *
2009 * This routine does a standard config of the WaveLAN board.
2010 *
2011 */
2012static int
1901wlconfig(int unit)
2013wlconfig(struct wl_softc *sc)
1902{
2014{
1903 configure_t configure;
1904 struct wl_softc *sc = WLSOFTC(unit);
2015 configure_t configure;
1905 short base = sc->base;
1906
1907#if MULTICAST
1908 struct ifmultiaddr *ifma;
1909 u_char *addrp;
1910 int cnt = 0;
1911#endif /* MULTICAST */
1912
1913#ifdef WLDEBUG
1914 if (sc->wl_if.if_flags & IFF_DEBUG)
2016 short base = sc->base;
2017
2018#if MULTICAST
2019 struct ifmultiaddr *ifma;
2020 u_char *addrp;
2021 int cnt = 0;
2022#endif /* MULTICAST */
2023
2024#ifdef WLDEBUG
2025 if (sc->wl_if.if_flags & IFF_DEBUG)
1915 printf("wl%d: entered wlconfig()\n",unit);
2026 printf("wl%d: entered wlconfig()\n", sc->unit);
1916#endif
1917 outw(PIOR0(base), OFFSET_SCB);
1918 if (inw(PIOP0(base)) & SCB_SW_INT) {
1919 /*
1920 printf("wl%d config(): unexpected initial state %x\n",
2027#endif
2028 outw(PIOR0(base), OFFSET_SCB);
2029 if (inw(PIOP0(base)) & SCB_SW_INT) {
2030 /*
2031 printf("wl%d config(): unexpected initial state %x\n",
1921 unit, inw(PIOP0(base)));
2032 sc->unit, inw(PIOP0(base)));
1922 */
1923 }
2033 */
2034 }
1924 wlack(unit);
2035 wlack(sc);
1925
1926 outw(PIOR1(base), OFFSET_CU);
1927 outw(PIOP1(base), 0); /* ac_status */
1928 outw(PIOP1(base), AC_CONFIGURE|AC_CW_EL); /* ac_command */
1929
1930/* jrb hack */
1931 configure.fifolim_bytecnt = 0x080c;
1932 configure.addrlen_mode = 0x0600;

--- 23 unchanged lines hidden (view full) ---

1956 configure.hardware = 0x0008; /* tx even w/o CD */
1957 configure.min_frame_len = 0x0040;
1958#endif
1959 if (sc->mode & (MOD_PROM | MOD_ENAL))
1960 configure.hardware |= 1;
1961 outw(PIOR1(base), OFFSET_CU + 6);
1962 outsw(PIOP1(base), &configure, sizeof(configure_t)/2);
1963
2036
2037 outw(PIOR1(base), OFFSET_CU);
2038 outw(PIOP1(base), 0); /* ac_status */
2039 outw(PIOP1(base), AC_CONFIGURE|AC_CW_EL); /* ac_command */
2040
2041/* jrb hack */
2042 configure.fifolim_bytecnt = 0x080c;
2043 configure.addrlen_mode = 0x0600;

--- 23 unchanged lines hidden (view full) ---

2067 configure.hardware = 0x0008; /* tx even w/o CD */
2068 configure.min_frame_len = 0x0040;
2069#endif
2070 if (sc->mode & (MOD_PROM | MOD_ENAL))
2071 configure.hardware |= 1;
2072 outw(PIOR1(base), OFFSET_CU + 6);
2073 outsw(PIOP1(base), &configure, sizeof(configure_t)/2);
2074
1964 if (wlcmd(unit, "config()-configure") == 0)
2075 if (wlcmd(sc, "config()-configure") == 0)
1965 return 0;
1966#if MULTICAST
1967 outw(PIOR1(base), OFFSET_CU);
1968 outw(PIOP1(base), 0); /* ac_status */
1969 outw(PIOP1(base), AC_MCSETUP|AC_CW_EL); /* ac_command */
1970 outw(PIOR1(base), OFFSET_CU + 8);
1971 TAILQ_FOREACH(ifma, &sc->wl_if.if_multiaddrs, ifma_link) {
1972 if (ifma->ifma_addr->sa_family != AF_LINK)
1973 continue;
1974
1975 addrp = LLADDR((struct sockaddr_dl *)ifma->ifma_addr);
1976 outw(PIOP1(base), addrp[0] + (addrp[1] << 8));
1977 outw(PIOP1(base), addrp[2] + (addrp[3] << 8));
1978 outw(PIOP1(base), addrp[4] + (addrp[5] << 8));
1979 ++cnt;
1980 }
1981 outw(PIOR1(base), OFFSET_CU + 6); /* mc-cnt */
1982 outw(PIOP1(base), cnt * WAVELAN_ADDR_SIZE);
2076 return 0;
2077#if MULTICAST
2078 outw(PIOR1(base), OFFSET_CU);
2079 outw(PIOP1(base), 0); /* ac_status */
2080 outw(PIOP1(base), AC_MCSETUP|AC_CW_EL); /* ac_command */
2081 outw(PIOR1(base), OFFSET_CU + 8);
2082 TAILQ_FOREACH(ifma, &sc->wl_if.if_multiaddrs, ifma_link) {
2083 if (ifma->ifma_addr->sa_family != AF_LINK)
2084 continue;
2085
2086 addrp = LLADDR((struct sockaddr_dl *)ifma->ifma_addr);
2087 outw(PIOP1(base), addrp[0] + (addrp[1] << 8));
2088 outw(PIOP1(base), addrp[2] + (addrp[3] << 8));
2089 outw(PIOP1(base), addrp[4] + (addrp[5] << 8));
2090 ++cnt;
2091 }
2092 outw(PIOR1(base), OFFSET_CU + 6); /* mc-cnt */
2093 outw(PIOP1(base), cnt * WAVELAN_ADDR_SIZE);
1983 if (wlcmd(unit, "config()-mcaddress") == 0)
2094 if (wlcmd(sc, "config()-mcaddress") == 0)
1984 return 0;
1985#endif /* MULTICAST */
1986
1987 outw(PIOR1(base), OFFSET_CU);
1988 outw(PIOP1(base), 0); /* ac_status */
1989 outw(PIOP1(base), AC_IASETUP|AC_CW_EL); /* ac_command */
1990 outw(PIOR1(base), OFFSET_CU + 6);
1991 outsw(PIOP1(base), sc->wl_addr, WAVELAN_ADDR_SIZE/2);
1992
2095 return 0;
2096#endif /* MULTICAST */
2097
2098 outw(PIOR1(base), OFFSET_CU);
2099 outw(PIOP1(base), 0); /* ac_status */
2100 outw(PIOP1(base), AC_IASETUP|AC_CW_EL); /* ac_command */
2101 outw(PIOR1(base), OFFSET_CU + 6);
2102 outsw(PIOP1(base), sc->wl_addr, WAVELAN_ADDR_SIZE/2);
2103
1993 if (wlcmd(unit, "config()-address") == 0)
2104 if (wlcmd(sc, "config()-address") == 0)
1994 return(0);
1995
2105 return(0);
2106
1996 wlinitmmc(unit);
2107 wlinitmmc(sc);
1997
1998 return(1);
1999}
2000
2001/*
2002 * wlcmd:
2003 *
2004 * Set channel attention bit and busy wait until command has
2005 * completed. Then acknowledge the command completion.
2006 */
2007static int
2108
2109 return(1);
2110}
2111
2112/*
2113 * wlcmd:
2114 *
2115 * Set channel attention bit and busy wait until command has
2116 * completed. Then acknowledge the command completion.
2117 */
2118static int
2008wlcmd(int unit, char *str)
2119wlcmd(struct wl_softc *sc, char *str)
2009{
2120{
2010 struct wl_softc *sc = WLSOFTC(unit);
2011 short base = sc->base;
2012 int i;
2013
2014 outw(PIOR0(base), OFFSET_SCB + 2); /* address of scb_command */
2015 outw(PIOP0(base), SCB_CU_STRT);
2016
2121 short base = sc->base;
2122 int i;
2123
2124 outw(PIOR0(base), OFFSET_SCB + 2); /* address of scb_command */
2125 outw(PIOP0(base), SCB_CU_STRT);
2126
2017 SET_CHAN_ATTN(unit);
2127 SET_CHAN_ATTN(sc);
2018
2019 outw(PIOR0(base), OFFSET_CU);
2020 for (i = 0; i < 0xffff; i++)
2021 if (inw(PIOP0(base)) & AC_SW_C)
2022 break;
2023 if (i == 0xffff || !(inw(PIOP0(base)) & AC_SW_OK)) {
2024 printf("wl%d: %s failed; status = %d, inw = %x, outw = %x\n",
2128
2129 outw(PIOR0(base), OFFSET_CU);
2130 for (i = 0; i < 0xffff; i++)
2131 if (inw(PIOP0(base)) & AC_SW_C)
2132 break;
2133 if (i == 0xffff || !(inw(PIOP0(base)) & AC_SW_OK)) {
2134 printf("wl%d: %s failed; status = %d, inw = %x, outw = %x\n",
2025 unit, str, inw(PIOP0(base)) & AC_SW_OK, inw(PIOP0(base)), inw(PIOR0(base)));
2135 sc->unit, str, inw(PIOP0(base)) & AC_SW_OK, inw(PIOP0(base)), inw(PIOR0(base)));
2026 outw(PIOR0(base), OFFSET_SCB);
2027 printf("scb_status %x\n", inw(PIOP0(base)));
2028 outw(PIOR0(base), OFFSET_SCB+2);
2029 printf("scb_command %x\n", inw(PIOP0(base)));
2030 outw(PIOR0(base), OFFSET_SCB+4);
2031 printf("scb_cbl %x\n", inw(PIOP0(base)));
2032 outw(PIOR0(base), OFFSET_CU+2);
2033 printf("cu_cmd %x\n", inw(PIOP0(base)));
2034 return(0);
2035 }
2036
2037 outw(PIOR0(base), OFFSET_SCB);
2038 if ((inw(PIOP0(base)) & SCB_SW_INT) && (inw(PIOP0(base)) != SCB_SW_CNA)) {
2039 /*
2040 printf("wl%d %s: unexpected final state %x\n",
2136 outw(PIOR0(base), OFFSET_SCB);
2137 printf("scb_status %x\n", inw(PIOP0(base)));
2138 outw(PIOR0(base), OFFSET_SCB+2);
2139 printf("scb_command %x\n", inw(PIOP0(base)));
2140 outw(PIOR0(base), OFFSET_SCB+4);
2141 printf("scb_cbl %x\n", inw(PIOP0(base)));
2142 outw(PIOR0(base), OFFSET_CU+2);
2143 printf("cu_cmd %x\n", inw(PIOP0(base)));
2144 return(0);
2145 }
2146
2147 outw(PIOR0(base), OFFSET_SCB);
2148 if ((inw(PIOP0(base)) & SCB_SW_INT) && (inw(PIOP0(base)) != SCB_SW_CNA)) {
2149 /*
2150 printf("wl%d %s: unexpected final state %x\n",
2041 unit, str, inw(PIOP0(base)));
2151 sc->unit, str, inw(PIOP0(base)));
2042 */
2043 }
2152 */
2153 }
2044 wlack(unit);
2154 wlack(sc);
2045 return(TRUE);
2046}
2047
2048/*
2049 * wlack: if the 82596 wants attention because it has finished
2050 * sending or receiving a packet, acknowledge its desire and
2051 * return bits indicating the kind of attention. wlack() returns
2052 * these bits so that the caller can service exactly the
2053 * conditions that wlack() acknowledged.
2054 */
2055static int
2155 return(TRUE);
2156}
2157
2158/*
2159 * wlack: if the 82596 wants attention because it has finished
2160 * sending or receiving a packet, acknowledge its desire and
2161 * return bits indicating the kind of attention. wlack() returns
2162 * these bits so that the caller can service exactly the
2163 * conditions that wlack() acknowledged.
2164 */
2165static int
2056wlack(int unit)
2166wlack(struct wl_softc *sc)
2057{
2058 int i;
2059 u_short cmd;
2167{
2168 int i;
2169 u_short cmd;
2060 struct wl_softc *sc = WLSOFTC(unit);
2061 short base = sc->base;
2062
2063 outw(PIOR1(base), OFFSET_SCB);
2064 if (!(cmd = (inw(PIOP1(base)) & SCB_SW_INT)))
2065 return(0);
2066#ifdef WLDEBUG
2067 if (sc->wl_if.if_flags & IFF_DEBUG)
2170 short base = sc->base;
2171
2172 outw(PIOR1(base), OFFSET_SCB);
2173 if (!(cmd = (inw(PIOP1(base)) & SCB_SW_INT)))
2174 return(0);
2175#ifdef WLDEBUG
2176 if (sc->wl_if.if_flags & IFF_DEBUG)
2068 printf("wl%d: doing a wlack()\n",unit);
2177 printf("wl%d: doing a wlack()\n", sc->unit);
2069#endif
2070 outw(PIOP1(base), cmd);
2178#endif
2179 outw(PIOP1(base), cmd);
2071 SET_CHAN_ATTN(unit);
2180 SET_CHAN_ATTN(sc);
2072 outw(PIOR0(base), OFFSET_SCB + 2); /* address of scb_command */
2073 for (i = 1000000; inw(PIOP0(base)) && (i-- > 0); )
2074 continue;
2075 if (i < 1)
2181 outw(PIOR0(base), OFFSET_SCB + 2); /* address of scb_command */
2182 for (i = 1000000; inw(PIOP0(base)) && (i-- > 0); )
2183 continue;
2184 if (i < 1)
2076 printf("wl%d wlack(): board not accepting command.\n", unit);
2185 printf("wl%d wlack(): board not accepting command.\n", sc->unit);
2077 return(cmd);
2078}
2079
2080#ifdef WLDEBUG
2081static void
2186 return(cmd);
2187}
2188
2189#ifdef WLDEBUG
2190static void
2082wltbd(int unit)
2191wltbd(struct wl_softc *sc)
2083{
2192{
2084 struct wl_softc *sc = WLSOFTC(unit);
2085 short base = sc->base;
2086 u_short tbd_p = OFFSET_TBD;
2087 tbd_t tbd;
2088 int i = 0;
2089 int sum = 0;
2090
2091 for (;;) {
2092 outw(PIOR1(base), tbd_p);

--- 6 unchanged lines hidden (view full) ---

2099 if (tbd.act_count & TBD_SW_EOF)
2100 break;
2101 tbd_p = tbd.next_tbd_offset;
2102 }
2103}
2104#endif
2105
2106static void
2193 short base = sc->base;
2194 u_short tbd_p = OFFSET_TBD;
2195 tbd_t tbd;
2196 int i = 0;
2197 int sum = 0;
2198
2199 for (;;) {
2200 outw(PIOR1(base), tbd_p);

--- 6 unchanged lines hidden (view full) ---

2207 if (tbd.act_count & TBD_SW_EOF)
2208 break;
2209 tbd_p = tbd.next_tbd_offset;
2210 }
2211}
2212#endif
2213
2214static void
2107wlhdwsleaze(u_short *countp, u_char **mb_pp, struct mbuf **tm_pp, int unit)
2215wlhdwsleaze(u_short *countp, u_char **mb_pp, struct mbuf **tm_pp, struct wl_softc *sc)
2108{
2109 struct mbuf *tm_p = *tm_pp;
2216{
2217 struct mbuf *tm_p = *tm_pp;
2110 u_char *mb_p = *mb_pp;
2111 u_short count = 0;
2112 u_char *cp;
2218 u_char *mb_p = *mb_pp;
2219 u_short count = 0;
2220 u_char *cp;
2113 int len;
2114
2115 /*
2116 * can we get a run that will be coallesced or
2117 * that terminates before breaking
2118 */
2119 do {
2120 count += tm_p->m_len;

--- 25 unchanged lines hidden (view full) ---

2146 *countp = count;
2147 *mb_pp = (u_char *) t_packet;
2148 *tm_pp = tm_p;
2149 return;
2150}
2151
2152
2153static void
2221 int len;
2222
2223 /*
2224 * can we get a run that will be coallesced or
2225 * that terminates before breaking
2226 */
2227 do {
2228 count += tm_p->m_len;

--- 25 unchanged lines hidden (view full) ---

2254 *countp = count;
2255 *mb_pp = (u_char *) t_packet;
2256 *tm_pp = tm_p;
2257 return;
2258}
2259
2260
2261static void
2154wlsftwsleaze(u_short *countp, u_char **mb_pp, struct mbuf **tm_pp, int unit)
2262wlsftwsleaze(u_short *countp, u_char **mb_pp, struct mbuf **tm_pp, struct wl_softc *sc)
2155{
2156 struct mbuf *tm_p = *tm_pp;
2263{
2264 struct mbuf *tm_p = *tm_pp;
2157 u_short count = 0;
2158 u_char *cp = (u_char *) t_packet;
2159 int len;
2265 u_short count = 0;
2266 u_char *cp = (u_char *) t_packet;
2267 int len;
2160
2161 /* we need to copy */
2162 for (;;) {
2163 bcopy(mtod(tm_p, u_char *), cp, len = tm_p->m_len);
2164 count += len;
2165 cp += len;
2166 if (tm_p->m_next == (struct mbuf *)0)
2167 break;
2168 tm_p = tm_p->m_next;
2169 }
2170
2171 *countp = count;
2172 *mb_pp = (u_char *) t_packet;
2173 *tm_pp = tm_p;
2174 return;
2175}
2176
2177static void
2268
2269 /* we need to copy */
2270 for (;;) {
2271 bcopy(mtod(tm_p, u_char *), cp, len = tm_p->m_len);
2272 count += len;
2273 cp += len;
2274 if (tm_p->m_next == (struct mbuf *)0)
2275 break;
2276 tm_p = tm_p->m_next;
2277 }
2278
2279 *countp = count;
2280 *mb_pp = (u_char *) t_packet;
2281 *tm_pp = tm_p;
2282 return;
2283}
2284
2285static void
2178wlmmcstat(int unit)
2286wlmmcstat(struct wl_softc *sc)
2179{
2287{
2180 struct wl_softc *sc = WLSOFTC(unit);
2181 short base = sc->base;
2182 u_short tmp;
2183
2288 short base = sc->base;
2289 u_short tmp;
2290
2184 printf("wl%d: DCE_STATUS: 0x%x, ", unit,
2291 printf("wl%d: DCE_STATUS: 0x%x, ", sc->unit,
2185 wlmmcread(base,MMC_DCE_STATUS) & 0x0f);
2186 tmp = wlmmcread(base,MMC_CORRECT_NWID_H) << 8;
2187 tmp |= wlmmcread(base,MMC_CORRECT_NWID_L);
2188 printf("Correct NWID's: %d, ", tmp);
2189 tmp = wlmmcread(base,MMC_WRONG_NWID_H) << 8;
2190 tmp |= wlmmcread(base,MMC_WRONG_NWID_L);
2191 printf("Wrong NWID's: %d\n", tmp);
2192 printf("THR_PRE_SET: 0x%x, ", wlmmcread(base,MMC_THR_PRE_SET));

--- 14 unchanged lines hidden (view full) ---

2207 continue;
2208 outw(MMCR(base),reg << 1);
2209 while (inw(HASR(base)) & HASR_MMC_BUSY)
2210 continue;
2211 return (u_short)inw(MMCR(base)) >> 8;
2212}
2213
2214static void
2292 wlmmcread(base,MMC_DCE_STATUS) & 0x0f);
2293 tmp = wlmmcread(base,MMC_CORRECT_NWID_H) << 8;
2294 tmp |= wlmmcread(base,MMC_CORRECT_NWID_L);
2295 printf("Correct NWID's: %d, ", tmp);
2296 tmp = wlmmcread(base,MMC_WRONG_NWID_H) << 8;
2297 tmp |= wlmmcread(base,MMC_WRONG_NWID_L);
2298 printf("Wrong NWID's: %d\n", tmp);
2299 printf("THR_PRE_SET: 0x%x, ", wlmmcread(base,MMC_THR_PRE_SET));

--- 14 unchanged lines hidden (view full) ---

2314 continue;
2315 outw(MMCR(base),reg << 1);
2316 while (inw(HASR(base)) & HASR_MMC_BUSY)
2317 continue;
2318 return (u_short)inw(MMCR(base)) >> 8;
2319}
2320
2321static void
2215getsnr(int unit)
2322getsnr(struct wl_softc *sc)
2216{
2217 MMC_WRITE(MMC_FREEZE,1);
2218 /*
2219 * SNR retrieval procedure :
2220 *
2221 * read signal level : wlmmcread(base, MMC_SIGNAL_LVL);
2222 * read silence level : wlmmcread(base, MMC_SILENCE_LVL);
2223 */

--- 29 unchanged lines hidden (view full) ---

2253**
2254** Writes the psa for wavelan (unit) from the softc back to the
2255** board. Updates the CRC and sets the CRC OK flag.
2256**
2257** Do not call this when the board is operating, as it doesn't
2258** preserve the hacr.
2259*/
2260static void
2323{
2324 MMC_WRITE(MMC_FREEZE,1);
2325 /*
2326 * SNR retrieval procedure :
2327 *
2328 * read signal level : wlmmcread(base, MMC_SIGNAL_LVL);
2329 * read silence level : wlmmcread(base, MMC_SILENCE_LVL);
2330 */

--- 29 unchanged lines hidden (view full) ---

2360**
2361** Writes the psa for wavelan (unit) from the softc back to the
2362** board. Updates the CRC and sets the CRC OK flag.
2363**
2364** Do not call this when the board is operating, as it doesn't
2365** preserve the hacr.
2366*/
2367static void
2261wlsetpsa(int unit)
2368wlsetpsa(struct wl_softc *sc)
2262{
2369{
2263 struct wl_softc *sc = WLSOFTC(unit);
2264 short base = sc->base;
2265 int i, oldpri;
2266 u_short crc;
2267
2268 crc = wlpsacrc(sc->psa); /* calculate CRC of PSA */
2269 sc->psa[WLPSA_CRCLOW] = crc & 0xff;
2270 sc->psa[WLPSA_CRCHIGH] = (crc >> 8) & 0xff;
2271 sc->psa[WLPSA_CRCOK] = 0x55; /* default to 'bad' until programming complete */

--- 88 unchanged lines hidden (view full) ---

2360*/
2361static int wl_cache_iponly = 1;
2362SYSCTL_INT(_machdep, OID_AUTO, wl_cache_iponly, CTLFLAG_RW,
2363 &wl_cache_iponly, 0, "");
2364
2365/* zero out the cache
2366*/
2367static void
2370 short base = sc->base;
2371 int i, oldpri;
2372 u_short crc;
2373
2374 crc = wlpsacrc(sc->psa); /* calculate CRC of PSA */
2375 sc->psa[WLPSA_CRCLOW] = crc & 0xff;
2376 sc->psa[WLPSA_CRCHIGH] = (crc >> 8) & 0xff;
2377 sc->psa[WLPSA_CRCOK] = 0x55; /* default to 'bad' until programming complete */

--- 88 unchanged lines hidden (view full) ---

2466*/
2467static int wl_cache_iponly = 1;
2468SYSCTL_INT(_machdep, OID_AUTO, wl_cache_iponly, CTLFLAG_RW,
2469 &wl_cache_iponly, 0, "");
2470
2471/* zero out the cache
2472*/
2473static void
2368wl_cache_zero(int unit)
2474wl_cache_zero(struct wl_softc *sc)
2369{
2475{
2370 struct wl_softc *sc = WLSOFTC(unit);
2371
2372 bzero(&sc->w_sigcache[0], sizeof(struct w_sigcache) * MAXCACHEITEMS);
2373 sc->w_sigitems = 0;
2374 sc->w_nextcache = 0;
2375 sc->w_wrapindex = 0;
2376}
2377
2378/* store hw signal info in cache.
2379 * index is MAC address, but an ip src gets stored too
2380 * There are two filters here controllable via sysctl:
2381 * throw out unicast (on by default, but can be turned off)
2382 * throw out non-ip (on by default, but can be turned off)
2383 */
2384static
2476
2477 bzero(&sc->w_sigcache[0], sizeof(struct w_sigcache) * MAXCACHEITEMS);
2478 sc->w_sigitems = 0;
2479 sc->w_nextcache = 0;
2480 sc->w_wrapindex = 0;
2481}
2482
2483/* store hw signal info in cache.
2484 * index is MAC address, but an ip src gets stored too
2485 * There are two filters here controllable via sysctl:
2486 * throw out unicast (on by default, but can be turned off)
2487 * throw out non-ip (on by default, but can be turned off)
2488 */
2489static
2385void wl_cache_store (int unit, int base, struct ether_header *eh,
2490void wl_cache_store (struct wl_softc *sc, int base, struct ether_header *eh,
2386 struct mbuf *m)
2387{
2491 struct mbuf *m)
2492{
2493#ifdef INET
2388 struct ip *ip = NULL; /* Avoid GCC warning */
2389 int i;
2390 int signal, silence;
2391 int w_insertcache; /* computed index for cache entry storage */
2494 struct ip *ip = NULL; /* Avoid GCC warning */
2495 int i;
2496 int signal, silence;
2497 int w_insertcache; /* computed index for cache entry storage */
2392 struct wl_softc *sc = WLSOFTC(unit);
2393 int ipflag = wl_cache_iponly;
2498 int ipflag = wl_cache_iponly;
2499#endif
2394
2395 /* filters:
2396 * 1. ip only
2397 * 2. configurable filter to throw out unicast packets,
2398 * keep multicast only.
2399 */
2400
2401#ifdef INET

--- 99 unchanged lines hidden --- 		2500
2501 /* filters:
2502 * 1. ip only
2503 * 2. configurable filter to throw out unicast packets,
2504 * keep multicast only.
2505 */
2506
2507#ifdef INET

--- 99 unchanged lines hidden ---