| tw_cl_share.h (209860) | tw_cl_share.h (212008) |
|---|---|
| 1/* 2 * Copyright (c) 2004-07 Applied Micro Circuits Corporation. 3 * Copyright (c) 2004-05 Vinod Kashyap 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/* 2 * Copyright (c) 2004-07 Applied Micro Circuits Corporation. 3 * Copyright (c) 2004-05 Vinod Kashyap 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/dev/twa/tw_cl_share.h 209860 2010-07-09 17:38:15Z delphij $ | 27 * $FreeBSD: head/sys/dev/twa/tw_cl_share.h 212008 2010-08-30 19:15:04Z delphij $ |
| 28 */ 29 30/* 31 * AMCC'S 3ware driver for 9000 series storage controllers. 32 * 33 * Author: Vinod Kashyap 34 * Modifications by: Adam Radford 35 * Modifications by: Manjunath Ranganathaiah --- 308 unchanged lines hidden (view full) --- 344 */ 345 346#ifndef tw_osl_breakpoint 347/* Allows setting breakpoints in the CL code for debugging purposes. */ 348extern TW_VOID tw_osl_breakpoint(TW_VOID); 349#endif 350 351 | 28 */ 29 30/* 31 * AMCC'S 3ware driver for 9000 series storage controllers. 32 * 33 * Author: Vinod Kashyap 34 * Modifications by: Adam Radford 35 * Modifications by: Manjunath Ranganathaiah --- 308 unchanged lines hidden (view full) --- 344 */ 345 346#ifndef tw_osl_breakpoint 347/* Allows setting breakpoints in the CL code for debugging purposes. */ 348extern TW_VOID tw_osl_breakpoint(TW_VOID); 349#endif 350 351 |
| 352#ifndef tw_osl_ctlr_busy 353/* Called when CL is too busy to accept new requests. */ 354extern TW_VOID tw_osl_ctlr_busy(struct tw_cl_ctlr_handle *ctlr_handle, 355 struct tw_cl_req_handle *req_handle); | 352#ifndef tw_osl_timeout 353/* Start OS timeout() routine after controller reset sequence */ 354extern TW_VOID tw_osl_timeout(struct tw_cl_req_handle *req_handle); |
| 356#endif 357 | 355#endif 356 |
| 357#ifndef tw_osl_untimeout 358/* Stop OS timeout() routine during controller reset sequence */ 359extern TW_VOID tw_osl_untimeout(struct tw_cl_req_handle *req_handle); 360#endif |
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| 358 | 361 |
| 362 |
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| 359#ifndef tw_osl_cur_func 360/* Text name of current function. */ 361extern TW_INT8 *tw_osl_cur_func(TW_VOID); 362#endif 363 364 365#ifdef TW_OSL_DEBUG 366#ifndef tw_osl_dbg_printf --- 180 unchanged lines hidden (view full) --- 547/* Initialize Common Layer for a given controller. */ 548extern TW_INT32 tw_cl_init_ctlr(struct tw_cl_ctlr_handle *ctlr_handle, 549 TW_UINT32 flags, TW_INT32 device_id, TW_INT32 max_simult_reqs, 550 TW_INT32 max_aens, TW_VOID *non_dma_mem, TW_VOID *dma_mem, 551 TW_UINT64 dma_mem_phys 552 ); 553 554 | 363#ifndef tw_osl_cur_func 364/* Text name of current function. */ 365extern TW_INT8 *tw_osl_cur_func(TW_VOID); 366#endif 367 368 369#ifdef TW_OSL_DEBUG 370#ifndef tw_osl_dbg_printf --- 180 unchanged lines hidden (view full) --- 551/* Initialize Common Layer for a given controller. */ 552extern TW_INT32 tw_cl_init_ctlr(struct tw_cl_ctlr_handle *ctlr_handle, 553 TW_UINT32 flags, TW_INT32 device_id, TW_INT32 max_simult_reqs, 554 TW_INT32 max_aens, TW_VOID *non_dma_mem, TW_VOID *dma_mem, 555 TW_UINT64 dma_mem_phys 556 ); 557 558 |
| 559extern TW_VOID tw_cl_set_reset_needed(struct tw_cl_ctlr_handle *ctlr_handle); 560extern TW_INT32 tw_cl_is_reset_needed(struct tw_cl_ctlr_handle *ctlr_handle); 561extern TW_INT32 tw_cl_is_active(struct tw_cl_ctlr_handle *ctlr_handle); 562 |
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| 555/* CL's interrupt handler. */ 556extern TW_INT32 tw_cl_interrupt(struct tw_cl_ctlr_handle *ctlr_handle); 557 558 559/* CL's ioctl handler. */ 560extern TW_INT32 tw_cl_ioctl(struct tw_cl_ctlr_handle *ctlr_handle, 561 u_long cmd, TW_VOID *buf); 562 --- 33 unchanged lines hidden --- | 563/* CL's interrupt handler. */ 564extern TW_INT32 tw_cl_interrupt(struct tw_cl_ctlr_handle *ctlr_handle); 565 566 567/* CL's ioctl handler. */ 568extern TW_INT32 tw_cl_ioctl(struct tw_cl_ctlr_handle *ctlr_handle, 569 u_long cmd, TW_VOID *buf); 570 --- 33 unchanged lines hidden --- |