| syscons.h (30043) | syscons.h (30662) |
|---|---|
| 1/*- 2 * Copyright (c) 1995-1997 S�ren Schmidt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * | 1/*- 2 * Copyright (c) 1995-1997 S�ren Schmidt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * |
| 28 * $Id: syscons.h,v 1.33 1997/09/04 23:01:06 yokota Exp $ | 28 * $Id: syscons.h,v 1.34 1997/10/01 20:46:29 sos Exp $ |
| 29 */ 30 31#ifndef _I386_ISA_SYSCONS_H_ 32#define _I386_ISA_SYSCONS_H_ 33 34/* vm things */ 35#define ISMAPPED(pa, width) \ 36 (((pa) <= (u_long)0x1000 - (width)) \ --- 60 unchanged lines hidden (view full) --- 97#define BELL_DURATION 5 98#define BELL_PITCH 800 99#define CONSOLE_BUFSIZE 1024 100#define PCBURST 128 101#define FONT_NONE 1 102#define FONT_8 2 103#define FONT_14 4 104#define FONT_16 8 | 29 */ 30 31#ifndef _I386_ISA_SYSCONS_H_ 32#define _I386_ISA_SYSCONS_H_ 33 34/* vm things */ 35#define ISMAPPED(pa, width) \ 36 (((pa) <= (u_long)0x1000 - (width)) \ --- 60 unchanged lines hidden (view full) --- 97#define BELL_DURATION 5 98#define BELL_PITCH 800 99#define CONSOLE_BUFSIZE 1024 100#define PCBURST 128 101#define FONT_NONE 1 102#define FONT_8 2 103#define FONT_14 4 104#define FONT_16 8 |
| 105#if !defined(SC_HISTORY_SIZE) 106#define SC_HISTORY_SIZE (ROW * 4) 107#endif /* SC_HISTORY_SIZE */ 108#define HISTORY_SIZE (COL * (SC_HISTORY_SIZE)) | |
| 109 110/* defines related to hardware addresses */ 111#define MONO_BASE 0x3B4 /* crt controller base mono */ 112#define COLOR_BASE 0x3D4 /* crt controller base color */ 113#define MISC 0x3C2 /* misc output register */ 114#define ATC IO_VGA+0x00 /* attribute controller */ 115#define TSIDX IO_VGA+0x04 /* timing sequencer idx */ 116#define TSREG IO_VGA+0x05 /* timing sequencer data */ --- 89 unchanged lines hidden --- | 105 106/* defines related to hardware addresses */ 107#define MONO_BASE 0x3B4 /* crt controller base mono */ 108#define COLOR_BASE 0x3D4 /* crt controller base color */ 109#define MISC 0x3C2 /* misc output register */ 110#define ATC IO_VGA+0x00 /* attribute controller */ 111#define TSIDX IO_VGA+0x04 /* timing sequencer idx */ 112#define TSREG IO_VGA+0x05 /* timing sequencer data */ --- 89 unchanged lines hidden --- |