| if_re.c (185903) | if_re.c (186210) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@windriver.com>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 17 unchanged lines hidden (view full) --- 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@windriver.com>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 17 unchanged lines hidden (view full) --- 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> |
| 34__FBSDID("$FreeBSD: head/sys/dev/re/if_re.c 185903 2008-12-11 02:24:11Z yongari $"); | 34__FBSDID("$FreeBSD: head/sys/dev/re/if_re.c 186210 2008-12-17 06:01:03Z yongari $"); |
| 35 36/* 37 * RealTek 8139C+/8169/8169S/8110S/8168/8111/8101E PCI NIC driver 38 * 39 * Written by Bill Paul <wpaul@windriver.com> 40 * Senior Networking Software Engineer 41 * Wind River Systems 42 */ --- 1214 unchanged lines hidden (view full) --- 1257 case RL_HWREV_8168_SPIN1: 1258 case RL_HWREV_8168_SPIN2: 1259 sc->rl_flags |= RL_FLAG_WOLRXENB; 1260 /* FALLTHROUGH */ 1261 case RL_HWREV_8168_SPIN3: 1262 sc->rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE | 1263 RL_FLAG_MACSTAT; 1264 break; | 35 36/* 37 * RealTek 8139C+/8169/8169S/8110S/8168/8111/8101E PCI NIC driver 38 * 39 * Written by Bill Paul <wpaul@windriver.com> 40 * Senior Networking Software Engineer 41 * Wind River Systems 42 */ --- 1214 unchanged lines hidden (view full) --- 1257 case RL_HWREV_8168_SPIN1: 1258 case RL_HWREV_8168_SPIN2: 1259 sc->rl_flags |= RL_FLAG_WOLRXENB; 1260 /* FALLTHROUGH */ 1261 case RL_HWREV_8168_SPIN3: 1262 sc->rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE | 1263 RL_FLAG_MACSTAT; 1264 break; |
| 1265 case RL_HWREV_8168C: | |
| 1266 case RL_HWREV_8168C_SPIN2: | 1265 case RL_HWREV_8168C_SPIN2: |
| 1266 sc->rl_flags |= RL_FLAG_MACSLEEP; 1267 /* FALLTHROUGH */ 1268 case RL_HWREV_8168C: 1269 if ((hwrev & 0x00700000) == 0x00200000) 1270 sc->rl_flags |= RL_FLAG_MACSLEEP; 1271 /* FALLTHROUGH */ |
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| 1267 case RL_HWREV_8168CP: 1268 case RL_HWREV_8168D: 1269 sc->rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE | 1270 RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | 1271 RL_FLAG_CMDSTOP; 1272 /* 1273 * These controllers support jumbo frame but it seems 1274 * that enabling it requires touching additional magic --- 71 unchanged lines hidden (view full) --- 1346 1347 ifp = sc->rl_ifp = if_alloc(IFT_ETHER); 1348 if (ifp == NULL) { 1349 device_printf(dev, "can not if_alloc()\n"); 1350 error = ENOSPC; 1351 goto fail; 1352 } 1353 | 1272 case RL_HWREV_8168CP: 1273 case RL_HWREV_8168D: 1274 sc->rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE | 1275 RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | 1276 RL_FLAG_CMDSTOP; 1277 /* 1278 * These controllers support jumbo frame but it seems 1279 * that enabling it requires touching additional magic --- 71 unchanged lines hidden (view full) --- 1351 1352 ifp = sc->rl_ifp = if_alloc(IFT_ETHER); 1353 if (ifp == NULL) { 1354 device_printf(dev, "can not if_alloc()\n"); 1355 error = ENOSPC; 1356 goto fail; 1357 } 1358 |
| 1359 /* Take controller out of deep sleep mode. */ 1360 if ((sc->rl_flags & RL_FLAG_MACSLEEP) != 0) { 1361 if ((CSR_READ_1(sc, RL_MACDBG) & 0x80) == 0x80) 1362 CSR_WRITE_1(sc, RL_GPIO, 1363 CSR_READ_1(sc, RL_GPIO) | 0x01); 1364 else 1365 CSR_WRITE_1(sc, RL_GPIO, 1366 CSR_READ_1(sc, RL_GPIO) & ~0x01); 1367 } 1368 |
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| 1354 /* Take PHY out of power down mode. */ 1355 if ((sc->rl_flags & RL_FLAG_PHYWAKE) != 0) { 1356 re_gmii_writereg(dev, 1, 0x1f, 0); 1357 re_gmii_writereg(dev, 1, 0x0e, 0); 1358 } 1359 1360 /* Do MII setup */ 1361 if (mii_phy_probe(dev, &sc->rl_miibus, --- 1596 unchanged lines hidden (view full) --- 2958 struct rl_softc *sc; 2959 struct ifnet *ifp; 2960 2961 sc = device_get_softc(dev); 2962 2963 RL_LOCK(sc); 2964 2965 ifp = sc->rl_ifp; | 1369 /* Take PHY out of power down mode. */ 1370 if ((sc->rl_flags & RL_FLAG_PHYWAKE) != 0) { 1371 re_gmii_writereg(dev, 1, 0x1f, 0); 1372 re_gmii_writereg(dev, 1, 0x0e, 0); 1373 } 1374 1375 /* Do MII setup */ 1376 if (mii_phy_probe(dev, &sc->rl_miibus, --- 1596 unchanged lines hidden (view full) --- 2973 struct rl_softc *sc; 2974 struct ifnet *ifp; 2975 2976 sc = device_get_softc(dev); 2977 2978 RL_LOCK(sc); 2979 2980 ifp = sc->rl_ifp; |
| 2981 /* Take controller out of sleep mode. */ 2982 if ((sc->rl_flags & RL_FLAG_MACSLEEP) != 0) { 2983 if ((CSR_READ_1(sc, RL_MACDBG) & 0x80) == 0x80) 2984 CSR_WRITE_1(sc, RL_GPIO, 2985 CSR_READ_1(sc, RL_GPIO) | 0x01); 2986 } |
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| 2966 2967 /* reinitialize interface if necessary */ 2968 if (ifp->if_flags & IFF_UP) 2969 re_init_locked(sc); 2970 2971 /* 2972 * Clear WOL matching such that normal Rx filtering 2973 * wouldn't interfere with WOL patterns. --- 39 unchanged lines hidden (view full) --- 3013 uint8_t v; 3014 3015 RL_LOCK_ASSERT(sc); 3016 3017 if (pci_find_extcap(sc->rl_dev, PCIY_PMG, &pmc) != 0) 3018 return; 3019 3020 ifp = sc->rl_ifp; | 2987 2988 /* reinitialize interface if necessary */ 2989 if (ifp->if_flags & IFF_UP) 2990 re_init_locked(sc); 2991 2992 /* 2993 * Clear WOL matching such that normal Rx filtering 2994 * wouldn't interfere with WOL patterns. --- 39 unchanged lines hidden (view full) --- 3034 uint8_t v; 3035 3036 RL_LOCK_ASSERT(sc); 3037 3038 if (pci_find_extcap(sc->rl_dev, PCIY_PMG, &pmc) != 0) 3039 return; 3040 3041 ifp = sc->rl_ifp; |
| 3042 /* Put controller into sleep mode. */ 3043 if ((sc->rl_flags & RL_FLAG_MACSLEEP) != 0) { 3044 if ((CSR_READ_1(sc, RL_MACDBG) & 0x80) == 0x80) 3045 CSR_WRITE_1(sc, RL_GPIO, 3046 CSR_READ_1(sc, RL_GPIO) & ~0x01); 3047 } |
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| 3021 if ((ifp->if_capenable & IFCAP_WOL) != 0 && 3022 (sc->rl_flags & RL_FLAG_WOLRXENB) != 0) 3023 CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_RX_ENB); 3024 /* Enable config register write. */ 3025 CSR_WRITE_1(sc, RL_EECMD, RL_EE_MODE); 3026 3027 /* Enable PME. */ 3028 v = CSR_READ_1(sc, RL_CFG1); --- 65 unchanged lines hidden --- | 3048 if ((ifp->if_capenable & IFCAP_WOL) != 0 && 3049 (sc->rl_flags & RL_FLAG_WOLRXENB) != 0) 3050 CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_RX_ENB); 3051 /* Enable config register write. */ 3052 CSR_WRITE_1(sc, RL_EECMD, RL_EE_MODE); 3053 3054 /* Enable PME. */ 3055 v = CSR_READ_1(sc, RL_CFG1); --- 65 unchanged lines hidden --- |