pci_pci.c (279470) | pci_pci.c (280970) |
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1/*- 2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000 BSDi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 15 unchanged lines hidden (view full) --- 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000 BSDi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 15 unchanged lines hidden (view full) --- 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31#include <sys/cdefs.h> |
32__FBSDID("$FreeBSD: stable/10/sys/dev/pci/pci_pci.c 279470 2015-03-01 04:22:06Z rstone $"); | 32__FBSDID("$FreeBSD: stable/10/sys/dev/pci/pci_pci.c 280970 2015-04-01 21:48:54Z jhb $"); |
33 34/* 35 * PCI:PCI bridge support. 36 */ 37 38#include <sys/param.h> 39#include <sys/bus.h> 40#include <sys/kernel.h> --- 84 unchanged lines hidden (view full) --- 125 * Is a resource from a child device sub-allocated from one of our 126 * resource managers? 127 */ 128static int 129pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r) 130{ 131 132 switch (type) { | 33 34/* 35 * PCI:PCI bridge support. 36 */ 37 38#include <sys/param.h> 39#include <sys/bus.h> 40#include <sys/kernel.h> --- 84 unchanged lines hidden (view full) --- 125 * Is a resource from a child device sub-allocated from one of our 126 * resource managers? 127 */ 128static int 129pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r) 130{ 131 132 switch (type) { |
133#ifdef PCI_RES_BUS 134 case PCI_RES_BUS: 135 return (rman_is_region_manager(r, &sc->bus.rman)); 136#endif |
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133 case SYS_RES_IOPORT: 134 return (rman_is_region_manager(r, &sc->io.rman)); 135 case SYS_RES_MEMORY: 136 /* Prefetchable resources may live in either memory rman. */ 137 if (rman_get_flags(r) & RF_PREFETCHABLE && 138 rman_is_region_manager(r, &sc->pmem.rman)) 139 return (1); 140 return (rman_is_region_manager(r, &sc->mem.rman)); --- 388 unchanged lines hidden (view full) --- 529 pci_read_config(dev, PCIR_PMLIMITL_1, 2)); 530 max = 0xffffffff; 531 } 532 pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY, 533 RF_PREFETCHABLE, max); 534 } 535} 536 | 137 case SYS_RES_IOPORT: 138 return (rman_is_region_manager(r, &sc->io.rman)); 139 case SYS_RES_MEMORY: 140 /* Prefetchable resources may live in either memory rman. */ 141 if (rman_get_flags(r) & RF_PREFETCHABLE && 142 rman_is_region_manager(r, &sc->pmem.rman)) 143 return (1); 144 return (rman_is_region_manager(r, &sc->mem.rman)); --- 388 unchanged lines hidden (view full) --- 533 pci_read_config(dev, PCIR_PMLIMITL_1, 2)); 534 max = 0xffffffff; 535 } 536 pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY, 537 RF_PREFETCHABLE, max); 538 } 539} 540 |
541#ifdef PCI_RES_BUS 542/* 543 * Allocate a suitable secondary bus for this bridge if needed and 544 * initialize the resource manager for the secondary bus range. Note 545 * that the minimum count is a desired value and this may allocate a 546 * smaller range. 547 */ 548void 549pcib_setup_secbus(device_t dev, struct pcib_secbus *bus, int min_count) 550{ 551 char buf[64]; 552 int error, rid; 553 554 switch (pci_read_config(dev, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) { 555 case PCIM_HDRTYPE_BRIDGE: 556 bus->sub_reg = PCIR_SUBBUS_1; 557 break; 558 case PCIM_HDRTYPE_CARDBUS: 559 bus->sub_reg = PCIR_SUBBUS_2; 560 break; 561 default: 562 panic("not a PCI bridge"); 563 } 564 bus->dev = dev; 565 bus->rman.rm_start = 0; 566 bus->rman.rm_end = PCI_BUSMAX; 567 bus->rman.rm_type = RMAN_ARRAY; 568 snprintf(buf, sizeof(buf), "%s bus numbers", device_get_nameunit(dev)); 569 bus->rman.rm_descr = strdup(buf, M_DEVBUF); 570 error = rman_init(&bus->rman); 571 if (error) 572 panic("Failed to initialize %s bus number rman", 573 device_get_nameunit(dev)); 574 575 /* 576 * Allocate a bus range. This will return an existing bus range 577 * if one exists, or a new bus range if one does not. 578 */ 579 rid = 0; 580 bus->res = bus_alloc_resource(dev, PCI_RES_BUS, &rid, 0ul, ~0ul, 581 min_count, 0); 582 if (bus->res == NULL) { 583 /* 584 * Fall back to just allocating a range of a single bus 585 * number. 586 */ 587 bus->res = bus_alloc_resource(dev, PCI_RES_BUS, &rid, 0ul, ~0ul, 588 1, 0); 589 } else if (rman_get_size(bus->res) < min_count) 590 /* 591 * Attempt to grow the existing range to satisfy the 592 * minimum desired count. 593 */ 594 (void)bus_adjust_resource(dev, PCI_RES_BUS, bus->res, 595 rman_get_start(bus->res), rman_get_start(bus->res) + 596 min_count - 1); 597 598 /* 599 * Add the initial resource to the rman. 600 */ 601 if (bus->res != NULL) { 602 error = rman_manage_region(&bus->rman, rman_get_start(bus->res), 603 rman_get_end(bus->res)); 604 if (error) 605 panic("Failed to add resource to rman"); 606 bus->sec = rman_get_start(bus->res); 607 bus->sub = rman_get_end(bus->res); 608 } 609} 610 611static struct resource * 612pcib_suballoc_bus(struct pcib_secbus *bus, device_t child, int *rid, 613 u_long start, u_long end, u_long count, u_int flags) 614{ 615 struct resource *res; 616 617 res = rman_reserve_resource(&bus->rman, start, end, count, flags, 618 child); 619 if (res == NULL) 620 return (NULL); 621 622 if (bootverbose) 623 device_printf(bus->dev, 624 "allocated bus range (%lu-%lu) for rid %d of %s\n", 625 rman_get_start(res), rman_get_end(res), *rid, 626 pcib_child_name(child)); 627 rman_set_rid(res, *rid); 628 return (res); 629} 630 631/* 632 * Attempt to grow the secondary bus range. This is much simpler than 633 * for I/O windows as the range can only be grown by increasing 634 * subbus. 635 */ 636static int 637pcib_grow_subbus(struct pcib_secbus *bus, u_long new_end) 638{ 639 u_long old_end; 640 int error; 641 642 old_end = rman_get_end(bus->res); 643 KASSERT(new_end > old_end, ("attempt to shrink subbus")); 644 error = bus_adjust_resource(bus->dev, PCI_RES_BUS, bus->res, 645 rman_get_start(bus->res), new_end); 646 if (error) 647 return (error); 648 if (bootverbose) 649 device_printf(bus->dev, "grew bus range to %lu-%lu\n", 650 rman_get_start(bus->res), rman_get_end(bus->res)); 651 error = rman_manage_region(&bus->rman, old_end + 1, 652 rman_get_end(bus->res)); 653 if (error) 654 panic("Failed to add resource to rman"); 655 bus->sub = rman_get_end(bus->res); 656 pci_write_config(bus->dev, bus->sub_reg, bus->sub, 1); 657 return (0); 658} 659 660struct resource * 661pcib_alloc_subbus(struct pcib_secbus *bus, device_t child, int *rid, 662 u_long start, u_long end, u_long count, u_int flags) 663{ 664 struct resource *res; 665 u_long start_free, end_free, new_end; 666 667 /* 668 * First, see if the request can be satisified by the existing 669 * bus range. 670 */ 671 res = pcib_suballoc_bus(bus, child, rid, start, end, count, flags); 672 if (res != NULL) 673 return (res); 674 675 /* 676 * Figure out a range to grow the bus range. First, find the 677 * first bus number after the last allocated bus in the rman and 678 * enforce that as a minimum starting point for the range. 679 */ 680 if (rman_last_free_region(&bus->rman, &start_free, &end_free) != 0 || 681 end_free != bus->sub) 682 start_free = bus->sub + 1; 683 if (start_free < start) 684 start_free = start; 685 new_end = start_free + count - 1; 686 687 /* 688 * See if this new range would satisfy the request if it 689 * succeeds. 690 */ 691 if (new_end > end) 692 return (NULL); 693 694 /* Finally, attempt to grow the existing resource. */ 695 if (bootverbose) { 696 device_printf(bus->dev, 697 "attempting to grow bus range for %lu buses\n", count); 698 printf("\tback candidate range: %lu-%lu\n", start_free, 699 new_end); 700 } 701 if (pcib_grow_subbus(bus, new_end) == 0) 702 return (pcib_suballoc_bus(bus, child, rid, start, end, count, 703 flags)); 704 return (NULL); 705} 706#endif 707 |
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537#else 538 539/* 540 * Is the prefetch window open (eg, can we allocate memory in it?) 541 */ 542static int 543pcib_is_prefetch_open(struct pcib_softc *sc) 544{ --- 130 unchanged lines hidden (view full) --- 675pcib_cfg_save(struct pcib_softc *sc) 676{ 677 device_t dev; 678 679 dev = sc->dev; 680 681 sc->command = pci_read_config(dev, PCIR_COMMAND, 2); 682 sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1); | 708#else 709 710/* 711 * Is the prefetch window open (eg, can we allocate memory in it?) 712 */ 713static int 714pcib_is_prefetch_open(struct pcib_softc *sc) 715{ --- 130 unchanged lines hidden (view full) --- 846pcib_cfg_save(struct pcib_softc *sc) 847{ 848 device_t dev; 849 850 dev = sc->dev; 851 852 sc->command = pci_read_config(dev, PCIR_COMMAND, 2); 853 sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1); |
683 sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1); 684 sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); | 854 sc->bus.sec = pci_read_config(dev, PCIR_SECBUS_1, 1); 855 sc->bus.sub = pci_read_config(dev, PCIR_SUBBUS_1, 1); |
685 sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2); 686 sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1); 687#ifndef NEW_PCIB 688 if (sc->command & PCIM_CMD_PORTEN) 689 pcib_get_io_decode(sc); 690 if (sc->command & PCIM_CMD_MEMEN) 691 pcib_get_mem_decode(sc); 692#endif --- 6 unchanged lines hidden (view full) --- 699pcib_cfg_restore(struct pcib_softc *sc) 700{ 701 device_t dev; 702 703 dev = sc->dev; 704 705 pci_write_config(dev, PCIR_COMMAND, sc->command, 2); 706 pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1); | 856 sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2); 857 sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1); 858#ifndef NEW_PCIB 859 if (sc->command & PCIM_CMD_PORTEN) 860 pcib_get_io_decode(sc); 861 if (sc->command & PCIM_CMD_MEMEN) 862 pcib_get_mem_decode(sc); 863#endif --- 6 unchanged lines hidden (view full) --- 870pcib_cfg_restore(struct pcib_softc *sc) 871{ 872 device_t dev; 873 874 dev = sc->dev; 875 876 pci_write_config(dev, PCIR_COMMAND, sc->command, 2); 877 pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1); |
707 pci_write_config(dev, PCIR_SECBUS_1, sc->secbus, 1); 708 pci_write_config(dev, PCIR_SUBBUS_1, sc->subbus, 1); | 878 pci_write_config(dev, PCIR_SECBUS_1, sc->bus.sec, 1); 879 pci_write_config(dev, PCIR_SUBBUS_1, sc->bus.sub, 1); |
709 pci_write_config(dev, PCIR_BRIDGECTL_1, sc->bridgectl, 2); 710 pci_write_config(dev, PCIR_SECLAT_1, sc->seclat, 1); 711#ifdef NEW_PCIB 712 pcib_write_windows(sc, WIN_IO | WIN_MEM | WIN_PMEM); 713#else 714 if (sc->command & PCIM_CMD_PORTEN) 715 pcib_set_io_decode(sc); 716 if (sc->command & PCIM_CMD_MEMEN) --- 29 unchanged lines hidden (view full) --- 746 /* 747 * Get current bridge configuration. 748 */ 749 sc->domain = pci_get_domain(dev); 750 sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2); 751 pcib_cfg_save(sc); 752 753 /* | 880 pci_write_config(dev, PCIR_BRIDGECTL_1, sc->bridgectl, 2); 881 pci_write_config(dev, PCIR_SECLAT_1, sc->seclat, 1); 882#ifdef NEW_PCIB 883 pcib_write_windows(sc, WIN_IO | WIN_MEM | WIN_PMEM); 884#else 885 if (sc->command & PCIM_CMD_PORTEN) 886 pcib_set_io_decode(sc); 887 if (sc->command & PCIM_CMD_MEMEN) --- 29 unchanged lines hidden (view full) --- 917 /* 918 * Get current bridge configuration. 919 */ 920 sc->domain = pci_get_domain(dev); 921 sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2); 922 pcib_cfg_save(sc); 923 924 /* |
925 * The primary bus register should always be the bus of the 926 * parent. 927 */ 928 sc->pribus = pci_get_bus(dev); 929 pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1); 930 931 /* |
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754 * Setup sysctl reporting nodes 755 */ 756 sctx = device_get_sysctl_ctx(dev); 757 soid = device_get_sysctl_tree(dev); 758 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain", 759 CTLFLAG_RD, &sc->domain, 0, "Domain number"); 760 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus", 761 CTLFLAG_RD, &sc->pribus, 0, "Primary bus number"); 762 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus", | 932 * Setup sysctl reporting nodes 933 */ 934 sctx = device_get_sysctl_ctx(dev); 935 soid = device_get_sysctl_tree(dev); 936 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain", 937 CTLFLAG_RD, &sc->domain, 0, "Domain number"); 938 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus", 939 CTLFLAG_RD, &sc->pribus, 0, "Primary bus number"); 940 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus", |
763 CTLFLAG_RD, &sc->secbus, 0, "Secondary bus number"); | 941 CTLFLAG_RD, &sc->bus.sec, 0, "Secondary bus number"); |
764 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus", | 942 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus", |
765 CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number"); | 943 CTLFLAG_RD, &sc->bus.sub, 0, "Subordinate bus number"); |
766 767 /* 768 * Quirk handling. 769 */ 770 switch (pci_get_devid(dev)) { | 944 945 /* 946 * Quirk handling. 947 */ 948 switch (pci_get_devid(dev)) { |
949#if !defined(NEW_PCIB) && !defined(PCI_RES_BUS) |
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771 case 0x12258086: /* Intel 82454KX/GX (Orion) */ 772 { 773 uint8_t supbus; 774 775 supbus = pci_read_config(dev, 0x41, 1); 776 if (supbus != 0xff) { | 950 case 0x12258086: /* Intel 82454KX/GX (Orion) */ 951 { 952 uint8_t supbus; 953 954 supbus = pci_read_config(dev, 0x41, 1); 955 if (supbus != 0xff) { |
777 sc->secbus = supbus + 1; 778 sc->subbus = supbus + 1; | 956 sc->bus.sec = supbus + 1; 957 sc->bus.sub = supbus + 1; |
779 } 780 break; 781 } | 958 } 959 break; 960 } |
961#endif |
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782 783 /* 784 * The i82380FB mobile docking controller is a PCI-PCI bridge, 785 * and it is a subtractive bridge. However, the ProgIf is wrong 786 * so the normal setting of PCIB_SUBTRACTIVE bit doesn't 787 * happen. There's also a Toshiba bridge that behaves this 788 * way. 789 */ 790 case 0x124b8086: /* Intel 82380FB Mobile */ 791 case 0x060513d7: /* Toshiba ???? */ 792 sc->flags |= PCIB_SUBTRACTIVE; 793 break; 794 | 962 963 /* 964 * The i82380FB mobile docking controller is a PCI-PCI bridge, 965 * and it is a subtractive bridge. However, the ProgIf is wrong 966 * so the normal setting of PCIB_SUBTRACTIVE bit doesn't 967 * happen. There's also a Toshiba bridge that behaves this 968 * way. 969 */ 970 case 0x124b8086: /* Intel 82380FB Mobile */ 971 case 0x060513d7: /* Toshiba ???? */ 972 sc->flags |= PCIB_SUBTRACTIVE; 973 break; 974 |
975#if !defined(NEW_PCIB) && !defined(PCI_RES_BUS) |
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795 /* Compaq R3000 BIOS sets wrong subordinate bus number. */ 796 case 0x00dd10de: 797 { 798 char *cp; 799 800 if ((cp = getenv("smbios.planar.maker")) == NULL) 801 break; 802 if (strncmp(cp, "Compal", 6) != 0) { 803 freeenv(cp); 804 break; 805 } 806 freeenv(cp); 807 if ((cp = getenv("smbios.planar.product")) == NULL) 808 break; 809 if (strncmp(cp, "08A0", 4) != 0) { 810 freeenv(cp); 811 break; 812 } 813 freeenv(cp); | 976 /* Compaq R3000 BIOS sets wrong subordinate bus number. */ 977 case 0x00dd10de: 978 { 979 char *cp; 980 981 if ((cp = getenv("smbios.planar.maker")) == NULL) 982 break; 983 if (strncmp(cp, "Compal", 6) != 0) { 984 freeenv(cp); 985 break; 986 } 987 freeenv(cp); 988 if ((cp = getenv("smbios.planar.product")) == NULL) 989 break; 990 if (strncmp(cp, "08A0", 4) != 0) { 991 freeenv(cp); 992 break; 993 } 994 freeenv(cp); |
814 if (sc->subbus < 0xa) { | 995 if (sc->bus.sub < 0xa) { |
815 pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1); | 996 pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1); |
816 sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); | 997 sc->bus.sub = pci_read_config(dev, PCIR_SUBBUS_1, 1); |
817 } 818 break; 819 } | 998 } 999 break; 1000 } |
1001#endif |
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820 } 821 822 if (pci_msi_device_blacklisted(dev)) 823 sc->flags |= PCIB_DISABLE_MSI; 824 825 if (pci_msix_device_blacklisted(dev)) 826 sc->flags |= PCIB_DISABLE_MSIX; 827 --- 5 unchanged lines hidden (view full) --- 833 * bridges and pass all transactions. Mark them and real ProgIf 1 834 * parts as subtractive. 835 */ 836 if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 || 837 pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE) 838 sc->flags |= PCIB_SUBTRACTIVE; 839 840#ifdef NEW_PCIB | 1002 } 1003 1004 if (pci_msi_device_blacklisted(dev)) 1005 sc->flags |= PCIB_DISABLE_MSI; 1006 1007 if (pci_msix_device_blacklisted(dev)) 1008 sc->flags |= PCIB_DISABLE_MSIX; 1009 --- 5 unchanged lines hidden (view full) --- 1015 * bridges and pass all transactions. Mark them and real ProgIf 1 1016 * parts as subtractive. 1017 */ 1018 if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 || 1019 pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE) 1020 sc->flags |= PCIB_SUBTRACTIVE; 1021 1022#ifdef NEW_PCIB |
1023#ifdef PCI_RES_BUS 1024 pcib_setup_secbus(dev, &sc->bus, 1); 1025#endif |
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841 pcib_probe_windows(sc); 842#endif 843 if (bootverbose) { 844 device_printf(dev, " domain %d\n", sc->domain); | 1026 pcib_probe_windows(sc); 1027#endif 1028 if (bootverbose) { 1029 device_printf(dev, " domain %d\n", sc->domain); |
845 device_printf(dev, " secondary bus %d\n", sc->secbus); 846 device_printf(dev, " subordinate bus %d\n", sc->subbus); | 1030 device_printf(dev, " secondary bus %d\n", sc->bus.sec); 1031 device_printf(dev, " subordinate bus %d\n", sc->bus.sub); |
847#ifdef NEW_PCIB 848 if (pcib_is_window_open(&sc->io)) 849 device_printf(dev, " I/O decode 0x%jx-0x%jx\n", 850 (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit); 851 if (pcib_is_window_open(&sc->mem)) 852 device_printf(dev, " memory decode 0x%jx-0x%jx\n", 853 (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit); 854 if (pcib_is_window_open(&sc->pmem)) --- 24 unchanged lines hidden (view full) --- 879 } 880 if (sc->flags & PCIB_SUBTRACTIVE) 881 printf("%ssubtractive", comma ? ", " : ""); 882 printf("\n"); 883 } 884 } 885 886 /* | 1032#ifdef NEW_PCIB 1033 if (pcib_is_window_open(&sc->io)) 1034 device_printf(dev, " I/O decode 0x%jx-0x%jx\n", 1035 (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit); 1036 if (pcib_is_window_open(&sc->mem)) 1037 device_printf(dev, " memory decode 0x%jx-0x%jx\n", 1038 (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit); 1039 if (pcib_is_window_open(&sc->pmem)) --- 24 unchanged lines hidden (view full) --- 1064 } 1065 if (sc->flags & PCIB_SUBTRACTIVE) 1066 printf("%ssubtractive", comma ? ", " : ""); 1067 printf("\n"); 1068 } 1069 } 1070 1071 /* |
887 * XXX If the secondary bus number is zero, we should assign a bus number 888 * since the BIOS hasn't, then initialise the bridge. A simple 889 * bus_alloc_resource with the a couple of busses seems like the right 890 * approach, but we don't know what busses the BIOS might have already 891 * assigned to other bridges on this bus that probe later than we do. 892 * 893 * If the subordinate bus number is less than the secondary bus number, 894 * we should pick a better value. One sensible alternative would be to 895 * pick 255; the only tradeoff here is that configuration transactions 896 * would be more widely routed than absolutely necessary. We could 897 * then do a walk of the tree later and fix it. 898 */ 899 900 /* | |
901 * Always enable busmastering on bridges so that transactions 902 * initiated on the secondary bus are passed through to the 903 * primary bus. 904 */ 905 pci_enable_busmaster(dev); 906} 907 908int 909pcib_attach(device_t dev) 910{ 911 struct pcib_softc *sc; 912 device_t child; 913 914 pcib_attach_common(dev); 915 sc = device_get_softc(dev); | 1072 * Always enable busmastering on bridges so that transactions 1073 * initiated on the secondary bus are passed through to the 1074 * primary bus. 1075 */ 1076 pci_enable_busmaster(dev); 1077} 1078 1079int 1080pcib_attach(device_t dev) 1081{ 1082 struct pcib_softc *sc; 1083 device_t child; 1084 1085 pcib_attach_common(dev); 1086 sc = device_get_softc(dev); |
916 if (sc->secbus != 0) { 917 child = device_add_child(dev, "pci", sc->secbus); | 1087 if (sc->bus.sec != 0) { 1088 child = device_add_child(dev, "pci", sc->bus.sec); |
918 if (child != NULL) 919 return(bus_generic_attach(dev)); 920 } 921 922 /* no secondary bus; we should have fixed this */ 923 return(0); 924} 925 --- 35 unchanged lines hidden (view full) --- 961{ 962 struct pcib_softc *sc = device_get_softc(dev); 963 964 switch (which) { 965 case PCIB_IVAR_DOMAIN: 966 *result = sc->domain; 967 return(0); 968 case PCIB_IVAR_BUS: | 1089 if (child != NULL) 1090 return(bus_generic_attach(dev)); 1091 } 1092 1093 /* no secondary bus; we should have fixed this */ 1094 return(0); 1095} 1096 --- 35 unchanged lines hidden (view full) --- 1132{ 1133 struct pcib_softc *sc = device_get_softc(dev); 1134 1135 switch (which) { 1136 case PCIB_IVAR_DOMAIN: 1137 *result = sc->domain; 1138 return(0); 1139 case PCIB_IVAR_BUS: |
969 *result = sc->secbus; | 1140 *result = sc->bus.sec; |
970 return(0); 971 } 972 return(ENOENT); 973} 974 975int 976pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 977{ | 1141 return(0); 1142 } 1143 return(ENOENT); 1144} 1145 1146int 1147pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 1148{ |
978 struct pcib_softc *sc = device_get_softc(dev); | |
979 980 switch (which) { 981 case PCIB_IVAR_DOMAIN: 982 return(EINVAL); 983 case PCIB_IVAR_BUS: | 1149 1150 switch (which) { 1151 case PCIB_IVAR_DOMAIN: 1152 return(EINVAL); 1153 case PCIB_IVAR_BUS: |
984 sc->secbus = value; 985 return(0); | 1154 return(EINVAL); |
986 } 987 return(ENOENT); 988} 989 990#ifdef NEW_PCIB 991/* 992 * Attempt to allocate a resource from the existing resources assigned 993 * to a window. --- 393 unchanged lines hidden (view full) --- 1387 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE) 1388 return (bus_generic_alloc_resource(dev, child, type, 1389 rid, start, end, count, flags)); 1390 else 1391 return (NULL); 1392 } 1393 1394 switch (type) { | 1155 } 1156 return(ENOENT); 1157} 1158 1159#ifdef NEW_PCIB 1160/* 1161 * Attempt to allocate a resource from the existing resources assigned 1162 * to a window. --- 393 unchanged lines hidden (view full) --- 1556 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE) 1557 return (bus_generic_alloc_resource(dev, child, type, 1558 rid, start, end, count, flags)); 1559 else 1560 return (NULL); 1561 } 1562 1563 switch (type) { |
1564#ifdef PCI_RES_BUS 1565 case PCI_RES_BUS: 1566 return (pcib_alloc_subbus(&sc->bus, child, rid, start, end, 1567 count, flags)); 1568#endif |
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1395 case SYS_RES_IOPORT: 1396 if (pcib_is_isa_range(sc, start, end, count)) 1397 return (NULL); 1398 r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start, 1399 end, count, flags); 1400 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0) 1401 break; 1402 if (pcib_grow_window(sc, &sc->io, type, start, end, count, --- 520 unchanged lines hidden --- | 1569 case SYS_RES_IOPORT: 1570 if (pcib_is_isa_range(sc, start, end, count)) 1571 return (NULL); 1572 r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start, 1573 end, count, flags); 1574 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0) 1575 break; 1576 if (pcib_grow_window(sc, &sc->io, type, start, end, count, --- 520 unchanged lines hidden --- |