| if_msk.c (204539) | if_msk.c (204540) |
|---|---|
| 1/****************************************************************************** 2 * 3 * Name : sky2.c 4 * Project: Gigabit Ethernet Driver for FreeBSD 5.x/6.x 5 * Version: $Revision: 1.23 $ 6 * Date : $Date: 2005/12/22 09:04:11 $ 7 * Purpose: Main driver source file 8 * --- 85 unchanged lines hidden (view full) --- 94 95/* 96 * Device driver for the Marvell Yukon II Ethernet controller. 97 * Due to lack of documentation, this driver is based on the code from 98 * sk(4) and Marvell's myk(4) driver for FreeBSD 5.x. 99 */ 100 101#include <sys/cdefs.h> | 1/****************************************************************************** 2 * 3 * Name : sky2.c 4 * Project: Gigabit Ethernet Driver for FreeBSD 5.x/6.x 5 * Version: $Revision: 1.23 $ 6 * Date : $Date: 2005/12/22 09:04:11 $ 7 * Purpose: Main driver source file 8 * --- 85 unchanged lines hidden (view full) --- 94 95/* 96 * Device driver for the Marvell Yukon II Ethernet controller. 97 * Due to lack of documentation, this driver is based on the code from 98 * sk(4) and Marvell's myk(4) driver for FreeBSD 5.x. 99 */ 100 101#include <sys/cdefs.h> |
| 102__FBSDID("$FreeBSD: head/sys/dev/msk/if_msk.c 204539 2010-03-01 22:43:22Z yongari $"); | 102__FBSDID("$FreeBSD: head/sys/dev/msk/if_msk.c 204540 2010-03-01 22:55:35Z yongari $"); |
| 103 104#include <sys/param.h> 105#include <sys/systm.h> 106#include <sys/bus.h> 107#include <sys/endian.h> 108#include <sys/mbuf.h> 109#include <sys/malloc.h> 110#include <sys/kernel.h> --- 416 unchanged lines hidden (view full) --- 527 break; 528 case IFM_100_TX: 529 gmac |= GM_GPCR_SPEED_100; 530 break; 531 case IFM_10_T: 532 break; 533 } 534 | 103 104#include <sys/param.h> 105#include <sys/systm.h> 106#include <sys/bus.h> 107#include <sys/endian.h> 108#include <sys/mbuf.h> 109#include <sys/malloc.h> 110#include <sys/kernel.h> --- 416 unchanged lines hidden (view full) --- 527 break; 528 case IFM_100_TX: 529 gmac |= GM_GPCR_SPEED_100; 530 break; 531 case IFM_10_T: 532 break; 533 } 534 |
| 535 if (((mii->mii_media_active & IFM_GMASK) & IFM_FDX) != 0) 536 gmac |= GM_GPCR_DUP_FULL; | |
| 537 /* Disable Rx flow control. */ | 535 /* Disable Rx flow control. */ |
| 538 if (((mii->mii_media_active & IFM_GMASK) & IFM_FLAG0) == 0) | 536 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FLAG0) == 0) |
| 539 gmac |= GM_GPCR_FC_RX_DIS; 540 /* Disable Tx flow control. */ | 537 gmac |= GM_GPCR_FC_RX_DIS; 538 /* Disable Tx flow control. */ |
| 541 if (((mii->mii_media_active & IFM_GMASK) & IFM_FLAG1) == 0) | 539 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FLAG1) == 0) |
| 542 gmac |= GM_GPCR_FC_TX_DIS; | 540 gmac |= GM_GPCR_FC_TX_DIS; |
| 541 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) 542 gmac |= GM_GPCR_DUP_FULL; 543 else 544 gmac |= GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS; |
|
| 543 gmac |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA; 544 GMAC_WRITE_2(sc, sc_if->msk_port, GM_GP_CTRL, gmac); 545 /* Read again to ensure writing. */ 546 GMAC_READ_2(sc, sc_if->msk_port, GM_GP_CTRL); | 545 gmac |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA; 546 GMAC_WRITE_2(sc, sc_if->msk_port, GM_GP_CTRL, gmac); 547 /* Read again to ensure writing. */ 548 GMAC_READ_2(sc, sc_if->msk_port, GM_GP_CTRL); |
| 547 548 gmac = GMC_PAUSE_ON; 549 if (((mii->mii_media_active & IFM_GMASK) & 550 (IFM_FLAG0 | IFM_FLAG1)) == 0) 551 gmac = GMC_PAUSE_OFF; 552 /* Diable pause for 10/100 Mbps in half-duplex mode. */ 553 if ((((mii->mii_media_active & IFM_GMASK) & IFM_FDX) == 0) && 554 (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX || 555 IFM_SUBTYPE(mii->mii_media_active) == IFM_10_T)) 556 gmac = GMC_PAUSE_OFF; | 549 gmac = GMC_PAUSE_OFF; 550 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 551 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FLAG0) != 0) 552 gmac = GMC_PAUSE_ON; 553 } |
| 557 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, GMAC_CTRL), gmac); 558 559 /* Enable PHY interrupt for FIFO underrun/overflow. */ 560 msk_phy_writereg(sc_if, PHY_ADDR_MARV, 561 PHY_MARV_INT_MASK, PHY_M_IS_FIFO_ERROR); 562 } else { 563 /* 564 * Link state changed to down. --- 3902 unchanged lines hidden --- | 554 CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, GMAC_CTRL), gmac); 555 556 /* Enable PHY interrupt for FIFO underrun/overflow. */ 557 msk_phy_writereg(sc_if, PHY_ADDR_MARV, 558 PHY_MARV_INT_MASK, PHY_M_IS_FIFO_ERROR); 559 } else { 560 /* 561 * Link state changed to down. --- 3902 unchanged lines hidden --- |