1/* $FreeBSD: head/sys/dev/isp/ispvar.h 64087 2000-08-01 06:10:21Z mjacob $ */
| 1/* $FreeBSD: head/sys/dev/isp/ispvar.h 65140 2000-08-27 23:38:44Z mjacob $ */
|
2/*
3 * Soft Definitions for for Qlogic ISP SCSI adapters.
4 *
5 * Copyright (c) 1997, 1998, 1999 by Matthew Jacob
6 * NASA/Ames Research Center
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice immediately at the beginning of the file, without modification,
14 * this list of conditions, and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 */
34
35#ifndef _ISPVAR_H
36#define _ISPVAR_H
37
38#if defined(__NetBSD__) || defined(__OpenBSD__)
39#include <dev/ic/ispmbox.h>
40#ifdef ISP_TARGET_MODE
41#include <dev/ic/isp_target.h>
42#include <dev/ic/isp_tpublic.h>
43#endif
44#endif
45#ifdef __FreeBSD__
46#include <dev/isp/ispmbox.h>
47#ifdef ISP_TARGET_MODE
48#include <dev/isp/isp_target.h>
49#include <dev/isp/isp_tpublic.h>
50#endif
51#endif
52#ifdef __linux__
53#include "ispmbox.h"
54#ifdef ISP_TARGET_MODE
55#include "isp_target.h"
56#include "isp_tpublic.h"
57#endif
58#endif
59
60#define ISP_CORE_VERSION_MAJOR 2
61#define ISP_CORE_VERSION_MINOR 0
62
63/*
64 * Vector for bus specific code to provide specific services.
65 */
66struct ispsoftc;
67struct ispmdvec {
68 u_int16_t (*dv_rd_reg) __P((struct ispsoftc *, int));
69 void (*dv_wr_reg) __P((struct ispsoftc *, int, u_int16_t));
70 int (*dv_mbxdma) __P((struct ispsoftc *));
71 int (*dv_dmaset) __P((struct ispsoftc *,
72 XS_T *, ispreq_t *, u_int16_t *, u_int16_t));
73 void (*dv_dmaclr)
74 __P((struct ispsoftc *, XS_T *, u_int32_t));
75 void (*dv_reset0) __P((struct ispsoftc *));
76 void (*dv_reset1) __P((struct ispsoftc *));
77 void (*dv_dregs) __P((struct ispsoftc *, const char *));
78 const u_int16_t *dv_ispfw; /* ptr to f/w */
79 u_int16_t dv_conf1;
80 u_int16_t dv_clock; /* clock frequency */
81};
82
83/*
84 * Overall parameters
85 */
86#define MAX_TARGETS 16
87#ifdef ISP2100_FABRIC
88#define MAX_FC_TARG 256
89#else
90#define MAX_FC_TARG 126
91#endif
92
93#define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS)
94#define ISP_MAX_LUNS(isp) (isp)->isp_maxluns
95
96
97/*
98 * Macros to access ISP registers through bus specific layers-
99 * mostly wrappers to vector through the mdvec structure.
100 */
101
102#define ISP_READ(isp, reg) \
103 (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg))
104
105#define ISP_WRITE(isp, reg, val) \
106 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))
107
108#define ISP_MBOXDMASETUP(isp) \
109 (*(isp)->isp_mdvec->dv_mbxdma)((isp))
110
111#define ISP_DMASETUP(isp, xs, req, iptrp, optr) \
112 (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req), (iptrp), (optr))
113
114#define ISP_DMAFREE(isp, xs, hndl) \
115 if ((isp)->isp_mdvec->dv_dmaclr) \
116 (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl))
117
118#define ISP_RESET0(isp) \
119 if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp))
120#define ISP_RESET1(isp) \
121 if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp))
122#define ISP_DUMPREGS(isp, m) \
123 if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp),(m))
124
125#define ISP_SETBITS(isp, reg, val) \
126 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))
127
128#define ISP_CLRBITS(isp, reg, val) \
129 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))
130
131/*
132 * The MEMORYBARRIER macro is defined per platform (to provide synchronization
133 * on Request and Response Queues, Scratch DMA areas, and Registers)
134 *
135 * Defined Memory Barrier Synchronization Types
136 */
137#define SYNC_REQUEST 0 /* request queue synchronization */
138#define SYNC_RESULT 1 /* result queue synchronization */
139#define SYNC_SFORDEV 2 /* scratch, sync for ISP */
140#define SYNC_SFORCPU 3 /* scratch, sync for CPU */
141#define SYNC_REG 4 /* for registers */
142
143/*
144 * Request/Response Queue defines and macros.
145 * The maximum is defined per platform (and can be based on board type).
146 */
147/* This is the size of a queue entry (request and response) */
148#define QENTRY_LEN 64
149/* Both request and result queue length must be a power of two */
150#define RQUEST_QUEUE_LEN(x) MAXISPREQUEST(x)
151#define RESULT_QUEUE_LEN(x) \
152 (((MAXISPREQUEST(x) >> 2) < 64)? 64 : MAXISPREQUEST(x) >> 2)
153#define ISP_QUEUE_ENTRY(q, idx) ((q) + ((idx) * QENTRY_LEN))
154#define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN)
155#define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1))
| 2/*
3 * Soft Definitions for for Qlogic ISP SCSI adapters.
4 *
5 * Copyright (c) 1997, 1998, 1999 by Matthew Jacob
6 * NASA/Ames Research Center
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice immediately at the beginning of the file, without modification,
14 * this list of conditions, and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 */
34
35#ifndef _ISPVAR_H
36#define _ISPVAR_H
37
38#if defined(__NetBSD__) || defined(__OpenBSD__)
39#include <dev/ic/ispmbox.h>
40#ifdef ISP_TARGET_MODE
41#include <dev/ic/isp_target.h>
42#include <dev/ic/isp_tpublic.h>
43#endif
44#endif
45#ifdef __FreeBSD__
46#include <dev/isp/ispmbox.h>
47#ifdef ISP_TARGET_MODE
48#include <dev/isp/isp_target.h>
49#include <dev/isp/isp_tpublic.h>
50#endif
51#endif
52#ifdef __linux__
53#include "ispmbox.h"
54#ifdef ISP_TARGET_MODE
55#include "isp_target.h"
56#include "isp_tpublic.h"
57#endif
58#endif
59
60#define ISP_CORE_VERSION_MAJOR 2
61#define ISP_CORE_VERSION_MINOR 0
62
63/*
64 * Vector for bus specific code to provide specific services.
65 */
66struct ispsoftc;
67struct ispmdvec {
68 u_int16_t (*dv_rd_reg) __P((struct ispsoftc *, int));
69 void (*dv_wr_reg) __P((struct ispsoftc *, int, u_int16_t));
70 int (*dv_mbxdma) __P((struct ispsoftc *));
71 int (*dv_dmaset) __P((struct ispsoftc *,
72 XS_T *, ispreq_t *, u_int16_t *, u_int16_t));
73 void (*dv_dmaclr)
74 __P((struct ispsoftc *, XS_T *, u_int32_t));
75 void (*dv_reset0) __P((struct ispsoftc *));
76 void (*dv_reset1) __P((struct ispsoftc *));
77 void (*dv_dregs) __P((struct ispsoftc *, const char *));
78 const u_int16_t *dv_ispfw; /* ptr to f/w */
79 u_int16_t dv_conf1;
80 u_int16_t dv_clock; /* clock frequency */
81};
82
83/*
84 * Overall parameters
85 */
86#define MAX_TARGETS 16
87#ifdef ISP2100_FABRIC
88#define MAX_FC_TARG 256
89#else
90#define MAX_FC_TARG 126
91#endif
92
93#define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS)
94#define ISP_MAX_LUNS(isp) (isp)->isp_maxluns
95
96
97/*
98 * Macros to access ISP registers through bus specific layers-
99 * mostly wrappers to vector through the mdvec structure.
100 */
101
102#define ISP_READ(isp, reg) \
103 (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg))
104
105#define ISP_WRITE(isp, reg, val) \
106 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))
107
108#define ISP_MBOXDMASETUP(isp) \
109 (*(isp)->isp_mdvec->dv_mbxdma)((isp))
110
111#define ISP_DMASETUP(isp, xs, req, iptrp, optr) \
112 (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req), (iptrp), (optr))
113
114#define ISP_DMAFREE(isp, xs, hndl) \
115 if ((isp)->isp_mdvec->dv_dmaclr) \
116 (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl))
117
118#define ISP_RESET0(isp) \
119 if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp))
120#define ISP_RESET1(isp) \
121 if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp))
122#define ISP_DUMPREGS(isp, m) \
123 if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp),(m))
124
125#define ISP_SETBITS(isp, reg, val) \
126 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))
127
128#define ISP_CLRBITS(isp, reg, val) \
129 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))
130
131/*
132 * The MEMORYBARRIER macro is defined per platform (to provide synchronization
133 * on Request and Response Queues, Scratch DMA areas, and Registers)
134 *
135 * Defined Memory Barrier Synchronization Types
136 */
137#define SYNC_REQUEST 0 /* request queue synchronization */
138#define SYNC_RESULT 1 /* result queue synchronization */
139#define SYNC_SFORDEV 2 /* scratch, sync for ISP */
140#define SYNC_SFORCPU 3 /* scratch, sync for CPU */
141#define SYNC_REG 4 /* for registers */
142
143/*
144 * Request/Response Queue defines and macros.
145 * The maximum is defined per platform (and can be based on board type).
146 */
147/* This is the size of a queue entry (request and response) */
148#define QENTRY_LEN 64
149/* Both request and result queue length must be a power of two */
150#define RQUEST_QUEUE_LEN(x) MAXISPREQUEST(x)
151#define RESULT_QUEUE_LEN(x) \
152 (((MAXISPREQUEST(x) >> 2) < 64)? 64 : MAXISPREQUEST(x) >> 2)
153#define ISP_QUEUE_ENTRY(q, idx) ((q) + ((idx) * QENTRY_LEN))
154#define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN)
155#define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1))
|
156#define ISP_QAVAIL(in, out, qlen) \
| 156#define ISP_QFREE(in, out, qlen) \
|
157 ((in == out)? (qlen - 1) : ((in > out)? \
158 ((qlen - 1) - (in - out)) : (out - in - 1)))
| 157 ((in == out)? (qlen - 1) : ((in > out)? \
158 ((qlen - 1) - (in - out)) : (out - in - 1)))
|
| 159#define ISP_QAVAIL(isp) \
160 ISP_QFREE(isp->isp_reqidx, isp->isp_reqodx, RQUEST_QUEUE_LEN(isp))
|
159
160#define ISP_ADD_REQUEST(isp, iptr) \
161 MEMORYBARRIER(isp, SYNC_REQUEST, iptr, QENTRY_LEN); \
162 ISP_WRITE(isp, INMAILBOX4, iptr); \
163 isp->isp_reqidx = iptr
164
165/*
166 * SCSI Specific Host Adapter Parameters- per bus, per target
167 */
168
169typedef struct {
170 u_int isp_gotdparms : 1,
171 isp_req_ack_active_neg : 1,
172 isp_data_line_active_neg: 1,
173 isp_cmd_dma_burst_enable: 1,
174 isp_data_dma_burst_enabl: 1,
175 isp_fifo_threshold : 3,
176 isp_ultramode : 1,
177 isp_diffmode : 1,
178 isp_lvdmode : 1,
| 161
162#define ISP_ADD_REQUEST(isp, iptr) \
163 MEMORYBARRIER(isp, SYNC_REQUEST, iptr, QENTRY_LEN); \
164 ISP_WRITE(isp, INMAILBOX4, iptr); \
165 isp->isp_reqidx = iptr
166
167/*
168 * SCSI Specific Host Adapter Parameters- per bus, per target
169 */
170
171typedef struct {
172 u_int isp_gotdparms : 1,
173 isp_req_ack_active_neg : 1,
174 isp_data_line_active_neg: 1,
175 isp_cmd_dma_burst_enable: 1,
176 isp_data_dma_burst_enabl: 1,
177 isp_fifo_threshold : 3,
178 isp_ultramode : 1,
179 isp_diffmode : 1,
180 isp_lvdmode : 1,
|
179 : 1,
| 181 isp_fast_mttr : 1, /* fast sram */
|
180 isp_initiator_id : 4,
181 isp_async_data_setup : 4;
182 u_int16_t isp_selection_timeout;
183 u_int16_t isp_max_queue_depth;
184 u_int8_t isp_tag_aging;
185 u_int8_t isp_bus_reset_delay;
186 u_int8_t isp_retry_count;
187 u_int8_t isp_retry_delay;
188 struct {
189 u_int dev_enable : 1, /* ignored */
190 : 1,
191 dev_update : 1,
192 dev_refresh : 1,
193 exc_throttle : 8,
194 cur_offset : 4,
195 sync_offset : 4;
196 u_int8_t cur_period; /* current sync period */
197 u_int8_t sync_period; /* goal sync period */
198 u_int16_t dev_flags; /* goal device flags */
199 u_int16_t cur_dflags; /* current device flags */
200 } isp_devparam[MAX_TARGETS];
201} sdparam;
202
203/*
204 * Device Flags
205 */
206#define DPARM_DISC 0x8000
207#define DPARM_PARITY 0x4000
208#define DPARM_WIDE 0x2000
209#define DPARM_SYNC 0x1000
210#define DPARM_TQING 0x0800
211#define DPARM_ARQ 0x0400
212#define DPARM_QFRZ 0x0200
213#define DPARM_RENEG 0x0100
| 182 isp_initiator_id : 4,
183 isp_async_data_setup : 4;
184 u_int16_t isp_selection_timeout;
185 u_int16_t isp_max_queue_depth;
186 u_int8_t isp_tag_aging;
187 u_int8_t isp_bus_reset_delay;
188 u_int8_t isp_retry_count;
189 u_int8_t isp_retry_delay;
190 struct {
191 u_int dev_enable : 1, /* ignored */
192 : 1,
193 dev_update : 1,
194 dev_refresh : 1,
195 exc_throttle : 8,
196 cur_offset : 4,
197 sync_offset : 4;
198 u_int8_t cur_period; /* current sync period */
199 u_int8_t sync_period; /* goal sync period */
200 u_int16_t dev_flags; /* goal device flags */
201 u_int16_t cur_dflags; /* current device flags */
202 } isp_devparam[MAX_TARGETS];
203} sdparam;
204
205/*
206 * Device Flags
207 */
208#define DPARM_DISC 0x8000
209#define DPARM_PARITY 0x4000
210#define DPARM_WIDE 0x2000
211#define DPARM_SYNC 0x1000
212#define DPARM_TQING 0x0800
213#define DPARM_ARQ 0x0400
214#define DPARM_QFRZ 0x0200
215#define DPARM_RENEG 0x0100
|
214#define DPARM_NARROW 0x0080 /* Possibly only available with >= 7.55 fw */
215#define DPARM_ASYNC 0x0040 /* Possibly only available with >= 7.55 fw */
| 216#define DPARM_NARROW 0x0080
217#define DPARM_ASYNC 0x0040
218#define DPARM_PPR 0x0020
|
216#define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ)
217#define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING))
218
219
220/* technically, not really correct, as they need to be rated based upon clock */
| 219#define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ)
220#define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING))
221
222
223/* technically, not really correct, as they need to be rated based upon clock */
|
221#define ISP_40M_SYNCPARMS 0x080a
222#define ISP_20M_SYNCPARMS 0x080c
| 224#define ISP_80M_SYNCPARMS 0x0c09
225#define ISP_40M_SYNCPARMS 0x0c0a
226#define ISP_20M_SYNCPARMS 0x0c0c
227#define ISP_20M_SYNCPARMS_1040 0x080c
|
223#define ISP_10M_SYNCPARMS 0x0c19
224#define ISP_08M_SYNCPARMS 0x0c25
225#define ISP_05M_SYNCPARMS 0x0c32
226#define ISP_04M_SYNCPARMS 0x0c41
227
228/*
229 * Fibre Channel Specifics
230 */
231#define FL_PORT_ID 0x7e /* FL_Port Special ID */
232#define FC_PORT_ID 0x7f /* Fabric Controller Special ID */
233#define FC_SNS_ID 0x80 /* SNS Server Special ID */
234
235typedef struct {
236 u_int32_t isp_fwoptions : 16,
237 : 4,
238 loop_seen_once : 1,
239 isp_loopstate : 3, /* Current Loop State */
240 isp_fwstate : 3, /* ISP F/W state */
241 isp_gotdparms : 1,
242 isp_topo : 3,
243 isp_onfabric : 1;
244 u_int8_t isp_loopid; /* hard loop id */
245 u_int8_t isp_alpa; /* ALPA */
246 volatile u_int16_t isp_lipseq; /* LIP sequence # */
247 u_int32_t isp_portid;
248 u_int8_t isp_execthrottle;
249 u_int8_t isp_retry_delay;
250 u_int8_t isp_retry_count;
251 u_int8_t isp_reserved;
252 u_int16_t isp_maxalloc;
253 u_int16_t isp_maxfrmlen;
254 u_int64_t isp_nodewwn;
255 u_int64_t isp_portwwn;
256 /*
257 * Port Data Base. This is indexed by 'target', which is invariate.
258 * However, elements within can move around due to loop changes,
259 * so the actual loop ID passed to the F/W is in this structure.
260 * The first time the loop is seen up, loopid will match the index
261 * (except for fabric nodes which are above mapped above FC_SNS_ID
262 * and are completely virtual), but subsequent LIPs can cause things
263 * to move around.
264 */
265 struct lportdb {
266 u_int
267 loopid : 8,
268 : 4,
269 loggedin : 1,
270 roles : 2,
271 valid : 1;
272 u_int32_t portid;
273 u_int64_t node_wwn;
274 u_int64_t port_wwn;
275 } portdb[MAX_FC_TARG], tport[FL_PORT_ID];
276
277 /*
278 * Scratch DMA mapped in area to fetch Port Database stuff, etc.
279 */
280 caddr_t isp_scratch;
281 u_int32_t isp_scdma;
282} fcparam;
283
284#define FW_CONFIG_WAIT 0
285#define FW_WAIT_AL_PA 1
286#define FW_WAIT_LOGIN 2
287#define FW_READY 3
288#define FW_LOSS_OF_SYNC 4
289#define FW_ERROR 5
290#define FW_REINIT 6
291#define FW_NON_PART 7
292
293#define LOOP_NIL 0
294#define LOOP_LIP_RCVD 1
295#define LOOP_PDB_RCVD 2
296#define LOOP_READY 7
297
298#define TOPO_NL_PORT 0
299#define TOPO_FL_PORT 1
300#define TOPO_N_PORT 2
301#define TOPO_F_PORT 3
302#define TOPO_PTP_STUB 4
303
304/*
305 * Soft Structure per host adapter
306 */
| 228#define ISP_10M_SYNCPARMS 0x0c19
229#define ISP_08M_SYNCPARMS 0x0c25
230#define ISP_05M_SYNCPARMS 0x0c32
231#define ISP_04M_SYNCPARMS 0x0c41
232
233/*
234 * Fibre Channel Specifics
235 */
236#define FL_PORT_ID 0x7e /* FL_Port Special ID */
237#define FC_PORT_ID 0x7f /* Fabric Controller Special ID */
238#define FC_SNS_ID 0x80 /* SNS Server Special ID */
239
240typedef struct {
241 u_int32_t isp_fwoptions : 16,
242 : 4,
243 loop_seen_once : 1,
244 isp_loopstate : 3, /* Current Loop State */
245 isp_fwstate : 3, /* ISP F/W state */
246 isp_gotdparms : 1,
247 isp_topo : 3,
248 isp_onfabric : 1;
249 u_int8_t isp_loopid; /* hard loop id */
250 u_int8_t isp_alpa; /* ALPA */
251 volatile u_int16_t isp_lipseq; /* LIP sequence # */
252 u_int32_t isp_portid;
253 u_int8_t isp_execthrottle;
254 u_int8_t isp_retry_delay;
255 u_int8_t isp_retry_count;
256 u_int8_t isp_reserved;
257 u_int16_t isp_maxalloc;
258 u_int16_t isp_maxfrmlen;
259 u_int64_t isp_nodewwn;
260 u_int64_t isp_portwwn;
261 /*
262 * Port Data Base. This is indexed by 'target', which is invariate.
263 * However, elements within can move around due to loop changes,
264 * so the actual loop ID passed to the F/W is in this structure.
265 * The first time the loop is seen up, loopid will match the index
266 * (except for fabric nodes which are above mapped above FC_SNS_ID
267 * and are completely virtual), but subsequent LIPs can cause things
268 * to move around.
269 */
270 struct lportdb {
271 u_int
272 loopid : 8,
273 : 4,
274 loggedin : 1,
275 roles : 2,
276 valid : 1;
277 u_int32_t portid;
278 u_int64_t node_wwn;
279 u_int64_t port_wwn;
280 } portdb[MAX_FC_TARG], tport[FL_PORT_ID];
281
282 /*
283 * Scratch DMA mapped in area to fetch Port Database stuff, etc.
284 */
285 caddr_t isp_scratch;
286 u_int32_t isp_scdma;
287} fcparam;
288
289#define FW_CONFIG_WAIT 0
290#define FW_WAIT_AL_PA 1
291#define FW_WAIT_LOGIN 2
292#define FW_READY 3
293#define FW_LOSS_OF_SYNC 4
294#define FW_ERROR 5
295#define FW_REINIT 6
296#define FW_NON_PART 7
297
298#define LOOP_NIL 0
299#define LOOP_LIP_RCVD 1
300#define LOOP_PDB_RCVD 2
301#define LOOP_READY 7
302
303#define TOPO_NL_PORT 0
304#define TOPO_FL_PORT 1
305#define TOPO_N_PORT 2
306#define TOPO_F_PORT 3
307#define TOPO_PTP_STUB 4
308
309/*
310 * Soft Structure per host adapter
311 */
|
307struct ispsoftc {
| 312typedef struct ispsoftc {
|
308 /*
309 * Platform (OS) specific data
310 */
311 struct isposinfo isp_osinfo;
312
313 /*
314 * Pointer to bus specific functions and data
315 */
316 struct ispmdvec * isp_mdvec;
317
318 /*
319 * (Mostly) nonvolatile state. Board specific parameters
320 * may contain some volatile state (e.g., current loop state).
321 */
322
323 void * isp_param; /* type specific */
324 u_int16_t isp_fwrev[3]; /* Loaded F/W revision */
325 u_int16_t isp_romfw_rev[3]; /* PROM F/W revision */
326 u_int16_t isp_maxcmds; /* max possible I/O cmds */
327 u_int8_t isp_type; /* HBA Chip Type */
328 u_int8_t isp_revision; /* HBA Chip H/W Revision */
329 u_int32_t isp_maxluns; /* maximum luns supported */
330
331 u_int32_t
332 isp_touched : 1, /* board ever seen? */
| 313 /*
314 * Platform (OS) specific data
315 */
316 struct isposinfo isp_osinfo;
317
318 /*
319 * Pointer to bus specific functions and data
320 */
321 struct ispmdvec * isp_mdvec;
322
323 /*
324 * (Mostly) nonvolatile state. Board specific parameters
325 * may contain some volatile state (e.g., current loop state).
326 */
327
328 void * isp_param; /* type specific */
329 u_int16_t isp_fwrev[3]; /* Loaded F/W revision */
330 u_int16_t isp_romfw_rev[3]; /* PROM F/W revision */
331 u_int16_t isp_maxcmds; /* max possible I/O cmds */
332 u_int8_t isp_type; /* HBA Chip Type */
333 u_int8_t isp_revision; /* HBA Chip H/W Revision */
334 u_int32_t isp_maxluns; /* maximum luns supported */
335
336 u_int32_t
337 isp_touched : 1, /* board ever seen? */
|
333 isp_fast_mttr : 1, /* fast sram */
334 isp_bustype : 1, /* SBus or PCI */
| |
335 : 1,
| 338 : 1,
|
| 339 isp_bustype : 1, /* SBus or PCI */
340 isp_loaded_fw : 1, /* loaded firmware */
|
336 isp_dblev : 12, /* debug log mask */
337 isp_clock : 8, /* input clock */
338 isp_confopts : 8; /* config options */
339
340 /*
341 * Volatile state
342 */
343
344 volatile u_int32_t
345 isp_mboxbsy : 8, /* mailbox command active */
346 : 1,
347 isp_state : 3,
348 isp_sendmarker : 2, /* send a marker entry */
349 isp_update : 2, /* update parameters */
350 isp_nactive : 16; /* how many commands active */
351 volatile u_int16_t isp_reqodx; /* index of last ISP pickup */
352 volatile u_int16_t isp_reqidx; /* index of next request */
353 volatile u_int16_t isp_residx; /* index of next result */
354 volatile u_int16_t isp_lasthdls; /* last handle seed */
355 volatile u_int16_t isp_mboxtmp[MAX_MAILBOX];
356
357 /*
358 * Active commands are stored here, indexed by handle functions.
359 */
360 XS_T **isp_xflist;
361
362 /*
363 * request/result queue pointers and dma handles for them.
364 */
365 caddr_t isp_rquest;
366 caddr_t isp_result;
367 u_int32_t isp_rquest_dma;
368 u_int32_t isp_result_dma;
| 341 isp_dblev : 12, /* debug log mask */
342 isp_clock : 8, /* input clock */
343 isp_confopts : 8; /* config options */
344
345 /*
346 * Volatile state
347 */
348
349 volatile u_int32_t
350 isp_mboxbsy : 8, /* mailbox command active */
351 : 1,
352 isp_state : 3,
353 isp_sendmarker : 2, /* send a marker entry */
354 isp_update : 2, /* update parameters */
355 isp_nactive : 16; /* how many commands active */
356 volatile u_int16_t isp_reqodx; /* index of last ISP pickup */
357 volatile u_int16_t isp_reqidx; /* index of next request */
358 volatile u_int16_t isp_residx; /* index of next result */
359 volatile u_int16_t isp_lasthdls; /* last handle seed */
360 volatile u_int16_t isp_mboxtmp[MAX_MAILBOX];
361
362 /*
363 * Active commands are stored here, indexed by handle functions.
364 */
365 XS_T **isp_xflist;
366
367 /*
368 * request/result queue pointers and dma handles for them.
369 */
370 caddr_t isp_rquest;
371 caddr_t isp_result;
372 u_int32_t isp_rquest_dma;
373 u_int32_t isp_result_dma;
|
369};
| 374} ispsoftc_t;
|
370
371#define SDPARAM(isp) ((sdparam *) (isp)->isp_param)
372#define FCPARAM(isp) ((fcparam *) (isp)->isp_param)
373
374/*
375 * ISP Driver Run States
376 */
377#define ISP_NILSTATE 0
378#define ISP_RESETSTATE 1
379#define ISP_INITSTATE 2
380#define ISP_RUNSTATE 3
381
382/*
383 * ISP Configuration Options
384 */
385#define ISP_CFG_NORELOAD 0x80 /* don't download f/w */
386#define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */
387#define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */
388#define ISP_CFG_OWNWWN 0x02 /* override NVRAM wwn */
389#define ISP_CFG_NPORT 0x04 /* try to force N- instead of L-Port */
390
391/*
392 * Firmware related defines
393 */
394#define ISP_CODE_ORG 0x1000 /* default f/w code start */
395#define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic)
396#define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2])
397
398/*
399 * Bus (implementation) types
400 */
401#define ISP_BT_PCI 0 /* PCI Implementations */
402#define ISP_BT_SBUS 1 /* SBus Implementations */
403
404/*
405 * Chip Types
406 */
407#define ISP_HA_SCSI 0xf
408#define ISP_HA_SCSI_UNKNOWN 0x1
409#define ISP_HA_SCSI_1020 0x2
410#define ISP_HA_SCSI_1020A 0x3
411#define ISP_HA_SCSI_1040 0x4
412#define ISP_HA_SCSI_1040A 0x5
413#define ISP_HA_SCSI_1040B 0x6
414#define ISP_HA_SCSI_1040C 0x7
415#define ISP_HA_SCSI_1240 0x8
416#define ISP_HA_SCSI_1080 0x9
417#define ISP_HA_SCSI_1280 0xa
418#define ISP_HA_SCSI_12160 0xb
419#define ISP_HA_FC 0xf0
420#define ISP_HA_FC_2100 0x10
421#define ISP_HA_FC_2200 0x20
422
423#define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI)
424#define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240)
425#define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080)
426#define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280)
427#define IS_12160(isp) (isp->isp_type == ISP_HA_SCSI_12160)
428
429#define IS_12X0(isp) (IS_1240(isp) || IS_1280(isp))
430#define IS_DUALBUS(isp) (IS_12X0(isp) || IS_12160(isp))
431#define IS_ULTRA2(isp) (IS_1080(isp) || IS_1280(isp) || IS_12160(isp))
432#define IS_ULTRA3(isp) (IS_12160(isp))
433
434#define IS_FC(isp) (isp->isp_type & ISP_HA_FC)
435#define IS_2100(isp) (isp->isp_type == ISP_HA_FC_2100)
436#define IS_2200(isp) (isp->isp_type == ISP_HA_FC_2200)
437
438/*
439 * DMA cookie macros
440 */
441#define DMA_MSW(x) (((x) >> 16) & 0xffff)
442#define DMA_LSW(x) (((x) & 0xffff))
443
444/*
445 * Core System Function Prototypes
446 */
447
448/*
449 * Reset Hardware. Totally. Assumes that you'll follow this with
450 * a call to isp_init.
451 */
452void isp_reset __P((struct ispsoftc *));
453
454/*
455 * Initialize Hardware to known state
456 */
457void isp_init __P((struct ispsoftc *));
458
459/*
460 * Reset the ISP and call completion for any orphaned commands.
461 */
462void isp_reinit __P((struct ispsoftc *));
463
464/*
465 * Interrupt Service Routine
466 */
467int isp_intr __P((void *));
468
469/*
470 * Command Entry Point- Platform Dependent layers call into this
471 */
472int isp_start __P((XS_T *));
473/* these values are what isp_start returns */
474#define CMD_COMPLETE 101 /* command completed */
475#define CMD_EAGAIN 102 /* busy- maybe retry later */
476#define CMD_QUEUED 103 /* command has been queued for execution */
477#define CMD_RQLATER 104 /* requeue this command later */
478
479/*
480 * Command Completion Point- Core layers call out from this with completed cmds
481 */
482void isp_done __P((XS_T *));
483
484/*
485 * Platform Dependent to External to Internal Control Function
486 *
487 * Assumes all locks are held and that no reentrancy issues need be dealt with.
488 *
489 */
490typedef enum {
491 ISPCTL_RESET_BUS, /* Reset Bus */
492 ISPCTL_RESET_DEV, /* Reset Device */
493 ISPCTL_ABORT_CMD, /* Abort Command */
494 ISPCTL_UPDATE_PARAMS, /* Update Operating Parameters */
495 ISPCTL_FCLINK_TEST, /* Test FC Link Status */
496 ISPCTL_PDB_SYNC, /* Synchronize Port Database */
497 ISPCTL_TOGGLE_TMODE /* toggle target mode */
498} ispctl_t;
499int isp_control __P((struct ispsoftc *, ispctl_t, void *));
500
501
502/*
503 * Platform Dependent to Internal to External Control Function
504 * (each platform must provide such a function)
505 *
506 * Assumes all locks are held and that no reentrancy issues need be dealt with.
507 *
508 */
509
510typedef enum {
511 ISPASYNC_NEW_TGT_PARAMS,
512 ISPASYNC_BUS_RESET, /* Bus Was Reset */
513 ISPASYNC_LOOP_DOWN, /* FC Loop Down */
514 ISPASYNC_LOOP_UP, /* FC Loop Up */
515 ISPASYNC_PDB_CHANGED, /* FC Port Data Base Changed */
516 ISPASYNC_CHANGE_NOTIFY, /* FC SNS Change Notification */
517 ISPASYNC_FABRIC_DEV, /* FC New Fabric Device */
518 ISPASYNC_TARGET_MESSAGE, /* target message */
519 ISPASYNC_TARGET_EVENT, /* target asynchronous event */
520 ISPASYNC_TARGET_ACTION /* other target command action */
521} ispasync_t;
522int isp_async __P((struct ispsoftc *, ispasync_t, void *));
523
524/*
525 * Platform Dependent Error and Debug Printout
526 */
527void isp_prt __P((struct ispsoftc *, int level, const char *, ...));
528#define ISP_LOGALL 0x0 /* log always */
529#define ISP_LOGCONFIG 0x1 /* log configuration messages */
530#define ISP_LOGINFO 0x2 /* log informational messages */
531#define ISP_LOGWARN 0x4 /* log warning messages */
532#define ISP_LOGERR 0x8 /* log error messages */
533#define ISP_LOGDEBUG0 0x10 /* log simple debug messages */
534#define ISP_LOGDEBUG1 0x20 /* log intermediate debug messages */
535#define ISP_LOGDEBUG2 0x40 /* log most debug messages */
536#define ISP_LOGDEBUG3 0x100 /* log high frequency debug messages */
537#define ISP_LOGTDEBUG0 0x200 /* log simple debug messages (target mode) */
538#define ISP_LOGTDEBUG1 0x400 /* log intermediate debug messages (target) */
539#define ISP_LOGTDEBUG2 0x800 /* log all debug messages (target) */
540
541/*
542 * Each Platform provides it's own isposinfo substructure of the ispsoftc
543 * defined above.
544 *
545 * Each platform must also provide the following macros/defines:
546 *
547 *
548 * INLINE - platform specific define for 'inline' functions
549 *
550 * ISP2100_FABRIC - defines whether FABRIC support is enabled
551 * ISP2100_SCRLEN - length for the Fibre Channel scratch DMA area
552 *
553 * MEMZERO(dst, src) platform zeroing function
554 * MEMCPY(dst, src, count) platform copying function
555 * SNPRINTF(buf, bufsize, fmt, ...) snprintf
556 * STRNCAT(dstbuf, size, srcbuf) strncat
557 * USEC_DELAY(usecs) microsecond spindelay function
558 *
559 * NANOTIME_T nanosecond time type
560 *
561 * GET_NANOTIME(NANOTIME_T *) get current nanotime.
562 *
563 * GET_NANOSEC(NANOTIME_T *) get u_int64_t from NANOTIME_T
564 *
565 * NANOTIME_SUB(NANOTIME_T *, NANOTIME_T *)
566 * subtract two NANOTIME_T values
567 *
568 *
569 * MAXISPREQUEST(struct ispsoftc *) maximum request queue size
570 * for this particular board type
571 *
572 * MEMORYBARRIER(struct ispsoftc *, barrier_type, offset, size)
573 *
574 * Function/Macro the provides memory synchronization on
575 * various objects so that the ISP's and the system's view
576 * of the same object is consistent.
577 *
578 * MBOX_ACQUIRE(struct ispsoftc *) acquire lock on mailbox regs
579 * MBOX_WAIT_COMPLETE(struct ispsoftc *) wait for mailbox cmd to be done
580 * MBOX_NOTIFY_COMPLETE(struct ispsoftc *) notification of mbox cmd donee
581 * MBOX_RELEASE(struct ispsoftc *) release lock on mailbox regs
582 *
583 *
584 * SCSI_GOOD SCSI 'Good' Status
585 * SCSI_CHECK SCSI 'Check Condition' Status
586 * SCSI_BUSY SCSI 'Busy' Status
587 * SCSI_QFULL SCSI 'Queue Full' Status
588 *
589 * XS_T Platform SCSI transaction type (i.e., command for HBA)
590 * XS_ISP(xs) gets an instance out of an XS_T
591 * XS_CHANNEL(xs) gets the channel (bus # for DUALBUS cards) ""
592 * XS_TGT(xs) gets the target ""
593 * XS_LUN(xs) gets the lun ""
594 * XS_CDBP(xs) gets a pointer to the scsi CDB ""
595 * XS_CDBLEN(xs) gets the CDB's length ""
596 * XS_XFRLEN(xs) gets the associated data transfer length ""
597 * XS_TIME(xs) gets the time (in milliseconds) for this command
598 * XS_RESID(xs) gets the current residual count
599 * XS_STSP(xs) gets a pointer to the SCSI status byte ""
600 * XS_SNSP(xs) gets a pointer to the associate sense data
601 * XS_SNSLEN(xs) gets the length of sense data storage
602 * XS_SNSKEY(xs) dereferences XS_SNSP to get the current stored Sense Key
603 * XS_TAG_P(xs) predicate of whether this command should be tagged
604 * XS_TAG_TYPE(xs) which type of tag to use
605 * XS_SETERR(xs) set error state
606 *
607 * HBA_NOERROR command has no erros
608 * HBA_BOTCH hba botched something
609 * HBA_CMDTIMEOUT command timed out
610 * HBA_SELTIMEOUT selection timed out (also port logouts for FC)
611 * HBA_TGTBSY target returned a BUSY status
612 * HBA_BUSRESET bus reset destroyed command
613 * HBA_ABORTED command was aborted (by request)
614 * HBA_DATAOVR a data overrun was detected
615 * HBA_ARQFAIL Automatic Request Sense failed
616 *
617 * XS_ERR(xs) return current error state
618 * XS_NOERR(xs) there is no error currently set
619 * XS_INITERR(xs) initialize error state
620 *
621 * XS_SAVE_SENSE(xs, sp) save sense data
622 *
623 * XS_SET_STATE_STAT(isp, sp, xs) platform dependent interpreter of
624 * response queue entry status bits
625 *
626 *
627 * DEFAULT_IID(struct ispsoftc *) Default SCSI initiator ID
628 *
629 * DEFAULT_LOOPID(struct ispsoftc *) Default FC Loop ID
630 * DEFAULT_NODEWWN(struct ispsoftc *) Default FC Node WWN
631 * DEFAULT_PORTWWN(struct ispsoftc *) Default FC Port WWN
632 *
633 * PORT_FROM_NODE_WWN(struct ispsoftc *, u_int64_t nwwn)
634 *
635 * Node to Port WWN generator- this needs to be platform
636 * specific so that given a NAA=2 WWN dragged from the Qlogic
637 * card's NVRAM, a Port WWN can be generated that has the
638 * appropriate bits set in bits 48..60 that are likely to be
639 * based on the device instance number.
640 *
641 * (XXX these do endian specific transformations- in transition XXX)
642 * ISP_SWIZZLE_ICB
643 * ISP_UNSWIZZLE_AND_COPY_PDBP
644 * ISP_SWIZZLE_CONTINUATION
645 * ISP_SWIZZLE_REQUEST
646 * ISP_UNSWIZZLE_RESPONSE
647 * ISP_SWIZZLE_SNS_REQ
648 * ISP_UNSWIZZLE_SNS_RSP
649 * ISP_SWIZZLE_NVRAM_WORD
650 *
651 *
652 */
653#endif /* _ISPVAR_H */
| 375
376#define SDPARAM(isp) ((sdparam *) (isp)->isp_param)
377#define FCPARAM(isp) ((fcparam *) (isp)->isp_param)
378
379/*
380 * ISP Driver Run States
381 */
382#define ISP_NILSTATE 0
383#define ISP_RESETSTATE 1
384#define ISP_INITSTATE 2
385#define ISP_RUNSTATE 3
386
387/*
388 * ISP Configuration Options
389 */
390#define ISP_CFG_NORELOAD 0x80 /* don't download f/w */
391#define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */
392#define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */
393#define ISP_CFG_OWNWWN 0x02 /* override NVRAM wwn */
394#define ISP_CFG_NPORT 0x04 /* try to force N- instead of L-Port */
395
396/*
397 * Firmware related defines
398 */
399#define ISP_CODE_ORG 0x1000 /* default f/w code start */
400#define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic)
401#define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2])
402
403/*
404 * Bus (implementation) types
405 */
406#define ISP_BT_PCI 0 /* PCI Implementations */
407#define ISP_BT_SBUS 1 /* SBus Implementations */
408
409/*
410 * Chip Types
411 */
412#define ISP_HA_SCSI 0xf
413#define ISP_HA_SCSI_UNKNOWN 0x1
414#define ISP_HA_SCSI_1020 0x2
415#define ISP_HA_SCSI_1020A 0x3
416#define ISP_HA_SCSI_1040 0x4
417#define ISP_HA_SCSI_1040A 0x5
418#define ISP_HA_SCSI_1040B 0x6
419#define ISP_HA_SCSI_1040C 0x7
420#define ISP_HA_SCSI_1240 0x8
421#define ISP_HA_SCSI_1080 0x9
422#define ISP_HA_SCSI_1280 0xa
423#define ISP_HA_SCSI_12160 0xb
424#define ISP_HA_FC 0xf0
425#define ISP_HA_FC_2100 0x10
426#define ISP_HA_FC_2200 0x20
427
428#define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI)
429#define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240)
430#define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080)
431#define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280)
432#define IS_12160(isp) (isp->isp_type == ISP_HA_SCSI_12160)
433
434#define IS_12X0(isp) (IS_1240(isp) || IS_1280(isp))
435#define IS_DUALBUS(isp) (IS_12X0(isp) || IS_12160(isp))
436#define IS_ULTRA2(isp) (IS_1080(isp) || IS_1280(isp) || IS_12160(isp))
437#define IS_ULTRA3(isp) (IS_12160(isp))
438
439#define IS_FC(isp) (isp->isp_type & ISP_HA_FC)
440#define IS_2100(isp) (isp->isp_type == ISP_HA_FC_2100)
441#define IS_2200(isp) (isp->isp_type == ISP_HA_FC_2200)
442
443/*
444 * DMA cookie macros
445 */
446#define DMA_MSW(x) (((x) >> 16) & 0xffff)
447#define DMA_LSW(x) (((x) & 0xffff))
448
449/*
450 * Core System Function Prototypes
451 */
452
453/*
454 * Reset Hardware. Totally. Assumes that you'll follow this with
455 * a call to isp_init.
456 */
457void isp_reset __P((struct ispsoftc *));
458
459/*
460 * Initialize Hardware to known state
461 */
462void isp_init __P((struct ispsoftc *));
463
464/*
465 * Reset the ISP and call completion for any orphaned commands.
466 */
467void isp_reinit __P((struct ispsoftc *));
468
469/*
470 * Interrupt Service Routine
471 */
472int isp_intr __P((void *));
473
474/*
475 * Command Entry Point- Platform Dependent layers call into this
476 */
477int isp_start __P((XS_T *));
478/* these values are what isp_start returns */
479#define CMD_COMPLETE 101 /* command completed */
480#define CMD_EAGAIN 102 /* busy- maybe retry later */
481#define CMD_QUEUED 103 /* command has been queued for execution */
482#define CMD_RQLATER 104 /* requeue this command later */
483
484/*
485 * Command Completion Point- Core layers call out from this with completed cmds
486 */
487void isp_done __P((XS_T *));
488
489/*
490 * Platform Dependent to External to Internal Control Function
491 *
492 * Assumes all locks are held and that no reentrancy issues need be dealt with.
493 *
494 */
495typedef enum {
496 ISPCTL_RESET_BUS, /* Reset Bus */
497 ISPCTL_RESET_DEV, /* Reset Device */
498 ISPCTL_ABORT_CMD, /* Abort Command */
499 ISPCTL_UPDATE_PARAMS, /* Update Operating Parameters */
500 ISPCTL_FCLINK_TEST, /* Test FC Link Status */
501 ISPCTL_PDB_SYNC, /* Synchronize Port Database */
502 ISPCTL_TOGGLE_TMODE /* toggle target mode */
503} ispctl_t;
504int isp_control __P((struct ispsoftc *, ispctl_t, void *));
505
506
507/*
508 * Platform Dependent to Internal to External Control Function
509 * (each platform must provide such a function)
510 *
511 * Assumes all locks are held and that no reentrancy issues need be dealt with.
512 *
513 */
514
515typedef enum {
516 ISPASYNC_NEW_TGT_PARAMS,
517 ISPASYNC_BUS_RESET, /* Bus Was Reset */
518 ISPASYNC_LOOP_DOWN, /* FC Loop Down */
519 ISPASYNC_LOOP_UP, /* FC Loop Up */
520 ISPASYNC_PDB_CHANGED, /* FC Port Data Base Changed */
521 ISPASYNC_CHANGE_NOTIFY, /* FC SNS Change Notification */
522 ISPASYNC_FABRIC_DEV, /* FC New Fabric Device */
523 ISPASYNC_TARGET_MESSAGE, /* target message */
524 ISPASYNC_TARGET_EVENT, /* target asynchronous event */
525 ISPASYNC_TARGET_ACTION /* other target command action */
526} ispasync_t;
527int isp_async __P((struct ispsoftc *, ispasync_t, void *));
528
529/*
530 * Platform Dependent Error and Debug Printout
531 */
532void isp_prt __P((struct ispsoftc *, int level, const char *, ...));
533#define ISP_LOGALL 0x0 /* log always */
534#define ISP_LOGCONFIG 0x1 /* log configuration messages */
535#define ISP_LOGINFO 0x2 /* log informational messages */
536#define ISP_LOGWARN 0x4 /* log warning messages */
537#define ISP_LOGERR 0x8 /* log error messages */
538#define ISP_LOGDEBUG0 0x10 /* log simple debug messages */
539#define ISP_LOGDEBUG1 0x20 /* log intermediate debug messages */
540#define ISP_LOGDEBUG2 0x40 /* log most debug messages */
541#define ISP_LOGDEBUG3 0x100 /* log high frequency debug messages */
542#define ISP_LOGTDEBUG0 0x200 /* log simple debug messages (target mode) */
543#define ISP_LOGTDEBUG1 0x400 /* log intermediate debug messages (target) */
544#define ISP_LOGTDEBUG2 0x800 /* log all debug messages (target) */
545
546/*
547 * Each Platform provides it's own isposinfo substructure of the ispsoftc
548 * defined above.
549 *
550 * Each platform must also provide the following macros/defines:
551 *
552 *
553 * INLINE - platform specific define for 'inline' functions
554 *
555 * ISP2100_FABRIC - defines whether FABRIC support is enabled
556 * ISP2100_SCRLEN - length for the Fibre Channel scratch DMA area
557 *
558 * MEMZERO(dst, src) platform zeroing function
559 * MEMCPY(dst, src, count) platform copying function
560 * SNPRINTF(buf, bufsize, fmt, ...) snprintf
561 * STRNCAT(dstbuf, size, srcbuf) strncat
562 * USEC_DELAY(usecs) microsecond spindelay function
563 *
564 * NANOTIME_T nanosecond time type
565 *
566 * GET_NANOTIME(NANOTIME_T *) get current nanotime.
567 *
568 * GET_NANOSEC(NANOTIME_T *) get u_int64_t from NANOTIME_T
569 *
570 * NANOTIME_SUB(NANOTIME_T *, NANOTIME_T *)
571 * subtract two NANOTIME_T values
572 *
573 *
574 * MAXISPREQUEST(struct ispsoftc *) maximum request queue size
575 * for this particular board type
576 *
577 * MEMORYBARRIER(struct ispsoftc *, barrier_type, offset, size)
578 *
579 * Function/Macro the provides memory synchronization on
580 * various objects so that the ISP's and the system's view
581 * of the same object is consistent.
582 *
583 * MBOX_ACQUIRE(struct ispsoftc *) acquire lock on mailbox regs
584 * MBOX_WAIT_COMPLETE(struct ispsoftc *) wait for mailbox cmd to be done
585 * MBOX_NOTIFY_COMPLETE(struct ispsoftc *) notification of mbox cmd donee
586 * MBOX_RELEASE(struct ispsoftc *) release lock on mailbox regs
587 *
588 *
589 * SCSI_GOOD SCSI 'Good' Status
590 * SCSI_CHECK SCSI 'Check Condition' Status
591 * SCSI_BUSY SCSI 'Busy' Status
592 * SCSI_QFULL SCSI 'Queue Full' Status
593 *
594 * XS_T Platform SCSI transaction type (i.e., command for HBA)
595 * XS_ISP(xs) gets an instance out of an XS_T
596 * XS_CHANNEL(xs) gets the channel (bus # for DUALBUS cards) ""
597 * XS_TGT(xs) gets the target ""
598 * XS_LUN(xs) gets the lun ""
599 * XS_CDBP(xs) gets a pointer to the scsi CDB ""
600 * XS_CDBLEN(xs) gets the CDB's length ""
601 * XS_XFRLEN(xs) gets the associated data transfer length ""
602 * XS_TIME(xs) gets the time (in milliseconds) for this command
603 * XS_RESID(xs) gets the current residual count
604 * XS_STSP(xs) gets a pointer to the SCSI status byte ""
605 * XS_SNSP(xs) gets a pointer to the associate sense data
606 * XS_SNSLEN(xs) gets the length of sense data storage
607 * XS_SNSKEY(xs) dereferences XS_SNSP to get the current stored Sense Key
608 * XS_TAG_P(xs) predicate of whether this command should be tagged
609 * XS_TAG_TYPE(xs) which type of tag to use
610 * XS_SETERR(xs) set error state
611 *
612 * HBA_NOERROR command has no erros
613 * HBA_BOTCH hba botched something
614 * HBA_CMDTIMEOUT command timed out
615 * HBA_SELTIMEOUT selection timed out (also port logouts for FC)
616 * HBA_TGTBSY target returned a BUSY status
617 * HBA_BUSRESET bus reset destroyed command
618 * HBA_ABORTED command was aborted (by request)
619 * HBA_DATAOVR a data overrun was detected
620 * HBA_ARQFAIL Automatic Request Sense failed
621 *
622 * XS_ERR(xs) return current error state
623 * XS_NOERR(xs) there is no error currently set
624 * XS_INITERR(xs) initialize error state
625 *
626 * XS_SAVE_SENSE(xs, sp) save sense data
627 *
628 * XS_SET_STATE_STAT(isp, sp, xs) platform dependent interpreter of
629 * response queue entry status bits
630 *
631 *
632 * DEFAULT_IID(struct ispsoftc *) Default SCSI initiator ID
633 *
634 * DEFAULT_LOOPID(struct ispsoftc *) Default FC Loop ID
635 * DEFAULT_NODEWWN(struct ispsoftc *) Default FC Node WWN
636 * DEFAULT_PORTWWN(struct ispsoftc *) Default FC Port WWN
637 *
638 * PORT_FROM_NODE_WWN(struct ispsoftc *, u_int64_t nwwn)
639 *
640 * Node to Port WWN generator- this needs to be platform
641 * specific so that given a NAA=2 WWN dragged from the Qlogic
642 * card's NVRAM, a Port WWN can be generated that has the
643 * appropriate bits set in bits 48..60 that are likely to be
644 * based on the device instance number.
645 *
646 * (XXX these do endian specific transformations- in transition XXX)
647 * ISP_SWIZZLE_ICB
648 * ISP_UNSWIZZLE_AND_COPY_PDBP
649 * ISP_SWIZZLE_CONTINUATION
650 * ISP_SWIZZLE_REQUEST
651 * ISP_UNSWIZZLE_RESPONSE
652 * ISP_SWIZZLE_SNS_REQ
653 * ISP_UNSWIZZLE_SNS_RSP
654 * ISP_SWIZZLE_NVRAM_WORD
655 *
656 *
657 */
658#endif /* _ISPVAR_H */
|