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isp_target.h (140652) isp_target.h (154704)
1/* $FreeBSD: head/sys/dev/isp/isp_target.h 140652 2005-01-23 06:28:49Z mjacob $ */
1/* $FreeBSD: head/sys/dev/isp/isp_target.h 154704 2006-01-23 06:23:37Z mjacob $ */
2/*-
3 * Qlogic Target Mode Structure and Flag Definitions
4 *
5 * Copyright (c) 1997, 1998
6 * Patrick Stirling
7 * pms@psconsult.com
8 * All rights reserved.
9 *
2/*-
3 * Qlogic Target Mode Structure and Flag Definitions
4 *
5 * Copyright (c) 1997, 1998
6 * Patrick Stirling
7 * pms@psconsult.com
8 * All rights reserved.
9 *
10 * Additional Copyright (c) 1999, 2000, 2001
11 * Matthew Jacob
12 * mjacob@feral.com
10 * Additonal Copyright (c) 1997-2006 by Matthew Jacob
13 * All rights reserved.
14 *
11 * All rights reserved.
12 *
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 * 1. Redistributions of source code must retain the above copyright
20 * notice immediately at the beginning of the file, without modification,
21 * this list of conditions, and the following disclaimer.
22 * 2. The name of the author may not be used to endorse or promote products
23 * derived from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
29 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice immediately at the beginning of the file, without modification,
18 * this list of conditions, and the following disclaimer.
19 * 2. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 */
36#ifndef _ISP_TARGET_H
37#define _ISP_TARGET_H
38

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115 u_int8_t in_iid; /* initiator */
116 u_int16_t in_scclun;
117 u_int32_t in_reserved2;
118 u_int16_t in_status;
119 u_int16_t in_task_flags;
120 u_int16_t in_seqid; /* sequence id */
121} in_fcentry_t;
122
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 */
35#ifndef _ISP_TARGET_H
36#define _ISP_TARGET_H
37

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114 u_int8_t in_iid; /* initiator */
115 u_int16_t in_scclun;
116 u_int32_t in_reserved2;
117 u_int16_t in_status;
118 u_int16_t in_task_flags;
119 u_int16_t in_seqid; /* sequence id */
120} in_fcentry_t;
121
122typedef struct {
123 isphdr_t in_header;
124 u_int32_t in_reserved;
125 u_int16_t in_iid; /* initiator */
126 u_int16_t in_scclun;
127 u_int32_t in_reserved2;
128 u_int16_t in_status;
129 u_int16_t in_task_flags;
130 u_int16_t in_seqid; /* sequence id */
131} in_fcentry_e_t;
132
123/*
124 * Values for the in_status field
125 */
126#define IN_REJECT 0x0D /* Message Reject message received */
127#define IN_RESET 0x0E /* Bus Reset occurred */
128#define IN_NO_RCAP 0x16 /* requested capability not available */
129#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */
130#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */

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200 u_int16_t na_scclun;
201 u_int16_t na_flags;
202 u_int16_t na_reserved2;
203 u_int16_t na_status;
204 u_int16_t na_task_flags;
205 u_int16_t na_seqid; /* sequence id */
206 u_int16_t na_reserved3[NA2_RSVDLEN];
207} na_fcentry_t;
133/*
134 * Values for the in_status field
135 */
136#define IN_REJECT 0x0D /* Message Reject message received */
137#define IN_RESET 0x0E /* Bus Reset occurred */
138#define IN_NO_RCAP 0x16 /* requested capability not available */
139#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */
140#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */

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210 u_int16_t na_scclun;
211 u_int16_t na_flags;
212 u_int16_t na_reserved2;
213 u_int16_t na_status;
214 u_int16_t na_task_flags;
215 u_int16_t na_seqid; /* sequence id */
216 u_int16_t na_reserved3[NA2_RSVDLEN];
217} na_fcentry_t;
218
219typedef struct {
220 isphdr_t na_header;
221 u_int32_t na_reserved;
222 u_int16_t na_iid; /* initiator */
223 u_int16_t na_scclun;
224 u_int16_t na_flags;
225 u_int16_t na_reserved2;
226 u_int16_t na_status;
227 u_int16_t na_task_flags;
228 u_int16_t na_seqid; /* sequence id */
229 u_int16_t na_reserved3[NA2_RSVDLEN];
230} na_fcentry_e_t;
231
208#define NAFC_RCOUNT 0x80 /* increment resource count */
209#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */
210/*
211 * Accept Target I/O Entry structure
212 */
213#define ATIO_CDBLEN 26
214
215typedef struct {

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249 */
250
251#define AT_MAKE_TAGID(tid, inst, aep) \
252 tid = aep->at_handle; \
253 if (aep->at_flags & AT_TQAE) { \
254 tid |= (aep->at_tag_val << 16); \
255 tid |= (1 << 24); \
256 } \
232#define NAFC_RCOUNT 0x80 /* increment resource count */
233#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */
234/*
235 * Accept Target I/O Entry structure
236 */
237#define ATIO_CDBLEN 26
238
239typedef struct {

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273 */
274
275#define AT_MAKE_TAGID(tid, inst, aep) \
276 tid = aep->at_handle; \
277 if (aep->at_flags & AT_TQAE) { \
278 tid |= (aep->at_tag_val << 16); \
279 tid |= (1 << 24); \
280 } \
257 tid |= (inst << 25)
281 tid |= (GET_BUS_VAL(aep->at_iid) << 25); \
282 tid |= (inst << 26)
258
283
259#define CT_MAKE_TAGID(tid, inst, ct) \
284#define CT_MAKE_TAGID(tid, bus, inst, ct) \
260 tid = ct->ct_fwhandle; \
261 if (ct->ct_flags & CT_TQAE) { \
262 tid |= (ct->ct_tag_val << 16); \
263 tid |= (1 << 24); \
264 } \
285 tid = ct->ct_fwhandle; \
286 if (ct->ct_flags & CT_TQAE) { \
287 tid |= (ct->ct_tag_val << 16); \
288 tid |= (1 << 24); \
289 } \
265 tid |= (inst << 25)
290 tid |= ((bus & 0x1) << 25); \
291 tid |= (inst << 26)
266
267#define AT_HAS_TAG(val) ((val) & (1 << 24))
268#define AT_GET_TAG(val) (((val) >> 16) & 0xff)
292
293#define AT_HAS_TAG(val) ((val) & (1 << 24))
294#define AT_GET_TAG(val) (((val) >> 16) & 0xff)
269#define AT_GET_INST(val) (((val) >> 25) & 0x7f)
295#define AT_GET_INST(val) (((val) >> 26) & 0x3f)
296#define AT_GET_BUS(val) (((val) >> 25) & 0x1)
270#define AT_GET_HANDLE(val) ((val) & 0xffff)
271
272#define IN_MAKE_TAGID(tid, inst, inp) \
273 tid = inp->in_seqid; \
274 tid |= (inp->in_tag_val << 16); \
275 tid |= (1 << 24); \
297#define AT_GET_HANDLE(val) ((val) & 0xffff)
298
299#define IN_MAKE_TAGID(tid, inst, inp) \
300 tid = inp->in_seqid; \
301 tid |= (inp->in_tag_val << 16); \
302 tid |= (1 << 24); \
276 tid |= (inst << 25)
303 tid |= (GET_BUS_VAL(inp->in_iid) << 25); \
304 tid |= (inst << 26)
277
278#define TAG_INSERT_INST(tid, inst) \
305
306#define TAG_INSERT_INST(tid, inst) \
279 tid &= ~(0x1ffffff); \
280 tid |= (inst << 25)
307 tid &= ~(0x3ffffff); \
308 tid |= (inst << 26)
281
309
310#define TAG_INSERT_BUS(tid, bus) \
311 tid &= ~(1 << 25); \
312 tid |= (bus << 25)
313
282/*
283 * Accept Target I/O Entry structure, Type 2
284 */
285#define ATIO2_CDBLEN 16
286
287typedef struct {
288 isphdr_t at_header;
289 u_int32_t at_reserved;

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299 u_int8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
300 u_int32_t at_datalen; /* allocated data len */
301 u_int16_t at_scclun; /* SCC Lun or reserved */
302 u_int16_t at_wwpn[4]; /* WWPN of initiator */
303 u_int16_t at_reserved2[6];
304 u_int16_t at_oxid;
305} at2_entry_t;
306
314/*
315 * Accept Target I/O Entry structure, Type 2
316 */
317#define ATIO2_CDBLEN 16
318
319typedef struct {
320 isphdr_t at_header;
321 u_int32_t at_reserved;

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331 u_int8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
332 u_int32_t at_datalen; /* allocated data len */
333 u_int16_t at_scclun; /* SCC Lun or reserved */
334 u_int16_t at_wwpn[4]; /* WWPN of initiator */
335 u_int16_t at_reserved2[6];
336 u_int16_t at_oxid;
337} at2_entry_t;
338
339typedef struct {
340 isphdr_t at_header;
341 u_int32_t at_reserved;
342 u_int16_t at_iid; /* initiator */
343 u_int16_t at_rxid; /* response ID */
344 u_int16_t at_flags;
345 u_int16_t at_status; /* firmware status */
346 u_int8_t at_crn; /* command reference number */
347 u_int8_t at_taskcodes;
348 u_int8_t at_taskflags;
349 u_int8_t at_execodes;
350 u_int8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
351 u_int32_t at_datalen; /* allocated data len */
352 u_int16_t at_scclun; /* SCC Lun or reserved */
353 u_int16_t at_wwpn[4]; /* WWPN of initiator */
354 u_int16_t at_reserved2[6];
355 u_int16_t at_oxid;
356} at2e_entry_t;
357
307#define ATIO2_WWPN_OFFSET 0x2A
308#define ATIO2_OXID_OFFSET 0x3E
309
310#define ATIO2_TC_ATTR_MASK 0x7
311#define ATIO2_TC_ATTR_SIMPLEQ 0
312#define ATIO2_TC_ATTR_HEADOFQ 1
313#define ATIO2_TC_ATTR_ORDERED 2
314#define ATIO2_TC_ATTR_ACAQ 4

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327 tid = ct->ct_rxid; \
328 tid |= (inst << 16)
329
330#define AT2_HAS_TAG(val) 1
331#define AT2_GET_TAG(val) ((val) & 0xffff)
332#define AT2_GET_INST(val) ((val) >> 16)
333#define AT2_GET_HANDLE AT2_GET_TAG
334
358#define ATIO2_WWPN_OFFSET 0x2A
359#define ATIO2_OXID_OFFSET 0x3E
360
361#define ATIO2_TC_ATTR_MASK 0x7
362#define ATIO2_TC_ATTR_SIMPLEQ 0
363#define ATIO2_TC_ATTR_HEADOFQ 1
364#define ATIO2_TC_ATTR_ORDERED 2
365#define ATIO2_TC_ATTR_ACAQ 4

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378 tid = ct->ct_rxid; \
379 tid |= (inst << 16)
380
381#define AT2_HAS_TAG(val) 1
382#define AT2_GET_TAG(val) ((val) & 0xffff)
383#define AT2_GET_INST(val) ((val) >> 16)
384#define AT2_GET_HANDLE AT2_GET_TAG
385
386#define FC_HAS_TAG AT2_HAS_TAG
387#define FC_GET_TAG AT2_GET_TAG
388#define FC_GET_INST AT2_GET_INST
389#define FC_GET_HANDLE AT2_GET_HANDLE
390
335#define IN_FC_MAKE_TAGID(tid, inst, inp) \
336 tid = inp->in_seqid; \
337 tid |= (inst << 16)
338
339#define FC_TAG_INSERT_INST(tid, inst) \
340 tid &= ~0xffff; \
341 tid |= (inst << 16)
342

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376#define ct_dataseg _u.ct_a
377} ct_entry_t;
378
379/*
380 * For some of the dual port SCSI adapters, port (bus #) is reported
381 * in the MSbit of ct_iid. Bit fields are a bit too awkward here.
382 *
383 * Note that this does not apply to FC adapters at all which can and
391#define IN_FC_MAKE_TAGID(tid, inst, inp) \
392 tid = inp->in_seqid; \
393 tid |= (inst << 16)
394
395#define FC_TAG_INSERT_INST(tid, inst) \
396 tid &= ~0xffff; \
397 tid |= (inst << 16)
398

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432#define ct_dataseg _u.ct_a
433} ct_entry_t;
434
435/*
436 * For some of the dual port SCSI adapters, port (bus #) is reported
437 * in the MSbit of ct_iid. Bit fields are a bit too awkward here.
438 *
439 * Note that this does not apply to FC adapters at all which can and
384 * do report IIDs between 129 && 255 (these represent devices that have
385 * logged in across a SCSI fabric).
440 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices
441 * that have logged in across a SCSI fabric.
386 */
387#define GET_IID_VAL(x) (x & 0x3f)
388#define GET_BUS_VAL(x) ((x >> 7) & 0x1)
389#define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f))
390#define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7))
391
392/*
393 * ct_flags values

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425#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */
426#define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */
427#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */
428#define CT_PORTNOTAVAIL 0x28 /* port not available */
429#define CT_LOGOUT 0x29 /* port logout */
430#define CT_PORTCHANGED 0x2A /* port changed */
431#define CT_IDE 0x33 /* Initiator Detected Error */
432#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */
442 */
443#define GET_IID_VAL(x) (x & 0x3f)
444#define GET_BUS_VAL(x) ((x >> 7) & 0x1)
445#define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f))
446#define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7))
447
448/*
449 * ct_flags values

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481#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */
482#define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */
483#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */
484#define CT_PORTNOTAVAIL 0x28 /* port not available */
485#define CT_LOGOUT 0x29 /* port logout */
486#define CT_PORTCHANGED 0x2A /* port changed */
487#define CT_IDE 0x33 /* Initiator Detected Error */
488#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */
489#define CT_SRR 0x45 /* SRR Received */
490#define CT_LUN_RESET 0x48 /* Lun Reset Received */
433
434/*
435 * When the firmware returns a CTIO entry, it may overwrite the last
436 * part of the structure with sense data. This starts at offset 0x2E
437 * into the entry, which is in the middle of ct_dataseg[1]. Rather
438 * than define a new struct for this, I'm just using the sense data
439 * offset.
440 */

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504 u_int16_t _reserved2;
505 u_int16_t _reserved3;
506 u_int32_t ct_datalen;
507 ispds_t ct_fcp_rsp_iudata;
508 } m2;
509 } rsp;
510} ct2_entry_t;
511
491
492/*
493 * When the firmware returns a CTIO entry, it may overwrite the last
494 * part of the structure with sense data. This starts at offset 0x2E
495 * into the entry, which is in the middle of ct_dataseg[1]. Rather
496 * than define a new struct for this, I'm just using the sense data
497 * offset.
498 */

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562 u_int16_t _reserved2;
563 u_int16_t _reserved3;
564 u_int32_t ct_datalen;
565 ispds_t ct_fcp_rsp_iudata;
566 } m2;
567 } rsp;
568} ct2_entry_t;
569
570typedef struct {
571 isphdr_t ct_header;
572 u_int16_t ct_reserved;
573 u_int16_t ct_fwhandle; /* just to match CTIO */
574 u_int16_t ct_iid; /* initiator id */
575 u_int16_t ct_rxid; /* response ID */
576 u_int16_t ct_flags;
577 u_int16_t ct_status; /* isp status */
578 u_int16_t ct_timeout;
579 u_int16_t ct_seg_count;
580 u_int32_t ct_reloff; /* relative offset */
581 int32_t ct_resid; /* residual length */
582 union {
583 struct {
584 u_int32_t _reserved;
585 u_int16_t _reserved2;
586 u_int16_t ct_scsi_status;
587 u_int32_t ct_xfrlen;
588 union {
589 ispds_t ct_a[ISP_RQDSEG_T2]; /* CTIO2 */
590 ispds64_t ct_b[ISP_RQDSEG_T3]; /* CTIO3 */
591 ispdslist_t ct_c; /* CTIO4 */
592 } _u;
593 } m0;
594 struct {
595 u_int16_t _reserved;
596 u_int16_t _reserved2;
597 u_int16_t ct_senselen;
598 u_int16_t ct_scsi_status;
599 u_int16_t ct_resplen;
600 u_int8_t ct_resp[MAXRESPLEN];
601 } m1;
602 struct {
603 u_int32_t _reserved;
604 u_int16_t _reserved2;
605 u_int16_t _reserved3;
606 u_int32_t ct_datalen;
607 ispds_t ct_fcp_rsp_iudata;
608 } m2;
609 } rsp;
610} ct2e_entry_t;
611
512/*
513 * ct_flags values for CTIO2
514 */
515#define CT2_FLAG_MMASK 0x0003
516#define CT2_FLAG_MODE0 0x0000
517#define CT2_FLAG_MODE1 0x0001
518#define CT2_FLAG_MODE2 0x0002
519#define CT2_DATA_IN CT_DATA_IN

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552 */
553
554/*
555 * This function handles new response queue entry appropriate for target mode.
556 */
557int isp_target_notify(struct ispsoftc *, void *, u_int16_t *);
558
559/*
612/*
613 * ct_flags values for CTIO2
614 */
615#define CT2_FLAG_MMASK 0x0003
616#define CT2_FLAG_MODE0 0x0000
617#define CT2_FLAG_MODE1 0x0001
618#define CT2_FLAG_MODE2 0x0002
619#define CT2_DATA_IN CT_DATA_IN

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652 */
653
654/*
655 * This function handles new response queue entry appropriate for target mode.
656 */
657int isp_target_notify(struct ispsoftc *, void *, u_int16_t *);
658
659/*
660 * This function externalizes the ability to acknowledge an Immediate Notify
661 * request.
662 */
663void isp_notify_ack(struct ispsoftc *, void *);
664
665/*
560 * Enable/Disable/Modify a logical unit.
561 * (softc, cmd, bus, tgt, lun, cmd_cnt, inotify_cnt, opaque)
562 */
563#define DFLT_CMND_CNT 0xfe /* unmonitored */
564#define DFLT_INOT_CNT 16
565int isp_lun_cmd(struct ispsoftc *, int, int, int, int, int, int, u_int32_t);
566
567/*

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584int isp_endcmd(struct ispsoftc *, void *, u_int32_t, u_int16_t);
585#define ECMD_SVALID 0x100
586
587/*
588 * Handle an asynchronous event
589 *
590 * Return nonzero if the interrupt that generated this event has been dismissed.
591 */
666 * Enable/Disable/Modify a logical unit.
667 * (softc, cmd, bus, tgt, lun, cmd_cnt, inotify_cnt, opaque)
668 */
669#define DFLT_CMND_CNT 0xfe /* unmonitored */
670#define DFLT_INOT_CNT 16
671int isp_lun_cmd(struct ispsoftc *, int, int, int, int, int, int, u_int32_t);
672
673/*

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690int isp_endcmd(struct ispsoftc *, void *, u_int32_t, u_int16_t);
691#define ECMD_SVALID 0x100
692
693/*
694 * Handle an asynchronous event
695 *
696 * Return nonzero if the interrupt that generated this event has been dismissed.
697 */
592
593int isp_target_async(struct ispsoftc *, int, int);
698int isp_target_async(struct ispsoftc *, int, int);
699
594#endif /* _ISP_TARGET_H */
700#endif /* _ISP_TARGET_H */