1/*- 2 * Copyright (c) 1997-2008 by Matthew Jacob 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26/* 27 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters. 28 * FreeBSD Version. 29 */ 30#include <sys/cdefs.h> |
31__FBSDID("$FreeBSD: stable/10/sys/dev/isp/isp_pci.c 290785 2015-11-13 19:42:55Z mav $"); |
32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/kernel.h> 36#include <sys/module.h> 37#include <sys/linker.h> 38#include <sys/firmware.h> 39#include <sys/bus.h> --- 14 unchanged lines hidden (view full) --- 54#include <dev/isp/isp_freebsd.h> 55 56static uint32_t isp_pci_rd_reg(ispsoftc_t *, int); 57static void isp_pci_wr_reg(ispsoftc_t *, int, uint32_t); 58static uint32_t isp_pci_rd_reg_1080(ispsoftc_t *, int); 59static void isp_pci_wr_reg_1080(ispsoftc_t *, int, uint32_t); 60static uint32_t isp_pci_rd_reg_2400(ispsoftc_t *, int); 61static void isp_pci_wr_reg_2400(ispsoftc_t *, int, uint32_t); |
62static int isp_pci_rd_isr(ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *); 63static int isp_pci_rd_isr_2300(ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *); 64static int isp_pci_rd_isr_2400(ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *); |
65static int isp_pci_mbxdma(ispsoftc_t *); 66static int isp_pci_dmasetup(ispsoftc_t *, XS_T *, void *); 67 68 69static void isp_pci_reset0(ispsoftc_t *); 70static void isp_pci_reset1(ispsoftc_t *); 71static void isp_pci_dumpregs(ispsoftc_t *, const char *); 72 --- 1034 unchanged lines hidden (view full) --- 1107 if (val0 != val1) { 1108 return (1); 1109 } 1110 *rp = val0; 1111 return (0); 1112} 1113 1114static int |
1115isp_pci_rd_isr(ispsoftc_t *isp, uint16_t *isrp, uint16_t *semap, uint16_t *info) |
1116{ 1117 uint16_t isr, sema; 1118 1119 if (IS_2100(isp)) { 1120 if (isp_pci_rd_debounced(isp, BIU_ISR, &isr)) { 1121 return (0); 1122 } 1123 if (isp_pci_rd_debounced(isp, BIU_SEMA, &sema)) { --- 7 unchanged lines hidden (view full) --- 1131 isr &= INT_PENDING_MASK(isp); 1132 sema &= BIU_SEMA_LOCK; 1133 if (isr == 0 && sema == 0) { 1134 return (0); 1135 } 1136 *isrp = isr; 1137 if ((*semap = sema) != 0) { 1138 if (IS_2100(isp)) { |
1139 if (isp_pci_rd_debounced(isp, OUTMAILBOX0, info)) { |
1140 return (0); 1141 } 1142 } else { |
1143 *info = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0)); |
1144 } 1145 } 1146 return (1); 1147} 1148 1149static int |
1150isp_pci_rd_isr_2300(ispsoftc_t *isp, uint16_t *isrp, uint16_t *semap, uint16_t *info) |
1151{ |
1152 uint32_t hccr, r2hisr; |
1153 1154 if (!(BXR2(isp, IspVirt2Off(isp, BIU_ISR) & BIU2100_ISR_RISC_INT))) { 1155 *isrp = 0; 1156 return (0); 1157 } 1158 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU_R2HSTSLO)); 1159 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr); 1160 if ((r2hisr & BIU_R2HST_INTR) == 0) { 1161 *isrp = 0; 1162 return (0); 1163 } |
1164 switch ((*isrp = r2hisr & BIU_R2HST_ISTAT_MASK)) { |
1165 case ISPR2HST_ROM_MBX_OK: 1166 case ISPR2HST_ROM_MBX_FAIL: 1167 case ISPR2HST_MBX_OK: 1168 case ISPR2HST_MBX_FAIL: 1169 case ISPR2HST_ASYNC_EVENT: |
1170 *semap = 1; |
1171 break; |
1172 case ISPR2HST_RIO_16: |
1173 *info = ASYNC_RIO16_1; |
1174 *semap = 1; 1175 return (1); 1176 case ISPR2HST_FPOST: |
1177 *info = ASYNC_CMD_CMPLT; |
1178 *semap = 1; 1179 return (1); 1180 case ISPR2HST_FPOST_CTIO: |
1181 *info = ASYNC_CTIO_DONE; |
1182 *semap = 1; 1183 return (1); 1184 case ISPR2HST_RSPQ_UPDATE: |
1185 *semap = 0; |
1186 break; |
1187 default: 1188 hccr = ISP_READ(isp, HCCR); 1189 if (hccr & HCCR_PAUSE) { 1190 ISP_WRITE(isp, HCCR, HCCR_RESET); 1191 isp_prt(isp, ISP_LOGERR, "RISC paused at interrupt (%x->%x)", hccr, ISP_READ(isp, HCCR)); 1192 ISP_WRITE(isp, BIU_ICR, 0); 1193 } else { 1194 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr); 1195 } 1196 return (0); 1197 } |
1198 *info = (r2hisr >> 16); 1199 return (1); |
1200} 1201 1202static int |
1203isp_pci_rd_isr_2400(ispsoftc_t *isp, uint16_t *isrp, uint16_t *semap, uint16_t *info) |
1204{ 1205 uint32_t r2hisr; 1206 1207 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU2400_R2HSTSLO)); 1208 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr); |
1209 if ((r2hisr & BIU_R2HST_INTR) == 0) { |
1210 *isrp = 0; 1211 return (0); 1212 } |
1213 switch ((*isrp = r2hisr & BIU_R2HST_ISTAT_MASK)) { 1214 case ISPR2HST_ROM_MBX_OK: 1215 case ISPR2HST_ROM_MBX_FAIL: 1216 case ISPR2HST_MBX_OK: 1217 case ISPR2HST_MBX_FAIL: 1218 case ISPR2HST_ASYNC_EVENT: |
1219 *semap = 1; |
1220 break; 1221 case ISPR2HST_RSPQ_UPDATE: 1222 case ISPR2HST_RSPQ_UPDATE2: 1223 case ISPR2HST_ATIO_UPDATE: 1224 case ISPR2HST_ATIO_RSPQ_UPDATE: 1225 case ISPR2HST_ATIO_UPDATE2: |
1226 *semap = 0; |
1227 break; |
1228 default: 1229 ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT); 1230 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr); 1231 return (0); 1232 } |
1233 *info = (r2hisr >> 16); 1234 return (1); |
1235} 1236 1237static uint32_t 1238isp_pci_rd_reg(ispsoftc_t *isp, int regoff) 1239{ 1240 uint16_t rv; 1241 int oldconf = 0; 1242 --- 811 unchanged lines hidden --- |